diff options
author | Vijayakumar <vsubbu@nvidia.com> | 2016-08-31 08:10:24 -0400 |
---|---|---|
committer | Deepak Nibade <dnibade@nvidia.com> | 2016-12-27 04:56:50 -0500 |
commit | 1b1090512020369df18dbe36336ac5a85d2cd693 (patch) | |
tree | 41f3a11dbdff21815545e0e69734c60416783e5e /drivers/gpu/nvgpu/clk/clk_domain.h | |
parent | e28ef73ec9baea7df631606298f8c210dc8f31a8 (diff) |
gpu: nvgpu: support to parse VF table
JIRA DNVGPU-123
function was added to retrieve V for F or
F for V for a given clock domain.
Clock domain can be master or slave.
F or V can be intermediate point between two
successive V or F values in VF table.
VF table should be cached before calling this function.
A F value below Fmin will return Vmin.
F > Fmax will return error
A V value above Vmax wil return F max.
A V value below Vmin will return error.
Change-Id: I28b4e8647510c6933e9e1204cfff31d74616e11a
Signed-off-by: Vijayakumar <vsubbu@nvidia.com>
Reviewed-on: http://git-master/r/1211234
(cherry-picked from commit 5b83b03f2454fbec8d49a064ed09b09c92d3e9fa)
Reviewed-on: http://git-master/r/1235054
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/clk/clk_domain.h')
-rw-r--r-- | drivers/gpu/nvgpu/clk/clk_domain.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/clk/clk_domain.h b/drivers/gpu/nvgpu/clk/clk_domain.h index 2670a066..07976a2a 100644 --- a/drivers/gpu/nvgpu/clk/clk_domain.h +++ b/drivers/gpu/nvgpu/clk/clk_domain.h | |||
@@ -26,8 +26,13 @@ struct clk_domain; | |||
26 | /*data and function definition to talk to driver*/ | 26 | /*data and function definition to talk to driver*/ |
27 | u32 clk_domain_sw_setup(struct gk20a *g); | 27 | u32 clk_domain_sw_setup(struct gk20a *g); |
28 | u32 clk_domain_pmu_setup(struct gk20a *g); | 28 | u32 clk_domain_pmu_setup(struct gk20a *g); |
29 | |||
29 | typedef u32 clkproglink(struct gk20a *g, struct clk_pmupstate *pclk, | 30 | typedef u32 clkproglink(struct gk20a *g, struct clk_pmupstate *pclk, |
30 | struct clk_domain *pdomain); | 31 | struct clk_domain *pdomain); |
32 | |||
33 | typedef u32 clkvfsearch(struct gk20a *g, struct clk_pmupstate *pclk, | ||
34 | struct clk_domain *pdomain, u16 *clkmhz, | ||
35 | u32 *voltuv, u8 rail); | ||
31 | struct clk_domains { | 36 | struct clk_domains { |
32 | struct boardobjgrp_e32 super; | 37 | struct boardobjgrp_e32 super; |
33 | u8 n_num_entries; | 38 | u8 n_num_entries; |
@@ -55,6 +60,7 @@ struct clk_domain { | |||
55 | u8 ratio_domain; | 60 | u8 ratio_domain; |
56 | u8 usage; | 61 | u8 usage; |
57 | clkproglink *clkdomainclkproglink; | 62 | clkproglink *clkdomainclkproglink; |
63 | clkvfsearch *clkdomainclkvfsearch; | ||
58 | }; | 64 | }; |
59 | 65 | ||
60 | struct clk_domain_3x { | 66 | struct clk_domain_3x { |
@@ -92,4 +98,8 @@ struct clk_domain_3x_slave { | |||
92 | 98 | ||
93 | u32 clk_domain_clk_prog_link(struct gk20a *g, struct clk_pmupstate *pclk); | 99 | u32 clk_domain_clk_prog_link(struct gk20a *g, struct clk_pmupstate *pclk); |
94 | 100 | ||
101 | #define CLK_CLK_DOMAIN_GET(pclk, idx) \ | ||
102 | ((struct clk_domain *)BOARDOBJGRP_OBJ_GET_BY_IDX( \ | ||
103 | &pclk->clk_domainobjs.super.super, (u8)(idx))) | ||
104 | |||
95 | #endif | 105 | #endif |