diff options
author | Terje Bergstrom <tbergstrom@nvidia.com> | 2018-04-18 22:39:46 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-05-09 21:26:04 -0400 |
commit | dd739fcb039d51606e9a5454ec0aab17bcb01965 (patch) | |
tree | 806ba8575d146367ad1be00086ca0cdae35a6b28 /drivers/gpu/nvgpu/clk/clk_domain.c | |
parent | 7e66f2a63d4855e763fa768047dfc32f6f96b771 (diff) |
gpu: nvgpu: Remove gk20a_dbg* functions
Switch all logging to nvgpu_log*(). gk20a_dbg* macros are
intentionally left there because of use from other repositories.
Because the new functions do not work without a pointer to struct
gk20a, and piping it just for logging is excessive, some log messages
are deleted.
Change-Id: I00e22e75fe4596a330bb0282ab4774b3639ee31e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1704148
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/clk/clk_domain.c')
-rw-r--r-- | drivers/gpu/nvgpu/clk/clk_domain.c | 56 |
1 files changed, 28 insertions, 28 deletions
diff --git a/drivers/gpu/nvgpu/clk/clk_domain.c b/drivers/gpu/nvgpu/clk/clk_domain.c index 1d47d2d5..f306cf56 100644 --- a/drivers/gpu/nvgpu/clk/clk_domain.c +++ b/drivers/gpu/nvgpu/clk/clk_domain.c | |||
@@ -153,7 +153,7 @@ static u32 _clk_domains_pmudata_instget(struct gk20a *g, | |||
153 | (struct nv_pmu_clk_clk_domain_boardobj_grp_set *) | 153 | (struct nv_pmu_clk_clk_domain_boardobj_grp_set *) |
154 | pmuboardobjgrp; | 154 | pmuboardobjgrp; |
155 | 155 | ||
156 | gk20a_dbg_info(""); | 156 | nvgpu_log_info(g, " "); |
157 | 157 | ||
158 | /*check whether pmuboardobjgrp has a valid boardobj in index*/ | 158 | /*check whether pmuboardobjgrp has a valid boardobj in index*/ |
159 | if (((u32)BIT(idx) & | 159 | if (((u32)BIT(idx) & |
@@ -162,7 +162,7 @@ static u32 _clk_domains_pmudata_instget(struct gk20a *g, | |||
162 | 162 | ||
163 | *ppboardobjpmudata = (struct nv_pmu_boardobj *) | 163 | *ppboardobjpmudata = (struct nv_pmu_boardobj *) |
164 | &pgrp_set->objects[idx].data.board_obj; | 164 | &pgrp_set->objects[idx].data.board_obj; |
165 | gk20a_dbg_info(" Done"); | 165 | nvgpu_log_info(g, " Done"); |
166 | return 0; | 166 | return 0; |
167 | } | 167 | } |
168 | 168 | ||
@@ -176,7 +176,7 @@ u32 clk_domain_sw_setup(struct gk20a *g) | |||
176 | struct clk_domain_3x_slave *pdomain_slave; | 176 | struct clk_domain_3x_slave *pdomain_slave; |
177 | u8 i; | 177 | u8 i; |
178 | 178 | ||
179 | gk20a_dbg_info(""); | 179 | nvgpu_log_info(g, " "); |
180 | 180 | ||
181 | status = boardobjgrpconstruct_e32(g, &g->clk_pmu.clk_domainobjs.super); | 181 | status = boardobjgrpconstruct_e32(g, &g->clk_pmu.clk_domainobjs.super); |
182 | if (status) { | 182 | if (status) { |
@@ -255,7 +255,7 @@ u32 clk_domain_sw_setup(struct gk20a *g) | |||
255 | } | 255 | } |
256 | 256 | ||
257 | done: | 257 | done: |
258 | gk20a_dbg_info(" done status %x", status); | 258 | nvgpu_log_info(g, " done status %x", status); |
259 | return status; | 259 | return status; |
260 | } | 260 | } |
261 | 261 | ||
@@ -264,7 +264,7 @@ u32 clk_domain_pmu_setup(struct gk20a *g) | |||
264 | u32 status; | 264 | u32 status; |
265 | struct boardobjgrp *pboardobjgrp = NULL; | 265 | struct boardobjgrp *pboardobjgrp = NULL; |
266 | 266 | ||
267 | gk20a_dbg_info(""); | 267 | nvgpu_log_info(g, " "); |
268 | 268 | ||
269 | pboardobjgrp = &g->clk_pmu.clk_domainobjs.super.super; | 269 | pboardobjgrp = &g->clk_pmu.clk_domainobjs.super.super; |
270 | 270 | ||
@@ -273,7 +273,7 @@ u32 clk_domain_pmu_setup(struct gk20a *g) | |||
273 | 273 | ||
274 | status = pboardobjgrp->pmuinithandle(g, pboardobjgrp); | 274 | status = pboardobjgrp->pmuinithandle(g, pboardobjgrp); |
275 | 275 | ||
276 | gk20a_dbg_info("Done"); | 276 | nvgpu_log_info(g, "Done"); |
277 | return status; | 277 | return status; |
278 | } | 278 | } |
279 | 279 | ||
@@ -298,7 +298,7 @@ static u32 devinit_get_clocks_table(struct gk20a *g, | |||
298 | struct clk_domain_3x_slave v3x_slave; | 298 | struct clk_domain_3x_slave v3x_slave; |
299 | } clk_domain_data; | 299 | } clk_domain_data; |
300 | 300 | ||
301 | gk20a_dbg_info(""); | 301 | nvgpu_log_info(g, " "); |
302 | 302 | ||
303 | clocks_table_ptr = (u8 *)nvgpu_bios_get_perf_table_ptrs(g, | 303 | clocks_table_ptr = (u8 *)nvgpu_bios_get_perf_table_ptrs(g, |
304 | g->bios.clock_token, CLOCKS_TABLE); | 304 | g->bios.clock_token, CLOCKS_TABLE); |
@@ -459,7 +459,7 @@ static u32 devinit_get_clocks_table(struct gk20a *g, | |||
459 | } | 459 | } |
460 | 460 | ||
461 | done: | 461 | done: |
462 | gk20a_dbg_info(" done status %x", status); | 462 | nvgpu_log_info(g, " done status %x", status); |
463 | return status; | 463 | return status; |
464 | } | 464 | } |
465 | 465 | ||
@@ -467,7 +467,7 @@ static u32 clkdomainclkproglink_not_supported(struct gk20a *g, | |||
467 | struct clk_pmupstate *pclk, | 467 | struct clk_pmupstate *pclk, |
468 | struct clk_domain *pdomain) | 468 | struct clk_domain *pdomain) |
469 | { | 469 | { |
470 | gk20a_dbg_info(""); | 470 | nvgpu_log_info(g, " "); |
471 | return -EINVAL; | 471 | return -EINVAL; |
472 | } | 472 | } |
473 | 473 | ||
@@ -480,7 +480,7 @@ static int clkdomainvfsearch_stub( | |||
480 | u8 rail) | 480 | u8 rail) |
481 | 481 | ||
482 | { | 482 | { |
483 | gk20a_dbg_info(""); | 483 | nvgpu_log_info(g, " "); |
484 | return -EINVAL; | 484 | return -EINVAL; |
485 | } | 485 | } |
486 | 486 | ||
@@ -492,7 +492,7 @@ static u32 clkdomaingetfpoints_stub( | |||
492 | u16 *pfreqpointsinmhz, | 492 | u16 *pfreqpointsinmhz, |
493 | u8 rail) | 493 | u8 rail) |
494 | { | 494 | { |
495 | gk20a_dbg_info(""); | 495 | nvgpu_log_info(g, " "); |
496 | return -EINVAL; | 496 | return -EINVAL; |
497 | } | 497 | } |
498 | 498 | ||
@@ -541,7 +541,7 @@ static u32 _clk_domain_pmudatainit_3x(struct gk20a *g, | |||
541 | struct clk_domain_3x *pclk_domain_3x; | 541 | struct clk_domain_3x *pclk_domain_3x; |
542 | struct nv_pmu_clk_clk_domain_3x_boardobj_set *pset; | 542 | struct nv_pmu_clk_clk_domain_3x_boardobj_set *pset; |
543 | 543 | ||
544 | gk20a_dbg_info(""); | 544 | nvgpu_log_info(g, " "); |
545 | 545 | ||
546 | status = clk_domain_pmudatainit_super(g, board_obj_ptr, ppmudata); | 546 | status = clk_domain_pmudatainit_super(g, board_obj_ptr, ppmudata); |
547 | if (status != 0) | 547 | if (status != 0) |
@@ -592,7 +592,7 @@ static u32 clkdomainclkproglink_3x_prog(struct gk20a *g, | |||
592 | struct clk_prog *pprog = NULL; | 592 | struct clk_prog *pprog = NULL; |
593 | u8 i; | 593 | u8 i; |
594 | 594 | ||
595 | gk20a_dbg_info(""); | 595 | nvgpu_log_info(g, " "); |
596 | 596 | ||
597 | for (i = p3xprog->clk_prog_idx_first; | 597 | for (i = p3xprog->clk_prog_idx_first; |
598 | i <= p3xprog->clk_prog_idx_last; | 598 | i <= p3xprog->clk_prog_idx_last; |
@@ -616,7 +616,7 @@ static int clkdomaingetslaveclk(struct gk20a *g, | |||
616 | u8 slaveidx; | 616 | u8 slaveidx; |
617 | struct clk_domain_3x_master *p3xmaster; | 617 | struct clk_domain_3x_master *p3xmaster; |
618 | 618 | ||
619 | gk20a_dbg_info(""); | 619 | nvgpu_log_info(g, " "); |
620 | 620 | ||
621 | if (pclkmhz == NULL) | 621 | if (pclkmhz == NULL) |
622 | return -EINVAL; | 622 | return -EINVAL; |
@@ -657,7 +657,7 @@ static int clkdomainvfsearch(struct gk20a *g, | |||
657 | u16 bestclkmhz; | 657 | u16 bestclkmhz; |
658 | u32 bestvoltuv; | 658 | u32 bestvoltuv; |
659 | 659 | ||
660 | gk20a_dbg_info(""); | 660 | nvgpu_log_info(g, " "); |
661 | 661 | ||
662 | if ((pclkmhz == NULL) || (pvoltuv == NULL)) | 662 | if ((pclkmhz == NULL) || (pvoltuv == NULL)) |
663 | return -EINVAL; | 663 | return -EINVAL; |
@@ -719,7 +719,7 @@ static int clkdomainvfsearch(struct gk20a *g, | |||
719 | goto done; | 719 | goto done; |
720 | } | 720 | } |
721 | done: | 721 | done: |
722 | gk20a_dbg_info("done status %x", status); | 722 | nvgpu_log_info(g, "done status %x", status); |
723 | return status; | 723 | return status; |
724 | } | 724 | } |
725 | 725 | ||
@@ -744,7 +744,7 @@ static u32 clkdomaingetfpoints | |||
744 | u16 *freqpointsdata; | 744 | u16 *freqpointsdata; |
745 | u8 i; | 745 | u8 i; |
746 | 746 | ||
747 | gk20a_dbg_info(""); | 747 | nvgpu_log_info(g, " "); |
748 | 748 | ||
749 | if (pfpointscount == NULL) | 749 | if (pfpointscount == NULL) |
750 | return -EINVAL; | 750 | return -EINVAL; |
@@ -783,7 +783,7 @@ static u32 clkdomaingetfpoints | |||
783 | 783 | ||
784 | *pfpointscount = totalcount; | 784 | *pfpointscount = totalcount; |
785 | done: | 785 | done: |
786 | gk20a_dbg_info("done status %x", status); | 786 | nvgpu_log_info(g, "done status %x", status); |
787 | return status; | 787 | return status; |
788 | } | 788 | } |
789 | 789 | ||
@@ -796,7 +796,7 @@ static u32 _clk_domain_pmudatainit_3x_prog(struct gk20a *g, | |||
796 | struct nv_pmu_clk_clk_domain_3x_prog_boardobj_set *pset; | 796 | struct nv_pmu_clk_clk_domain_3x_prog_boardobj_set *pset; |
797 | struct clk_domains *pdomains = &(g->clk_pmu.clk_domainobjs); | 797 | struct clk_domains *pdomains = &(g->clk_pmu.clk_domainobjs); |
798 | 798 | ||
799 | gk20a_dbg_info(""); | 799 | nvgpu_log_info(g, " "); |
800 | 800 | ||
801 | status = _clk_domain_pmudatainit_3x(g, board_obj_ptr, ppmudata); | 801 | status = _clk_domain_pmudatainit_3x(g, board_obj_ptr, ppmudata); |
802 | if (status != 0) | 802 | if (status != 0) |
@@ -876,7 +876,7 @@ static u32 _clk_domain_pmudatainit_3x_slave(struct gk20a *g, | |||
876 | struct clk_domain_3x_slave *pclk_domain_3x_slave; | 876 | struct clk_domain_3x_slave *pclk_domain_3x_slave; |
877 | struct nv_pmu_clk_clk_domain_3x_slave_boardobj_set *pset; | 877 | struct nv_pmu_clk_clk_domain_3x_slave_boardobj_set *pset; |
878 | 878 | ||
879 | gk20a_dbg_info(""); | 879 | nvgpu_log_info(g, " "); |
880 | 880 | ||
881 | status = _clk_domain_pmudatainit_3x_prog(g, board_obj_ptr, ppmudata); | 881 | status = _clk_domain_pmudatainit_3x_prog(g, board_obj_ptr, ppmudata); |
882 | if (status != 0) | 882 | if (status != 0) |
@@ -935,7 +935,7 @@ static u32 clkdomainclkproglink_3x_master(struct gk20a *g, | |||
935 | u16 freq_max_last_mhz = 0; | 935 | u16 freq_max_last_mhz = 0; |
936 | u8 i; | 936 | u8 i; |
937 | 937 | ||
938 | gk20a_dbg_info(""); | 938 | nvgpu_log_info(g, " "); |
939 | 939 | ||
940 | status = clkdomainclkproglink_3x_prog(g, pclk, pdomain); | 940 | status = clkdomainclkproglink_3x_prog(g, pclk, pdomain); |
941 | if (status) | 941 | if (status) |
@@ -961,7 +961,7 @@ static u32 clkdomainclkproglink_3x_master(struct gk20a *g, | |||
961 | goto done; | 961 | goto done; |
962 | } | 962 | } |
963 | done: | 963 | done: |
964 | gk20a_dbg_info("done status %x", status); | 964 | nvgpu_log_info(g, "done status %x", status); |
965 | return status; | 965 | return status; |
966 | } | 966 | } |
967 | 967 | ||
@@ -973,7 +973,7 @@ static u32 _clk_domain_pmudatainit_3x_master(struct gk20a *g, | |||
973 | struct clk_domain_3x_master *pclk_domain_3x_master; | 973 | struct clk_domain_3x_master *pclk_domain_3x_master; |
974 | struct nv_pmu_clk_clk_domain_3x_master_boardobj_set *pset; | 974 | struct nv_pmu_clk_clk_domain_3x_master_boardobj_set *pset; |
975 | 975 | ||
976 | gk20a_dbg_info(""); | 976 | nvgpu_log_info(g, " "); |
977 | 977 | ||
978 | status = _clk_domain_pmudatainit_3x_prog(g, board_obj_ptr, ppmudata); | 978 | status = _clk_domain_pmudatainit_3x_prog(g, board_obj_ptr, ppmudata); |
979 | if (status != 0) | 979 | if (status != 0) |
@@ -1021,7 +1021,7 @@ static u32 clkdomainclkproglink_fixed(struct gk20a *g, | |||
1021 | struct clk_pmupstate *pclk, | 1021 | struct clk_pmupstate *pclk, |
1022 | struct clk_domain *pdomain) | 1022 | struct clk_domain *pdomain) |
1023 | { | 1023 | { |
1024 | gk20a_dbg_info(""); | 1024 | nvgpu_log_info(g, " "); |
1025 | return 0; | 1025 | return 0; |
1026 | } | 1026 | } |
1027 | 1027 | ||
@@ -1033,7 +1033,7 @@ static u32 _clk_domain_pmudatainit_3x_fixed(struct gk20a *g, | |||
1033 | struct clk_domain_3x_fixed *pclk_domain_3x_fixed; | 1033 | struct clk_domain_3x_fixed *pclk_domain_3x_fixed; |
1034 | struct nv_pmu_clk_clk_domain_3x_fixed_boardobj_set *pset; | 1034 | struct nv_pmu_clk_clk_domain_3x_fixed_boardobj_set *pset; |
1035 | 1035 | ||
1036 | gk20a_dbg_info(""); | 1036 | nvgpu_log_info(g, " "); |
1037 | 1037 | ||
1038 | status = _clk_domain_pmudatainit_3x(g, board_obj_ptr, ppmudata); | 1038 | status = _clk_domain_pmudatainit_3x(g, board_obj_ptr, ppmudata); |
1039 | if (status != 0) | 1039 | if (status != 0) |
@@ -1085,7 +1085,7 @@ static struct clk_domain *construct_clk_domain(struct gk20a *g, void *pargs) | |||
1085 | struct boardobj *board_obj_ptr = NULL; | 1085 | struct boardobj *board_obj_ptr = NULL; |
1086 | u32 status; | 1086 | u32 status; |
1087 | 1087 | ||
1088 | gk20a_dbg_info(" %d", BOARDOBJ_GET_TYPE(pargs)); | 1088 | nvgpu_log_info(g, " %d", BOARDOBJ_GET_TYPE(pargs)); |
1089 | switch (BOARDOBJ_GET_TYPE(pargs)) { | 1089 | switch (BOARDOBJ_GET_TYPE(pargs)) { |
1090 | case CTRL_CLK_CLK_DOMAIN_TYPE_3X_FIXED: | 1090 | case CTRL_CLK_CLK_DOMAIN_TYPE_3X_FIXED: |
1091 | status = clk_domain_construct_3x_fixed(g, &board_obj_ptr, | 1091 | status = clk_domain_construct_3x_fixed(g, &board_obj_ptr, |
@@ -1109,7 +1109,7 @@ static struct clk_domain *construct_clk_domain(struct gk20a *g, void *pargs) | |||
1109 | if (status) | 1109 | if (status) |
1110 | return NULL; | 1110 | return NULL; |
1111 | 1111 | ||
1112 | gk20a_dbg_info(" Done"); | 1112 | nvgpu_log_info(g, " Done"); |
1113 | 1113 | ||
1114 | return (struct clk_domain *)board_obj_ptr; | 1114 | return (struct clk_domain *)board_obj_ptr; |
1115 | } | 1115 | } |
@@ -1122,7 +1122,7 @@ static u32 clk_domain_pmudatainit_super(struct gk20a *g, | |||
1122 | struct clk_domain *pclk_domain; | 1122 | struct clk_domain *pclk_domain; |
1123 | struct nv_pmu_clk_clk_domain_boardobj_set *pset; | 1123 | struct nv_pmu_clk_clk_domain_boardobj_set *pset; |
1124 | 1124 | ||
1125 | gk20a_dbg_info(""); | 1125 | nvgpu_log_info(g, " "); |
1126 | 1126 | ||
1127 | status = boardobj_pmudatainit_super(g, board_obj_ptr, ppmudata); | 1127 | status = boardobj_pmudatainit_super(g, board_obj_ptr, ppmudata); |
1128 | if (status != 0) | 1128 | if (status != 0) |