gpu: nvgpu: Clocks params update

- Clocks params update as per r370

JIRA DNVGPU-116

Change-Id: I0aaa1e275aaa2027f2839f3fe24c9aee3e14fd8d
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1212827
(cherry picked from commit 54df6ad9668d46dffb5b9d03265948a47611ff13)
Reviewed-on: http://git-master/r/1227288
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit

1 files changed, 2 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/clk/clk_domain.c b/drivers/gpu/nvgpu/clk/clk_domain.c
index dc485e6b..7371946c 100644
--- a/drivers/gpu/nvgpu/clk/clk_domain.c
+++ b/drivers/gpu/nvgpu/clk/clk_domain.c
@@ -94,6 +94,7 @@ static u32 _clk_domains_pmudatainit_3x(struct gk20a *g,
         pset->b_override_o_v_o_c = false;
         pset->b_debug_mode = false;
         pset->b_enforce_vf_monotonicity = pdomains->b_enforce_vf_monotonicity;
+        pset->b_enforce_vf_smoothening = pdomains->b_enforce_vf_smoothening;
         pset->volt_rails_max = 2;
         status = boardobjgrpmask_export(
                                 &pdomains->master_domains_mask.super,
@@ -168,6 +169,7 @@ u32 clk_domain_sw_setup(struct gk20a *g)
         boardobjgrpmask_e32_init(&pclkdomainobjs->prog_domains_mask, NULL);
         boardobjgrpmask_e32_init(&pclkdomainobjs->master_domains_mask, NULL);
         pclkdomainobjs->b_enforce_vf_monotonicity = true;
+        pclkdomainobjs->b_enforce_vf_smoothening = true;
 
         memset(&pclkdomainobjs->ordered_noise_aware_list, 0,
                 sizeof(pclkdomainobjs->ordered_noise_aware_list));