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author | Mahantesh Kumbar <mkumbar@nvidia.com> | 2018-09-17 04:59:41 -0400 |
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committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-09-28 13:24:56 -0400 |
commit | 24f47f0de8bd5f10bdcd505237ff33baf6fe80eb (patch) | |
tree | 084e852439194b91c188f46d1f3f016d73bf71ce /drivers/gpu/nvgpu/clk/clk_arb.c | |
parent | 18f80ca25c11b21f9212c97ba5a8a26396cbf2b2 (diff) |
gpu: nvgpu: SEC2 RTOS support s/w init
-Created struct nvgpu_sec2 to hold members
related to SEC2-RTOS ucode support in header file
sec2.h
-Created nvgpu_sec2 variable under struct gk20a.
-Created NVGPU_SUPPORT_SEC2_RTOS enable flag
to enable SEC2 RTOS support.
-Defined method nvgpu_init_sec2_support() to
init SEC2 RTOS support by performing s/w setup like
mutex-init, sequence-init & add support
for remove_support.
-Defined method nvgpu_sec2_destroy() to deinit
SEC2 RTOS support.
-Added nvgpu_init_sec2_support()/nvgpu_sec2_destroy()
as part gk20a_finalize_poweron()/gk20a_prepare_poweroff()
sequence based on NVGPU_SUPPORT_SEC2_RTOS enable flag
-Assigned g->sec2->flcn to point to g->sec2_flcn to access
falcon.
-Made Makefile changes to include sec2.c to build
JIRA NVGPUT-80
Change-Id: Icdc8c25994e305427ad465a5a20e9ce533759a9e
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1791955
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/clk/clk_arb.c')
0 files changed, 0 insertions, 0 deletions