diff options
author | Terje Bergstrom <tbergstrom@nvidia.com> | 2017-04-06 15:17:26 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-04-07 16:48:24 -0400 |
commit | 1add126551309a323ae422be41c9db2203bbe112 (patch) | |
tree | d9a620ca88a3c73c0f3dc0f7079ea4d3c24eb075 /drivers/gpu/nvgpu/clk/clk_arb.c | |
parent | 86ecddf68734e4a938eda351f4dde11ab507de3f (diff) |
gpu: nvgpu: clk: Use new error macros
gk20a_err() and gk20a_warn() require a struct device pointer,
which is not portable across operating systems. The new nvgpu_err()
and nvgpu_warn() macros take struct gk20a pointer. Convert code
to use the more portable macros.
JIRA NVGPU-16
Change-Id: I58bb9e2fb7e5b18f74fbb92b70150cce97968fc3
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1457347
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/clk/clk_arb.c')
-rw-r--r-- | drivers/gpu/nvgpu/clk/clk_arb.c | 60 |
1 files changed, 21 insertions, 39 deletions
diff --git a/drivers/gpu/nvgpu/clk/clk_arb.c b/drivers/gpu/nvgpu/clk/clk_arb.c index b8be3334..85a5018d 100644 --- a/drivers/gpu/nvgpu/clk/clk_arb.c +++ b/drivers/gpu/nvgpu/clk/clk_arb.c | |||
@@ -706,14 +706,12 @@ static int nvgpu_clk_arb_update_vf_table(struct nvgpu_clk_arb *arb) | |||
706 | /* Get allowed memory ranges */ | 706 | /* Get allowed memory ranges */ |
707 | if (g->ops.clk_arb.get_arbiter_clk_range(g, CTRL_CLK_DOMAIN_GPC2CLK, | 707 | if (g->ops.clk_arb.get_arbiter_clk_range(g, CTRL_CLK_DOMAIN_GPC2CLK, |
708 | &gpc2clk_min, &gpc2clk_max) < 0) { | 708 | &gpc2clk_min, &gpc2clk_max) < 0) { |
709 | gk20a_err(dev_from_gk20a(g), | 709 | nvgpu_err(g, "failed to fetch GPC2CLK range"); |
710 | "failed to fetch GPC2CLK range"); | ||
711 | goto exit_vf_table; | 710 | goto exit_vf_table; |
712 | } | 711 | } |
713 | if (g->ops.clk_arb.get_arbiter_clk_range(g, CTRL_CLK_DOMAIN_MCLK, | 712 | if (g->ops.clk_arb.get_arbiter_clk_range(g, CTRL_CLK_DOMAIN_MCLK, |
714 | &mclk_min, &mclk_max) < 0) { | 713 | &mclk_min, &mclk_max) < 0) { |
715 | gk20a_err(dev_from_gk20a(g), | 714 | nvgpu_err(g, "failed to fetch MCLK range"); |
716 | "failed to fetch MCLK range"); | ||
717 | goto exit_vf_table; | 715 | goto exit_vf_table; |
718 | } | 716 | } |
719 | 717 | ||
@@ -722,20 +720,17 @@ static int nvgpu_clk_arb_update_vf_table(struct nvgpu_clk_arb *arb) | |||
722 | 720 | ||
723 | if (clk_domain_get_f_points(arb->g, CTRL_CLK_DOMAIN_GPC2CLK, | 721 | if (clk_domain_get_f_points(arb->g, CTRL_CLK_DOMAIN_GPC2CLK, |
724 | &table->gpc2clk_num_points, arb->gpc2clk_f_points)) { | 722 | &table->gpc2clk_num_points, arb->gpc2clk_f_points)) { |
725 | gk20a_err(dev_from_gk20a(g), | 723 | nvgpu_err(g, "failed to fetch GPC2CLK frequency points"); |
726 | "failed to fetch GPC2CLK frequency points"); | ||
727 | goto exit_vf_table; | 724 | goto exit_vf_table; |
728 | } | 725 | } |
729 | 726 | ||
730 | if (clk_domain_get_f_points(arb->g, CTRL_CLK_DOMAIN_MCLK, | 727 | if (clk_domain_get_f_points(arb->g, CTRL_CLK_DOMAIN_MCLK, |
731 | &table->mclk_num_points, arb->mclk_f_points)) { | 728 | &table->mclk_num_points, arb->mclk_f_points)) { |
732 | gk20a_err(dev_from_gk20a(g), | 729 | nvgpu_err(g, "failed to fetch MCLK frequency points"); |
733 | "failed to fetch MCLK frequency points"); | ||
734 | goto exit_vf_table; | 730 | goto exit_vf_table; |
735 | } | 731 | } |
736 | if (!table->mclk_num_points || !table->gpc2clk_num_points) { | 732 | if (!table->mclk_num_points || !table->gpc2clk_num_points) { |
737 | gk20a_err(dev_from_gk20a(g), | 733 | nvgpu_err(g, "empty queries to f points mclk %d gpc2clk %d", |
738 | "empty queries to f points mclk %d gpc2clk %d", | ||
739 | table->mclk_num_points, table->gpc2clk_num_points); | 734 | table->mclk_num_points, table->gpc2clk_num_points); |
740 | status = -EINVAL; | 735 | status = -EINVAL; |
741 | goto exit_vf_table; | 736 | goto exit_vf_table; |
@@ -749,15 +744,13 @@ static int nvgpu_clk_arb_update_vf_table(struct nvgpu_clk_arb *arb) | |||
749 | p5_info = pstate_get_clk_set_info(g, | 744 | p5_info = pstate_get_clk_set_info(g, |
750 | CTRL_PERF_PSTATE_P5, clkwhich_mclk); | 745 | CTRL_PERF_PSTATE_P5, clkwhich_mclk); |
751 | if (!p5_info) { | 746 | if (!p5_info) { |
752 | gk20a_err(dev_from_gk20a(g), | 747 | nvgpu_err(g, "failed to get MCLK P5 info"); |
753 | "failed to get MCLK P5 info"); | ||
754 | goto exit_vf_table; | 748 | goto exit_vf_table; |
755 | } | 749 | } |
756 | p0_info = pstate_get_clk_set_info(g, | 750 | p0_info = pstate_get_clk_set_info(g, |
757 | CTRL_PERF_PSTATE_P0, clkwhich_mclk); | 751 | CTRL_PERF_PSTATE_P0, clkwhich_mclk); |
758 | if (!p0_info) { | 752 | if (!p0_info) { |
759 | gk20a_err(dev_from_gk20a(g), | 753 | nvgpu_err(g, "failed to get MCLK P0 info"); |
760 | "failed to get MCLK P0 info"); | ||
761 | goto exit_vf_table; | 754 | goto exit_vf_table; |
762 | } | 755 | } |
763 | 756 | ||
@@ -775,7 +768,7 @@ static int nvgpu_clk_arb_update_vf_table(struct nvgpu_clk_arb *arb) | |||
775 | &table->mclk_points[j].mem_mhz, &mclk_voltuv, | 768 | &table->mclk_points[j].mem_mhz, &mclk_voltuv, |
776 | CTRL_VOLT_DOMAIN_LOGIC); | 769 | CTRL_VOLT_DOMAIN_LOGIC); |
777 | if (status < 0) { | 770 | if (status < 0) { |
778 | gk20a_err(dev_from_gk20a(g), | 771 | nvgpu_err(g, |
779 | "failed to get MCLK LOGIC voltage"); | 772 | "failed to get MCLK LOGIC voltage"); |
780 | goto exit_vf_table; | 773 | goto exit_vf_table; |
781 | } | 774 | } |
@@ -784,8 +777,7 @@ static int nvgpu_clk_arb_update_vf_table(struct nvgpu_clk_arb *arb) | |||
784 | &mclk_voltuv_sram, | 777 | &mclk_voltuv_sram, |
785 | CTRL_VOLT_DOMAIN_SRAM); | 778 | CTRL_VOLT_DOMAIN_SRAM); |
786 | if (status < 0) { | 779 | if (status < 0) { |
787 | gk20a_err(dev_from_gk20a(g), | 780 | nvgpu_err(g, "failed to get MCLK SRAM voltage"); |
788 | "failed to get MCLK SRAM voltage"); | ||
789 | goto exit_vf_table; | 781 | goto exit_vf_table; |
790 | } | 782 | } |
791 | 783 | ||
@@ -815,8 +807,7 @@ static int nvgpu_clk_arb_update_vf_table(struct nvgpu_clk_arb *arb) | |||
815 | CTRL_PERF_PSTATE_P5, clkwhich_gpc2clk); | 807 | CTRL_PERF_PSTATE_P5, clkwhich_gpc2clk); |
816 | if (!p5_info) { | 808 | if (!p5_info) { |
817 | status = -EINVAL; | 809 | status = -EINVAL; |
818 | gk20a_err(dev_from_gk20a(g), | 810 | nvgpu_err(g, "failed to get GPC2CLK P5 info"); |
819 | "failed to get GPC2CLK P5 info"); | ||
820 | goto exit_vf_table; | 811 | goto exit_vf_table; |
821 | } | 812 | } |
822 | 813 | ||
@@ -824,8 +815,7 @@ static int nvgpu_clk_arb_update_vf_table(struct nvgpu_clk_arb *arb) | |||
824 | CTRL_PERF_PSTATE_P0, clkwhich_gpc2clk); | 815 | CTRL_PERF_PSTATE_P0, clkwhich_gpc2clk); |
825 | if (!p0_info) { | 816 | if (!p0_info) { |
826 | status = -EINVAL; | 817 | status = -EINVAL; |
827 | gk20a_err(dev_from_gk20a(g), | 818 | nvgpu_err(g, "failed to get GPC2CLK P0 info"); |
828 | "failed to get GPC2CLK P0 info"); | ||
829 | goto exit_vf_table; | 819 | goto exit_vf_table; |
830 | } | 820 | } |
831 | 821 | ||
@@ -847,7 +837,7 @@ static int nvgpu_clk_arb_update_vf_table(struct nvgpu_clk_arb *arb) | |||
847 | setfllclk.gpc2clkmhz = arb->gpc2clk_f_points[i]; | 837 | setfllclk.gpc2clkmhz = arb->gpc2clk_f_points[i]; |
848 | status = clk_get_fll_clks(g, &setfllclk); | 838 | status = clk_get_fll_clks(g, &setfllclk); |
849 | if (status < 0) { | 839 | if (status < 0) { |
850 | gk20a_err(dev_from_gk20a(g), | 840 | nvgpu_err(g, |
851 | "failed to get GPC2CLK slave clocks"); | 841 | "failed to get GPC2CLK slave clocks"); |
852 | goto exit_vf_table; | 842 | goto exit_vf_table; |
853 | } | 843 | } |
@@ -888,8 +878,7 @@ static int nvgpu_clk_arb_update_vf_table(struct nvgpu_clk_arb *arb) | |||
888 | clkwhich_sys2clk); | 878 | clkwhich_sys2clk); |
889 | if (!p5_info) { | 879 | if (!p5_info) { |
890 | status = -EINVAL; | 880 | status = -EINVAL; |
891 | gk20a_err(dev_from_gk20a(g), | 881 | nvgpu_err(g, "failed to get SYS2CLK P5 info"); |
892 | "failed to get SYS2CLK P5 info"); | ||
893 | goto exit_vf_table; | 882 | goto exit_vf_table; |
894 | } | 883 | } |
895 | 884 | ||
@@ -915,8 +904,7 @@ static int nvgpu_clk_arb_update_vf_table(struct nvgpu_clk_arb *arb) | |||
915 | } | 904 | } |
916 | /* no VF exists that satisfies condition */ | 905 | /* no VF exists that satisfies condition */ |
917 | if (j == table->gpc2clk_num_points) { | 906 | if (j == table->gpc2clk_num_points) { |
918 | gk20a_err(dev_from_gk20a(g), | 907 | nvgpu_err(g, "NO SYS2CLK VF point possible"); |
919 | "NO SYS2CLK VF point possible"); | ||
920 | status = -EINVAL; | 908 | status = -EINVAL; |
921 | goto exit_vf_table; | 909 | goto exit_vf_table; |
922 | } | 910 | } |
@@ -928,8 +916,7 @@ static int nvgpu_clk_arb_update_vf_table(struct nvgpu_clk_arb *arb) | |||
928 | clkwhich_xbar2clk); | 916 | clkwhich_xbar2clk); |
929 | if (!p5_info) { | 917 | if (!p5_info) { |
930 | status = -EINVAL; | 918 | status = -EINVAL; |
931 | gk20a_err(dev_from_gk20a(g), | 919 | nvgpu_err(g, "failed to get SYS2CLK P5 info"); |
932 | "failed to get SYS2CLK P5 info"); | ||
933 | goto exit_vf_table; | 920 | goto exit_vf_table; |
934 | } | 921 | } |
935 | 922 | ||
@@ -954,8 +941,7 @@ static int nvgpu_clk_arb_update_vf_table(struct nvgpu_clk_arb *arb) | |||
954 | /* no VF exists that satisfies condition */ | 941 | /* no VF exists that satisfies condition */ |
955 | if (j == table->gpc2clk_num_points) { | 942 | if (j == table->gpc2clk_num_points) { |
956 | status = -EINVAL; | 943 | status = -EINVAL; |
957 | gk20a_err(dev_from_gk20a(g), | 944 | nvgpu_err(g, "NO XBAR2CLK VF point possible"); |
958 | "NO XBAR2CLK VF point possible"); | ||
959 | 945 | ||
960 | goto exit_vf_table; | 946 | goto exit_vf_table; |
961 | } | 947 | } |
@@ -966,8 +952,7 @@ static int nvgpu_clk_arb_update_vf_table(struct nvgpu_clk_arb *arb) | |||
966 | &alt_gpc2clk, &gpc2clk_voltuv, | 952 | &alt_gpc2clk, &gpc2clk_voltuv, |
967 | CTRL_VOLT_DOMAIN_LOGIC); | 953 | CTRL_VOLT_DOMAIN_LOGIC); |
968 | if (status < 0) { | 954 | if (status < 0) { |
969 | gk20a_err(dev_from_gk20a(g), | 955 | nvgpu_err(g, "failed to get GPC2CLK LOGIC voltage"); |
970 | "failed to get GPC2CLK LOGIC voltage"); | ||
971 | goto exit_vf_table; | 956 | goto exit_vf_table; |
972 | } | 957 | } |
973 | 958 | ||
@@ -976,8 +961,7 @@ static int nvgpu_clk_arb_update_vf_table(struct nvgpu_clk_arb *arb) | |||
976 | &gpc2clk_voltuv_sram, | 961 | &gpc2clk_voltuv_sram, |
977 | CTRL_VOLT_DOMAIN_SRAM); | 962 | CTRL_VOLT_DOMAIN_SRAM); |
978 | if (status < 0) { | 963 | if (status < 0) { |
979 | gk20a_err(dev_from_gk20a(g), | 964 | nvgpu_err(g, "failed to get GPC2CLK SRAM voltage"); |
980 | "failed to get GPC2CLK SRAM voltage"); | ||
981 | goto exit_vf_table; | 965 | goto exit_vf_table; |
982 | } | 966 | } |
983 | 967 | ||
@@ -1017,8 +1001,7 @@ static void nvgpu_clk_arb_run_vf_table_cb(struct work_struct *work) | |||
1017 | /* get latest vf curve from pmu */ | 1001 | /* get latest vf curve from pmu */ |
1018 | err = clk_vf_point_cache(g); | 1002 | err = clk_vf_point_cache(g); |
1019 | if (err) { | 1003 | if (err) { |
1020 | gk20a_err(dev_from_gk20a(g), | 1004 | nvgpu_err(g, "failed to cache VF table"); |
1021 | "failed to cache VF table"); | ||
1022 | nvgpu_clk_arb_set_global_alarm(g, | 1005 | nvgpu_clk_arb_set_global_alarm(g, |
1023 | EVENT(ALARM_VF_TABLE_UPDATE_FAILED)); | 1006 | EVENT(ALARM_VF_TABLE_UPDATE_FAILED)); |
1024 | if (arb->update_work_queue) | 1007 | if (arb->update_work_queue) |
@@ -1288,8 +1271,7 @@ static void nvgpu_clk_arb_run_arbiter_cb(struct work_struct *work) | |||
1288 | 1271 | ||
1289 | exit_arb: | 1272 | exit_arb: |
1290 | if (status < 0) { | 1273 | if (status < 0) { |
1291 | gk20a_err(dev_from_gk20a(g), | 1274 | nvgpu_err(g, "Error in arbiter update"); |
1292 | "Error in arbiter update"); | ||
1293 | nvgpu_clk_arb_set_global_alarm(g, | 1275 | nvgpu_clk_arb_set_global_alarm(g, |
1294 | EVENT(ALARM_CLOCK_ARBITER_FAILED)); | 1276 | EVENT(ALARM_CLOCK_ARBITER_FAILED)); |
1295 | } | 1277 | } |
@@ -1856,7 +1838,7 @@ static u8 nvgpu_clk_arb_find_vf_point(struct nvgpu_clk_arb *arb, | |||
1856 | if (!table) | 1838 | if (!table) |
1857 | continue; | 1839 | continue; |
1858 | if ((!table->gpc2clk_num_points) || (!table->mclk_num_points)) { | 1840 | if ((!table->gpc2clk_num_points) || (!table->mclk_num_points)) { |
1859 | gk20a_err(dev_from_gk20a(arb->g), "found empty table"); | 1841 | nvgpu_err(arb->g, "found empty table"); |
1860 | goto find_exit; | 1842 | goto find_exit; |
1861 | } | 1843 | } |
1862 | /* First we check MCLK to find out which PSTATE we are | 1844 | /* First we check MCLK to find out which PSTATE we are |