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authorDavid Nieto <dmartineznie@nvidia.com>2016-10-07 19:25:04 -0400
committerDeepak Nibade <dnibade@nvidia.com>2016-12-27 04:56:52 -0500
commitc4bb19d46e1c9121a0948fa506098cbf2f64e2a6 (patch)
tree29647922e8374377c05ab976c7616410d85eda4d /drivers/gpu/nvgpu/clk/clk.h
parentbfc12d25a41c2b5a4d06f233f16331e43c489d8e (diff)
nvgpu: gpu: arbiter for vf switch management
JIRA DNVGPU-143 The arbiter is charged with selecting the proper frequencies when multiple applications submit simultaneously clock change requests On the current implementation, the arbiter guarantees that the selected frequency will be always higher or equal to the request, as long as the request is in range. The current code is not yet realtime friendly, as requests are not pre-allocated. Summary of changes: (1) pstate/vf switch no longer selects boot frequency (2) changed mclk code change to accept input freq (3) added arbiter (4) now a single session can submit concurrent requests the last request is the one that applies for that session (5) modified locking mechanism to reduce lock contention (6) Added callback to notify the arbiter that the VF table has changed and is no longer valid (PMU/Thermals must call this when VF table is invalid) (7) changed internal API to work with MHz (8) added debugfs for stats Change-Id: I6a7b05c9447761e8536f84ef86b5ab0793164d63 Signed-off-by: David Nieto <dmartineznie@nvidia.com> Reviewed-on: http://git-master/r/1239461 Reviewed-by: Thomas Fleury <tfleury@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1267120 Reviewed-by: Automatic_Commit_Validation_User
Diffstat (limited to 'drivers/gpu/nvgpu/clk/clk.h')
-rw-r--r--drivers/gpu/nvgpu/clk/clk.h1
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/clk/clk.h b/drivers/gpu/nvgpu/clk/clk.h
index a0b88dcb..d0e82173 100644
--- a/drivers/gpu/nvgpu/clk/clk.h
+++ b/drivers/gpu/nvgpu/clk/clk.h
@@ -119,6 +119,5 @@ u32 clk_domain_get_f_points(
119 u32 *fpointscount, 119 u32 *fpointscount,
120 u16 *freqpointsinmhz 120 u16 *freqpointsinmhz
121); 121);
122int clk_set_boot_fll_clk(struct gk20a *g);
123int clk_program_fll_clks(struct gk20a *g, struct change_fll_clk *fllclk); 122int clk_program_fll_clks(struct gk20a *g, struct change_fll_clk *fllclk);
124#endif 123#endif