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authorsmadhavan <smadhavan@nvidia.com>2018-09-11 02:36:17 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-09-14 02:45:22 -0400
commita605a09e2a74f31abc3755a6e383311317e3b909 (patch)
tree553a802073c55e7bd51f7ac7ecf984008bffe480 /drivers/gpu/nvgpu/clk/clk.h
parent852d77ffafdb8726a8e3cb1cc45cb63b90cb4c3c (diff)
nvgpu: clk: MISRA Rule 21.2 header guard fixes
MISRA rule 21.2 doesn't allow the use of macro names which start with an underscore. These leading underscores are to be removed from the macro names. This patch will fix such violations in clk by renaming them to follow the convention, 'NVGPU_PARENT-DIR_HEADER-NAME' when there is no keyword repetition between file name and directory or 'NVGPU_HEADER-NAME' when there is repetition. JIRA NVGPU-1028 Change-Id: I5305066dffcfb03e3c99fb501e783dcc70765b11 Signed-off-by: smadhavan <smadhavan@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1809069 Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-by: Adeel Raza <araza@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/clk/clk.h')
-rw-r--r--drivers/gpu/nvgpu/clk/clk.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/clk/clk.h b/drivers/gpu/nvgpu/clk/clk.h
index 0a0d9c98..5a6aeae3 100644
--- a/drivers/gpu/nvgpu/clk/clk.h
+++ b/drivers/gpu/nvgpu/clk/clk.h
@@ -21,8 +21,8 @@
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE. 22 * DEALINGS IN THE SOFTWARE.
23 */ 23 */
24#ifndef _CLK_H_ 24#ifndef NVGPU_CLK_H
25#define _CLK_H_ 25#define NVGPU_CLK_H
26 26
27#include "clk_vin.h" 27#include "clk_vin.h"
28#include "clk_fll.h" 28#include "clk_fll.h"
@@ -140,4 +140,4 @@ u32 nvgpu_clk_vf_change_inject_data_fill_gp10x(struct gk20a *g,
140u32 nvgpu_clk_set_boot_fll_clk_gv10x(struct gk20a *g); 140u32 nvgpu_clk_set_boot_fll_clk_gv10x(struct gk20a *g);
141int clk_pmu_freq_effective_avg_load(struct gk20a *g, bool bload); 141int clk_pmu_freq_effective_avg_load(struct gk20a *g, bool bload);
142u32 clk_freq_effective_avg(struct gk20a *g, u32 clkDomainMask); 142u32 clk_freq_effective_avg(struct gk20a *g, u32 clkDomainMask);
143#endif 143#endif /* NVGPU_CLK_H */