diff options
author | Debarshi Dutta <ddutta@nvidia.com> | 2018-06-26 06:11:12 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-09-04 10:25:41 -0400 |
commit | 16ad9f537979c5f3717fc5781b1c2fad22a76f96 (patch) | |
tree | 2a150c50983180051fa5ecc942764e081961d787 /drivers/gpu/nvgpu/clk/clk.h | |
parent | f125d1b681c324d5d58abcc42fac1301e1faa921 (diff) |
gpu: nvgpu: move gp106 specific clk_arbiter code into HAL
Currently, clock arbiter code is extensively using dgpu specific
implementation. This patch restructures the clk_arbiter code and moves
gp106 specific code into HAL. Following changes are made in this patch
1) clk_domain_get_f_points is now invoked via HAL for gp106 i.e.
g->ops.clk.clk_domain_get_f_points.
2) moved nvgpu_clk_arb_change_vf_point and other related static
functions to clk_arb_gp106.c.
3) Instead of only checking if get_arbiter_clk_domain is empty, a
check for support_clk_freq_controller is also added. This is to enable
the clk_arbiter based on support from both the OS and the chips.
Bug 2061372
Change-Id: I65b0a4e02145a86fbbfb420ed591b1fa3c86f6dc
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1774279
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/clk/clk.h')
-rw-r--r-- | drivers/gpu/nvgpu/clk/clk.h | 8 |
1 files changed, 1 insertions, 7 deletions
diff --git a/drivers/gpu/nvgpu/clk/clk.h b/drivers/gpu/nvgpu/clk/clk.h index cd65f6f5..afff6963 100644 --- a/drivers/gpu/nvgpu/clk/clk.h +++ b/drivers/gpu/nvgpu/clk/clk.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * general clock structures & definitions | 2 | * general clock structures & definitions |
3 | * | 3 | * |
4 | * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * Permission is hereby granted, free of charge, to any person obtaining a | 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
7 | * copy of this software and associated documentation files (the "Software"), | 7 | * copy of this software and associated documentation files (the "Software"), |
@@ -127,12 +127,6 @@ u32 clk_domain_get_f_or_v( | |||
127 | u32 *pvoltuv, | 127 | u32 *pvoltuv, |
128 | u8 railidx | 128 | u8 railidx |
129 | ); | 129 | ); |
130 | u32 clk_domain_get_f_points( | ||
131 | struct gk20a *g, | ||
132 | u32 clkapidomain, | ||
133 | u32 *fpointscount, | ||
134 | u16 *freqpointsinmhz | ||
135 | ); | ||
136 | int clk_get_fll_clks(struct gk20a *g, struct set_fll_clk *fllclk); | 130 | int clk_get_fll_clks(struct gk20a *g, struct set_fll_clk *fllclk); |
137 | int clk_set_fll_clks(struct gk20a *g, struct set_fll_clk *fllclk); | 131 | int clk_set_fll_clks(struct gk20a *g, struct set_fll_clk *fllclk); |
138 | int clk_pmu_freq_controller_load(struct gk20a *g, bool bload, u8 bit_idx); | 132 | int clk_pmu_freq_controller_load(struct gk20a *g, bool bload, u8 bit_idx); |