gpu: nvgpu: construct/load tabels & set voltage

- Read voltage tables from VBIOS & construct
  then send to PMU.
- compare & set voltage based on
  mclk/gpc2clk clk, take higher voltage
  between two & set.

JIRA DNVGPU-122

Change-Id: I23e7b101a3b1c1b6596620fc6b8319c70bd9a488
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1224365
(cherry picked from commit e0055c3ec798b8312df3fa9bf92bde8c57c6f58c)
Reviewed-on: http://git-master/r/1244657
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 30 insertions, 3 deletions

diff --git a/drivers/gpu/nvgpu/clk/clk.c b/drivers/gpu/nvgpu/clk/clk.c
index 918cd43c..ce071018 100644
--- a/drivers/gpu/nvgpu/clk/clk.c
+++ b/drivers/gpu/nvgpu/clk/clk.c
@@ -17,8 +17,12 @@
 #include "pmuif/gpmuifvolt.h"
 #include "ctrl/ctrlclk.h"
 #include "ctrl/ctrlvolt.h"
+#include "volt/volt.h"
 #include "gk20a/pmu_gk20a.h"
 
+#define BOOT_GPC2CLK_MHZ  2581
+#define BOOT_MCLK_MHZ     3003
+
 struct clkrpc_pmucmdhandler_params {
         struct nv_pmu_clk_rpc *prpccall;
         u32 success;
@@ -382,15 +386,38 @@ int clk_set_boot_fll_clk(struct gk20a *g)
 {
         int status;
         struct change_fll_clk bootfllclk;
+        u16 gpc2clk_clkmhz = BOOT_GPC2CLK_MHZ;
+        u32 gpc2clk_voltuv = 0;
+        u16 mclk_clkmhz = BOOT_MCLK_MHZ;
+        u32 mclk_voltuv = 0;
+        u32 voltuv = 0;
 
         mutex_init(&g->clk_pmu.changeclkmutex);
 
+        clk_domain_get_f_or_v(g, CTRL_CLK_DOMAIN_GPC2CLK, &gpc2clk_clkmhz,
+                        &gpc2clk_voltuv);
+        clk_domain_get_f_or_v(g, CTRL_CLK_DOMAIN_MCLK, &mclk_clkmhz,
+                        &mclk_voltuv);
+
+        voltuv = ((gpc2clk_voltuv) > (mclk_voltuv)) ? (gpc2clk_voltuv)
+                        : (mclk_voltuv);
+
+        status = volt_set_voltage(g, voltuv, voltuv);
+        if (status)
+                gk20a_err(dev_from_gk20a(g), "attempt to set boot voltage failed %d",
+                        voltuv);
+
         bootfllclk.api_clk_domain = CTRL_CLK_DOMAIN_GPC2CLK;
-        bootfllclk.clkmhz = 2581;
-        bootfllclk.voltuv = 825000;
+        bootfllclk.clkmhz = gpc2clk_clkmhz;
+        bootfllclk.voltuv = voltuv;
         status = clk_program_fllclks(g, &bootfllclk);
         if (status)
-                gk20a_err(dev_from_gk20a(g), "attemp to set boot clk failed");
+                gk20a_err(dev_from_gk20a(g), "attempt to set boot gpc2clk failed");
+
+        status = g->clk_pmu.clk_mclk.change(g, DEFAULT_BOOT_MCLK_SPEED);
+        if (status)
+                gk20a_err(dev_from_gk20a(g), "attempt to set boot mclk failed");
+
         return status;
 }