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authorVijayakumar <vsubbu@nvidia.com>2016-08-31 08:10:24 -0400
committerDeepak Nibade <dnibade@nvidia.com>2016-12-27 04:56:50 -0500
commit1b1090512020369df18dbe36336ac5a85d2cd693 (patch)
tree41f3a11dbdff21815545e0e69734c60416783e5e /drivers/gpu/nvgpu/clk/clk.c
parente28ef73ec9baea7df631606298f8c210dc8f31a8 (diff)
gpu: nvgpu: support to parse VF table
JIRA DNVGPU-123 function was added to retrieve V for F or F for V for a given clock domain. Clock domain can be master or slave. F or V can be intermediate point between two successive V or F values in VF table. VF table should be cached before calling this function. A F value below Fmin will return Vmin. F > Fmax will return error A V value above Vmax wil return F max. A V value below Vmin will return error. Change-Id: I28b4e8647510c6933e9e1204cfff31d74616e11a Signed-off-by: Vijayakumar <vsubbu@nvidia.com> Reviewed-on: http://git-master/r/1211234 (cherry-picked from commit 5b83b03f2454fbec8d49a064ed09b09c92d3e9fa) Reviewed-on: http://git-master/r/1235054 Reviewed-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/clk/clk.c')
-rw-r--r--drivers/gpu/nvgpu/clk/clk.c48
1 files changed, 48 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/clk/clk.c b/drivers/gpu/nvgpu/clk/clk.c
index 0679efc0..34b344c8 100644
--- a/drivers/gpu/nvgpu/clk/clk.c
+++ b/drivers/gpu/nvgpu/clk/clk.c
@@ -188,3 +188,51 @@ u32 clk_pmu_vf_inject(struct gk20a *g)
188done: 188done:
189 return status; 189 return status;
190} 190}
191
192u32 clk_domain_print_vf_table(struct gk20a *g, u32 clkapidomain)
193{
194 u32 status = -EINVAL;
195 struct clk_domain *pdomain;
196 u8 i;
197 struct clk_pmupstate *pclk = &g->clk_pmu;
198 u16 clkmhz = 0;
199 u32 volt = 0;
200
201 BOARDOBJGRP_FOR_EACH(&(pclk->clk_domainobjs.super.super),
202 struct clk_domain *, pdomain, i) {
203 if (pdomain->api_domain == clkapidomain) {
204 status = pdomain->clkdomainclkvfsearch(g, pclk,
205 pdomain, &clkmhz, &volt,
206 CLK_PROG_VFE_ENTRY_LOGIC);
207 return status;
208 }
209 }
210 return status;
211}
212
213u32 clk_domain_get_f_or_v(
214 struct gk20a *g,
215 u32 clkapidomain,
216 u16 *pclkmhz,
217 u32 *pvoltuv
218)
219{
220 u32 status = -EINVAL;
221 struct clk_domain *pdomain;
222 u8 i;
223 struct clk_pmupstate *pclk = &g->clk_pmu;
224
225 if ((pclkmhz == NULL) || (pvoltuv == NULL))
226 return -EINVAL;
227
228 BOARDOBJGRP_FOR_EACH(&(pclk->clk_domainobjs.super.super),
229 struct clk_domain *, pdomain, i) {
230 if (pdomain->api_domain == clkapidomain) {
231 status = pdomain->clkdomainclkvfsearch(g, pclk,
232 pdomain, pclkmhz, pvoltuv,
233 CLK_PROG_VFE_ENTRY_LOGIC);
234 return status;
235 }
236 }
237 return status;
238}