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authorMahantesh Kumbar <mkumbar@nvidia.com>2018-09-10 11:41:49 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-09-24 11:12:03 -0400
commit863b47064445b3dd5cdc354821c8d3d14deade33 (patch)
tree1e53f26c1549d1970d752f74ab82a4d55642620b /drivers/gpu/nvgpu/boardobj
parentfdf77eda18b59c305d4dd8436d8b09d42ec4718a (diff)
gpu: nvgpu: PMU init sequence change
-Moved PMU RTOS init & start RTOS from acr_gm20b.c file pmu.c method nvgpu_init_pmu_support() -Modified nvgpu_init_pmu_support() to init required interface for PMU RTOS & does start PMU RTOS in secure & non-secure based on NVGPU_SEC_PRIVSECURITY flag. -Created secured_pmu_start ops under PMU ops to start PMU falcon in low secure mode. -Updated PMU ops update_lspmu_cmdline_args, setup_apertures & secured_pmu_start assignment for gp106 & gv100 to support modified PMU init sequence. -Removed duplicate PMU non-secure bootstrap code from multiple files & defined gm20b_ns_pmu_setup_hw_and_bootstrap()method to handle non secure PMU bootstrap, reused this method for need chips. JIRA NVGPU-1146 Change-Id: I3957da2936b3c4ea0c985e67802c847c38de7c89 Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1818099 Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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