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authorSrirangan <smadhavan@nvidia.com>2018-08-02 05:47:55 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-08-10 01:28:15 -0400
commit6b26d233499f9d447f06e8e72c72ed6728762e37 (patch)
treed983b078e372165b44e51d119e9b4b61ac9bbc1c /drivers/gpu/nvgpu/boardobj
parent9c13b30a465ed94f1e3547dc439462c3ea496eb8 (diff)
gpu: nvgpu: Fix MISRA 15.6 violations
MISRA Rule-15.6 requires that all loop bodies must be enclosed in braces including single statement loop bodies. This patch fix the MISRA violations due to single statement loop bodies without braces by adding them. JIRA NVGPU-989 Change-Id: If79f56f92b94d0114477b66a6f654ac16ee8ea27 Signed-off-by: Srirangan <smadhavan@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1791194 Reviewed-by: Adeel Raza <araza@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/boardobj')
-rw-r--r--drivers/gpu/nvgpu/boardobj/boardobjgrp.h5
-rw-r--r--drivers/gpu/nvgpu/boardobj/boardobjgrpmask.c29
2 files changed, 22 insertions, 12 deletions
diff --git a/drivers/gpu/nvgpu/boardobj/boardobjgrp.h b/drivers/gpu/nvgpu/boardobj/boardobjgrp.h
index 912c2c98..3c28963c 100644
--- a/drivers/gpu/nvgpu/boardobj/boardobjgrp.h
+++ b/drivers/gpu/nvgpu/boardobj/boardobjgrp.h
@@ -376,8 +376,9 @@ void boardobjgrpe32hdrset(struct nv_pmu_boardobjgrp *hdr, u32 objmask);
376#define HIGHESTBITIDX_32(n32) \ 376#define HIGHESTBITIDX_32(n32) \
377{ \ 377{ \
378 u32 count = 0; \ 378 u32 count = 0; \
379 while (n32 >>= 1) \ 379 while (n32 >>= 1) { \
380 count++; \ 380 count++; \
381 } \
381 n32 = count; \ 382 n32 = count; \
382} 383}
383 384
diff --git a/drivers/gpu/nvgpu/boardobj/boardobjgrpmask.c b/drivers/gpu/nvgpu/boardobj/boardobjgrpmask.c
index 93befc99..849abe16 100644
--- a/drivers/gpu/nvgpu/boardobj/boardobjgrpmask.c
+++ b/drivers/gpu/nvgpu/boardobj/boardobjgrpmask.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. 2 * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
3 * 3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a 4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"), 5 * copy of this software and associated documentation files (the "Software"),
@@ -63,8 +63,9 @@ u32 boardobjgrpmask_import(struct boardobjgrpmask *mask, u8 bitsize,
63 if (mask->bitcount != bitsize) 63 if (mask->bitcount != bitsize)
64 return -EINVAL; 64 return -EINVAL;
65 65
66 for (index = 0; index < mask->maskdatacount; index++) 66 for (index = 0; index < mask->maskdatacount; index++) {
67 mask->data[index] = extmask->data[index]; 67 mask->data[index] = extmask->data[index];
68 }
68 69
69 BOARDOBJGRPMASK_NORMALIZE(mask); 70 BOARDOBJGRPMASK_NORMALIZE(mask);
70 71
@@ -83,8 +84,9 @@ u32 boardobjgrpmask_export(struct boardobjgrpmask *mask, u8 bitsize,
83 if (mask->bitcount != bitsize) 84 if (mask->bitcount != bitsize)
84 return -EINVAL; 85 return -EINVAL;
85 86
86 for (index = 0; index < mask->maskdatacount; index++) 87 for (index = 0; index < mask->maskdatacount; index++) {
87 extmask->data[index] = mask->data[index]; 88 extmask->data[index] = mask->data[index];
89 }
88 90
89 return 0; 91 return 0;
90} 92}
@@ -95,8 +97,9 @@ u32 boardobjgrpmask_clr(struct boardobjgrpmask *mask)
95 97
96 if (mask == NULL) 98 if (mask == NULL)
97 return -EINVAL; 99 return -EINVAL;
98 for (index = 0; index < mask->maskdatacount; index++) 100 for (index = 0; index < mask->maskdatacount; index++) {
99 mask->data[index] = 0; 101 mask->data[index] = 0;
102 }
100 103
101 return 0; 104 return 0;
102} 105}
@@ -107,8 +110,9 @@ u32 boardobjgrpmask_set(struct boardobjgrpmask *mask)
107 110
108 if (mask == NULL) 111 if (mask == NULL)
109 return -EINVAL; 112 return -EINVAL;
110 for (index = 0; index < mask->maskdatacount; index++) 113 for (index = 0; index < mask->maskdatacount; index++) {
111 mask->data[index] = 0xFFFFFFFF; 114 mask->data[index] = 0xFFFFFFFF;
115 }
112 BOARDOBJGRPMASK_NORMALIZE(mask); 116 BOARDOBJGRPMASK_NORMALIZE(mask);
113 return 0; 117 return 0;
114} 118}
@@ -119,8 +123,9 @@ u32 boardobjgrpmask_inv(struct boardobjgrpmask *mask)
119 123
120 if (mask == NULL) 124 if (mask == NULL)
121 return -EINVAL; 125 return -EINVAL;
122 for (index = 0; index < mask->maskdatacount; index++) 126 for (index = 0; index < mask->maskdatacount; index++) {
123 mask->data[index] = ~mask->data[index]; 127 mask->data[index] = ~mask->data[index];
128 }
124 BOARDOBJGRPMASK_NORMALIZE(mask); 129 BOARDOBJGRPMASK_NORMALIZE(mask);
125 return 0; 130 return 0;
126} 131}
@@ -281,8 +286,9 @@ u32 boardobjgrpmask_and(struct boardobjgrpmask *dst,
281 if (!boardobjgrpmask_sizeeq(dst, op2)) 286 if (!boardobjgrpmask_sizeeq(dst, op2))
282 return -EINVAL; 287 return -EINVAL;
283 288
284 for (index = 0; index < dst->maskdatacount; index++) 289 for (index = 0; index < dst->maskdatacount; index++) {
285 dst->data[index] = op1->data[index] & op2->data[index]; 290 dst->data[index] = op1->data[index] & op2->data[index];
291 }
286 292
287 return 0; 293 return 0;
288} 294}
@@ -298,8 +304,9 @@ u32 boardobjgrpmask_or(struct boardobjgrpmask *dst,
298 if (!boardobjgrpmask_sizeeq(dst, op2)) 304 if (!boardobjgrpmask_sizeeq(dst, op2))
299 return -EINVAL; 305 return -EINVAL;
300 306
301 for (index = 0; index < dst->maskdatacount; index++) 307 for (index = 0; index < dst->maskdatacount; index++) {
302 dst->data[index] = op1->data[index] | op2->data[index]; 308 dst->data[index] = op1->data[index] | op2->data[index];
309 }
303 310
304 return 0; 311 return 0;
305} 312}
@@ -315,8 +322,9 @@ u32 boardobjgrpmask_xor(struct boardobjgrpmask *dst,
315 if (!boardobjgrpmask_sizeeq(dst, op2)) 322 if (!boardobjgrpmask_sizeeq(dst, op2))
316 return -EINVAL; 323 return -EINVAL;
317 324
318 for (index = 0; index < dst->maskdatacount; index++) 325 for (index = 0; index < dst->maskdatacount; index++) {
319 dst->data[index] = op1->data[index] ^ op2->data[index]; 326 dst->data[index] = op1->data[index] ^ op2->data[index];
327 }
320 328
321 return 0; 329 return 0;
322} 330}
@@ -329,8 +337,9 @@ u32 boardobjgrpmask_copy(struct boardobjgrpmask *dst,
329 if (!boardobjgrpmask_sizeeq(dst, src)) 337 if (!boardobjgrpmask_sizeeq(dst, src))
330 return -EINVAL; 338 return -EINVAL;
331 339
332 for (index = 0; index < dst->maskdatacount; index++) 340 for (index = 0; index < dst->maskdatacount; index++) {
333 dst->data[index] = src->data[index]; 341 dst->data[index] = src->data[index];
342 }
334 343
335 return 0; 344 return 0;
336} 345}