gpu: nvgpu: cleanup return types for MISRA 10.3

This is a big cleanup of return types across a number of modules in the
nvgpu driver. Many functions were returning u32 but using negative
return codes. This is a MISRA 10.3 violation by assigning signed values
to a u32.

JIRA NVGPU-647

Change-Id: I59ee66706321f5b5b1a07ed8c24b81583e9ba28c
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1810743
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 2 insertions, 2 deletions

diff --git a/drivers/gpu/nvgpu/boardobj/boardobjgrpmask.c b/drivers/gpu/nvgpu/boardobj/boardobjgrpmask.c
index c3f4f4a5..d957467b 100644
--- a/drivers/gpu/nvgpu/boardobj/boardobjgrpmask.c
+++ b/drivers/gpu/nvgpu/boardobj/boardobjgrpmask.c
@@ -221,7 +221,7 @@ u8 boardobjgrpmask_bitidxhighest(struct boardobjgrpmask *mask)
         return result;
 }
 
-u32 boardobjgrpmask_bitclr(struct boardobjgrpmask *mask, u8 bitidx)
+int boardobjgrpmask_bitclr(struct boardobjgrpmask *mask, u8 bitidx)
 {
         u8 index;
         u8 offset;
@@ -241,7 +241,7 @@ u32 boardobjgrpmask_bitclr(struct boardobjgrpmask *mask, u8 bitidx)
         return 0;
 }
 
-u32 boardobjgrpmask_bitset(struct boardobjgrpmask *mask, u8 bitidx)
+int boardobjgrpmask_bitset(struct boardobjgrpmask *mask, u8 bitidx)
 {
         u8 index;
         u8 offset;