diff options
author | Mahantesh Kumbar <mkumbar@nvidia.com> | 2017-05-12 01:54:31 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-06-13 05:40:15 -0400 |
commit | 8c66aef3bdbfbbeb1d3c3ef3bd6b1bee3ac05411 (patch) | |
tree | 80b8135576c2419887dc18d588c2efd493600ab2 /drivers/gpu/nvgpu/boardobj/boardobjgrp.c | |
parent | 69dee6a648ad434b75e1a9c64b022ee45d3ff87b (diff) |
gpu: nvgpu: reorganize PMU FB alloc/free
Moved PMU FB access related code from pmu_gk20a.c to
"drivers/gpu/nvgpu/common/pmu/pmu.c" file
- Prepended with nvgpu_ for global functions & replaced
wherever used.
JIRA NVGPU-56
JIRA NVGPU-94
Change-Id: I42bfd9d216e6b35672a9738f01302d954b32b69e
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1480551
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/boardobj/boardobjgrp.c')
-rw-r--r-- | drivers/gpu/nvgpu/boardobj/boardobjgrp.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/nvgpu/boardobj/boardobjgrp.c b/drivers/gpu/nvgpu/boardobj/boardobjgrp.c index 51c23589..b3e1354d 100644 --- a/drivers/gpu/nvgpu/boardobj/boardobjgrp.c +++ b/drivers/gpu/nvgpu/boardobj/boardobjgrp.c | |||
@@ -172,7 +172,7 @@ u32 boardobjgrp_pmucmd_pmuinithandle_impl(struct gk20a *g, | |||
172 | if (pcmd->id == BOARDOBJGRP_GRP_CMD_ID_INVALID) | 172 | if (pcmd->id == BOARDOBJGRP_GRP_CMD_ID_INVALID) |
173 | goto boardobjgrp_pmucmd_pmuinithandle_exit; | 173 | goto boardobjgrp_pmucmd_pmuinithandle_exit; |
174 | 174 | ||
175 | gk20a_pmu_sysmem_surface_alloc(g, sysmem_desc, pcmd->fbsize); | 175 | nvgpu_pmu_sysmem_surface_alloc(g, sysmem_desc, pcmd->fbsize); |
176 | /* we only have got sysmem later this will get copied to vidmem | 176 | /* we only have got sysmem later this will get copied to vidmem |
177 | surface*/ | 177 | surface*/ |
178 | pcmd->surf.vidmem_desc.size = 0; | 178 | pcmd->surf.vidmem_desc.size = 0; |
@@ -401,7 +401,7 @@ u32 boardobjgrp_pmuset_impl(struct gk20a *g, struct boardobjgrp *pboardobjgrp) | |||
401 | * sysmem to vidmem | 401 | * sysmem to vidmem |
402 | */ | 402 | */ |
403 | if (pcmd->surf.vidmem_desc.size == 0) { | 403 | if (pcmd->surf.vidmem_desc.size == 0) { |
404 | gk20a_pmu_vidmem_surface_alloc(g, &pcmd->surf.vidmem_desc, | 404 | nvgpu_pmu_vidmem_surface_alloc(g, &pcmd->surf.vidmem_desc, |
405 | pcmd->fbsize); | 405 | pcmd->fbsize); |
406 | } | 406 | } |
407 | nvgpu_mem_wr_n(g, &pcmd->surf.vidmem_desc, 0, pcmd->buf, pcmd->fbsize); | 407 | nvgpu_mem_wr_n(g, &pcmd->surf.vidmem_desc, 0, pcmd->buf, pcmd->fbsize); |
@@ -466,7 +466,7 @@ boardobjgrp_pmugetstatus_impl(struct gk20a *g, struct boardobjgrp *pboardobjgrp, | |||
466 | * sysmem to vidmem | 466 | * sysmem to vidmem |
467 | */ | 467 | */ |
468 | if (pcmd->surf.vidmem_desc.size == 0) { | 468 | if (pcmd->surf.vidmem_desc.size == 0) { |
469 | gk20a_pmu_vidmem_surface_alloc(g, &pcmd->surf.vidmem_desc, | 469 | nvgpu_pmu_vidmem_surface_alloc(g, &pcmd->surf.vidmem_desc, |
470 | pcmd->fbsize); | 470 | pcmd->fbsize); |
471 | } | 471 | } |
472 | 472 | ||
@@ -726,7 +726,7 @@ static u32 boardobjgrp_pmucmdsend(struct gk20a *g, | |||
726 | /* | 726 | /* |
727 | * copy vidmem information to boardobj_cmd_grp | 727 | * copy vidmem information to boardobj_cmd_grp |
728 | */ | 728 | */ |
729 | gk20a_pmu_surface_describe(g, &pcmd->surf.vidmem_desc, | 729 | nvgpu_pmu_surface_describe(g, &pcmd->surf.vidmem_desc, |
730 | &pgrpcmd->grp.fb); | 730 | &pgrpcmd->grp.fb); |
731 | 731 | ||
732 | /* | 732 | /* |