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author | Peter Boonstoppel <pboonstoppel@nvidia.com> | 2016-10-07 18:30:59 -0400 |
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committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2016-11-15 15:30:06 -0500 |
commit | 01e61860fafbc0ee045c2db931a79f6c0d5300aa (patch) | |
tree | 83c8da282d83fd8d9edc441d561dede6b9a8dece /drivers/gpu/nvgpu/acr.h | |
parent | 3a6d47db9d00f86d90a1230dd2225bf4ae8944b8 (diff) |
gpu: nvgpu: gm20b expose gpcclk through CCF
Register gpcclk with Common Clock Framework to expose GPCPLL frequency
control
Bug 200233943
Change-Id: Id6f7bbaca15f22157b91b092c2a035af933fa71e
Signed-off-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-on: http://git-master/r/1236979
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/acr.h')
0 files changed, 0 insertions, 0 deletions