gpu: nvgpu: gv100: support clock gating

-Generated list for addr/value pairs using
 gen_gating_reglist.pl  --target_ip=gv100 --soc=t194
-Comment out addresses triggering priv/pbus errors

Bug 200399393

Change-Id: Ica0fd65070a7100f20afa32184f4a2e3cad6d0c2
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1683101
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 1 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/Makefile b/drivers/gpu/nvgpu/Makefile
index 418b7ea3..53de45b9 100644
--- a/drivers/gpu/nvgpu/Makefile
+++ b/drivers/gpu/nvgpu/Makefile
@@ -264,6 +264,7 @@ nvgpu-y += \
         gv100/nvlink_gv100.o \
         gv100/hal_gv100.o \
         gv100/pmu_gv100.o \
+        gv100/gv100_gating_reglist.o \
         pstate/pstate.o \
         clk/clk_vin.o \
         clk/clk_fll.o \