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authorAnton Vorontsov <avorontsov@nvidia.com>2015-08-19 17:27:51 -0400
committerTerje Bergstrom <tbergstrom@nvidia.com>2016-03-23 10:48:47 -0400
commit1c40d09c4c9c011c1318c328c0b4b6b17d1f537e (patch)
tree8b93fcd00739f9ada9302f06175278c9cb1d6785 /drivers/gpu/nvgpu/Makefile
parent82da6ed595a87c8a3038eecd75880ab21dd4c5de (diff)
gpu: nvgpu: Add support for FECS ctxsw tracing
bug 1648908 This commit adds support for FECS ctxsw tracing. Code is compiled conditionnaly under CONFIG_GK20_CTXSW_TRACE. This feature requires an updated FECS ucode that writes one record to a ring buffer on each context switch. On RM/Kernel side, the GPU driver reads records from the master ring buffer and generates trace entries into a user-facing VM ring buffer. For each record in the master ring buffer, RM/Kernel has to retrieve the vmid+pid of the user process that submitted related work. Features currently implemented: - master ring buffer allocation - debugfs to dump master ring buffer - FECS record per context switch (with both current and new contexts) - dedicated device for ctxsw tracing (access to VM ring buffer) - SOF generation (and access to PTIMER) - VM ring buffer allocation, and reconfiguration - enable/disable tracing at user level - event-based trace filtering - context_ptr to vmid+pid mapping - read system call for ctxsw dev - mmap system call for ctxsw dev (direct access to VM ring buffer) - poll system call for ctxsw dev - save/restore register on ELPG/CG6 - separate user ring from FECS ring handling Features requiring ucode changes: - enable/disable tracing at FECS level - actual busy time on engine (bug 1642354) - master ring buffer threshold interrupt (P1) - API for GPU to CPU timestamp conversion (P1) - vmid/pid/uid based filtering (P1) Change-Id: I8e39c648221ee0fa09d5df8524b03dca83fe24f3 Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: http://git-master/r/1022737 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/Makefile')
-rw-r--r--drivers/gpu/nvgpu/Makefile4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/Makefile b/drivers/gpu/nvgpu/Makefile
index 932dde1a..df660eb7 100644
--- a/drivers/gpu/nvgpu/Makefile
+++ b/drivers/gpu/nvgpu/Makefile
@@ -46,6 +46,8 @@ nvgpu-y := \
46 gk20a/cde_gk20a.o \ 46 gk20a/cde_gk20a.o \
47 gk20a/platform_gk20a_generic.o \ 47 gk20a/platform_gk20a_generic.o \
48 gk20a/tsg_gk20a.o \ 48 gk20a/tsg_gk20a.o \
49 gk20a/ctxsw_trace_gk20a.o \
50 gk20a/fecs_trace_gk20a.o \
49 gk20a/mc_gk20a.o \ 51 gk20a/mc_gk20a.o \
50 gm20b/hal_gm20b.o \ 52 gm20b/hal_gm20b.o \
51 gm20b/ltc_gm20b.o \ 53 gm20b/ltc_gm20b.o \
@@ -64,7 +66,6 @@ nvgpu-y := \
64 gm20b/debug_gm20b.o \ 66 gm20b/debug_gm20b.o \
65 gm20b/cde_gm20b.o \ 67 gm20b/cde_gm20b.o \
66 gm20b/therm_gm20b.o 68 gm20b/therm_gm20b.o
67
68nvgpu-$(CONFIG_TEGRA_GK20A) += gk20a/platform_gk20a_tegra.o 69nvgpu-$(CONFIG_TEGRA_GK20A) += gk20a/platform_gk20a_tegra.o
69nvgpu-$(CONFIG_SYNC) += gk20a/sync_gk20a.o 70nvgpu-$(CONFIG_SYNC) += gk20a/sync_gk20a.o
70 71
@@ -78,6 +79,7 @@ nvgpu-$(CONFIG_TEGRA_GR_VIRTUALIZATION) += \
78 vgpu/debug_vgpu.o \ 79 vgpu/debug_vgpu.o \
79 vgpu/vgpu.o \ 80 vgpu/vgpu.o \
80 vgpu/dbg_vgpu.o \ 81 vgpu/dbg_vgpu.o \
82 vgpu/fecs_trace_vgpu.o \
81 vgpu/gk20a/vgpu_hal_gk20a.o \ 83 vgpu/gk20a/vgpu_hal_gk20a.o \
82 vgpu/gk20a/vgpu_gr_gk20a.o \ 84 vgpu/gk20a/vgpu_gr_gk20a.o \
83 vgpu/gm20b/vgpu_hal_gm20b.o \ 85 vgpu/gm20b/vgpu_hal_gm20b.o \