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| author | Deepak Goyal <dgoyal@nvidia.com> | 2018-09-14 02:15:19 -0400 |
|---|---|---|
| committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-09-27 01:24:52 -0400 |
| commit | 34732a14b22f09d8f9d52f756612178f0313f120 (patch) | |
| tree | 94f634efcad3179ddbca82dedaf82dfe8f099030 /NVIDIA-REVIEWERS | |
| parent | 991179f29cea8ab8272465789496c2f15bad6240 (diff) | |
nvgpu: gpu: Support multiple tpc-pg masks.
- TPC powergating should be done before
calling gk20a_enable_gr_hw.
gk20a_enable_gr_hw() issues a GR engine reset.
Without this fix, enabling 1 TPC from each PES
causes ctxsw timeout error while running GFX Benchmark.
- Adds valid tpc-pg mask for 1/2/3/4 active TPC configs.
TPC Config - TPC-MASK
4 TPC configuration - 0x0
3 TPC configuration - 0x1/0x2/0x4/0x8
2 TPC configuration - 0x5/0x9/0x6/0xa
- We should not write to gr_fe_tpc_pesmask_r()
as part of TPC-PG sequence. This register is for
debug purpose only.
Bug 200442360
Change-Id: I6fbe1ad8fbc836ace8cbaf00ec3d21a12c73e0bd
Signed-off-by: Deepak Goyal <dgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1809772
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'NVIDIA-REVIEWERS')
0 files changed, 0 insertions, 0 deletions