gpu: nvgpu: clk: Fix MISRA 15.6 violations

MISRA Rule-15.6 requires that all if-else blocks be enclosed in braces,
including single statement blocks. Fix errors due to single statement
if blocks without braces by introducing the braces.

JIRA NVGPU-671

Change-Id: I228f04adea809e1dd4e6826bf1a04f051a533102
Signed-off-by: Srirangan <smadhavan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1796831
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

7 files changed, 365 insertions, 192 deletions

diff --git a/drivers/gpu/nvgpu/clk/clk.c b/drivers/gpu/nvgpu/clk/clk.c
index 731124f7..392fc9b4 100644
--- a/drivers/gpu/nvgpu/clk/clk.c
+++ b/drivers/gpu/nvgpu/clk/clk.c
@@ -51,8 +51,9 @@ static void clkrpc_pmucmdhandler(struct gk20a *g, struct pmu_msg *msg,
                 return;
         }
 
-        if (phandlerparams->prpccall->b_supported)
+        if (phandlerparams->prpccall->b_supported) {
                 phandlerparams->success = 1;
+        }
 }
 
 
@@ -226,16 +227,17 @@ int clk_pmu_freq_controller_load(struct gk20a *g, bool bload, u8 bit_idx)
                 status = boardobjgrpmask_export(&isolate_cfc_mask.super,
                                         isolate_cfc_mask.super.bitcount,
                                         &load_mask->super);
-                if (bload)
+                if (bload) {
                         status = boardobjgrpmask_bitset(
                                         &pclk_freq_controllers->
                                                 freq_ctrl_load_mask.super,
                                         bit_idx);
-                else
+                } else {
                         status = boardobjgrpmask_bitclr(
                                         &pclk_freq_controllers->
                                                 freq_ctrl_load_mask.super,
                                         bit_idx);
+                }
         }
 
         if (status) {
@@ -436,13 +438,15 @@ static u32 clk_pmu_vf_inject(struct gk20a *g, struct set_fll_clk *setfllclk)
         memset(&handler, 0, sizeof(struct clkrpc_pmucmdhandler_params));
 
         if ((setfllclk->gpc2clkmhz == 0) || (setfllclk->xbar2clkmhz == 0) ||
-                (setfllclk->sys2clkmhz == 0) || (setfllclk->voltuv == 0))
+                (setfllclk->sys2clkmhz == 0) || (setfllclk->voltuv == 0)) {
                 return -EINVAL;
+        }
 
         if ((setfllclk->target_regime_id_gpc > CTRL_CLK_FLL_REGIME_ID_FR) ||
                 (setfllclk->target_regime_id_sys > CTRL_CLK_FLL_REGIME_ID_FR) ||
-                (setfllclk->target_regime_id_xbar > CTRL_CLK_FLL_REGIME_ID_FR))
+                (setfllclk->target_regime_id_xbar > CTRL_CLK_FLL_REGIME_ID_FR)) {
                 return -EINVAL;
+        }
 
         rpccall.function = NV_PMU_CLK_RPC_ID_CLK_VF_CHANGE_INJECT;
 
@@ -501,10 +505,11 @@ static u32 find_regime_id(struct gk20a *g, u32 domain, u16 clkmhz)
                 struct fll_device *, pflldev, j) {
                 if (pflldev->clk_domain == domain) {
                         if (pflldev->regime_desc.fixed_freq_regime_limit_mhz >=
-                                                        clkmhz)
+                                                        clkmhz) {
                                 return CTRL_CLK_FLL_REGIME_ID_FFR;
-                        else
+                        } else {
                                 return CTRL_CLK_FLL_REGIME_ID_FR;
+                        }
                 }
         }
         return CTRL_CLK_FLL_REGIME_ID_INVALID;
@@ -549,48 +554,55 @@ int clk_set_fll_clks(struct gk20a *g, struct set_fll_clk *setfllclk)
         /*set regime ids */
         status = get_regime_id(g, CTRL_CLK_DOMAIN_GPC2CLK,
                         &setfllclk->current_regime_id_gpc);
-        if (status)
+        if (status) {
                 goto done;
+        }
 
         setfllclk->target_regime_id_gpc = find_regime_id(g,
                         CTRL_CLK_DOMAIN_GPC2CLK, setfllclk->gpc2clkmhz);
 
         status = get_regime_id(g, CTRL_CLK_DOMAIN_SYS2CLK,
                         &setfllclk->current_regime_id_sys);
-        if (status)
+        if (status) {
                 goto done;
+        }
 
         setfllclk->target_regime_id_sys = find_regime_id(g,
                         CTRL_CLK_DOMAIN_SYS2CLK, setfllclk->sys2clkmhz);
 
         status = get_regime_id(g, CTRL_CLK_DOMAIN_XBAR2CLK,
                         &setfllclk->current_regime_id_xbar);
-        if (status)
+        if (status) {
                 goto done;
+        }
 
         setfllclk->target_regime_id_xbar = find_regime_id(g,
                         CTRL_CLK_DOMAIN_XBAR2CLK, setfllclk->xbar2clkmhz);
 
         status = clk_pmu_vf_inject(g, setfllclk);
 
-        if (status)
+        if (status) {
                 nvgpu_err(g, "vf inject to change clk failed");
+        }
 
         /* save regime ids */
         status = set_regime_id(g, CTRL_CLK_DOMAIN_XBAR2CLK,
                         setfllclk->target_regime_id_xbar);
-        if (status)
+        if (status) {
                 goto done;
+        }
 
         status = set_regime_id(g, CTRL_CLK_DOMAIN_GPC2CLK,
                         setfllclk->target_regime_id_gpc);
-        if (status)
+        if (status) {
                 goto done;
+        }
 
         status = set_regime_id(g, CTRL_CLK_DOMAIN_SYS2CLK,
                         setfllclk->target_regime_id_sys);
-        if (status)
+        if (status) {
                 goto done;
+        }
 done:
         return status;
 }
@@ -606,8 +618,9 @@ int clk_get_fll_clks(struct gk20a *g, struct set_fll_clk *setfllclk)
         struct clk_domain_3x_slave *p3xslave;
         unsigned long slaveidxmask;
 
-        if (setfllclk->gpc2clkmhz == 0)
+        if (setfllclk->gpc2clkmhz == 0) {
                 return -EINVAL;
+        }
 
         BOARDOBJGRP_FOR_EACH(&(pclk->clk_domainobjs.super.super),
                         struct clk_domain *, pdomain, i) {
@@ -627,8 +640,9 @@ int clk_get_fll_clks(struct gk20a *g, struct set_fll_clk *setfllclk)
                                 if ((p3xslave->super.super.super.api_domain !=
                                      CTRL_CLK_DOMAIN_XBAR2CLK) &&
                                     (p3xslave->super.super.super.api_domain !=
-                                     CTRL_CLK_DOMAIN_SYS2CLK))
+                                     CTRL_CLK_DOMAIN_SYS2CLK)) {
                                         continue;
+                                }
                                 clkmhz = 0;
                                 status = p3xslave->clkdomainclkgetslaveclk(g,
                                                 pclk,
@@ -640,11 +654,13 @@ int clk_get_fll_clks(struct gk20a *g, struct set_fll_clk *setfllclk)
                                         goto done;
                                 }
                                 if (p3xslave->super.super.super.api_domain ==
-                                     CTRL_CLK_DOMAIN_XBAR2CLK)
+                                     CTRL_CLK_DOMAIN_XBAR2CLK) {
                                         setfllclk->xbar2clkmhz = clkmhz;
+                                }
                                 if (p3xslave->super.super.super.api_domain ==
-                                     CTRL_CLK_DOMAIN_SYS2CLK)
+                                     CTRL_CLK_DOMAIN_SYS2CLK) {
                                         setfllclk->sys2clkmhz = clkmhz;
+                                }
                         }
                 }
         }
@@ -687,12 +703,15 @@ static int clk_program_fllclks(struct gk20a *g, struct change_fll_clk *fllclk)
         unsigned long slaveidxmask;
         struct set_fll_clk setfllclk;
 
-        if (fllclk->api_clk_domain != CTRL_CLK_DOMAIN_GPCCLK)
+        if (fllclk->api_clk_domain != CTRL_CLK_DOMAIN_GPCCLK) {
                 return -EINVAL;
-        if (fllclk->voltuv == 0)
+        }
+        if (fllclk->voltuv == 0) {
                 return -EINVAL;
-        if (fllclk->clkmhz == 0)
+        }
+        if (fllclk->clkmhz == 0) {
                 return -EINVAL;
+        }
 
         setfllclk.voltuv = fllclk->voltuv;
         setfllclk.gpc2clkmhz = fllclk->clkmhz;
@@ -715,8 +734,9 @@ static int clk_program_fllclks(struct gk20a *g, struct change_fll_clk *fllclk)
                                 if ((p3xslave->super.super.super.api_domain !=
                                      CTRL_CLK_DOMAIN_XBARCLK) &&
                                     (p3xslave->super.super.super.api_domain !=
-                                     CTRL_CLK_DOMAIN_SYSCLK))
+                                     CTRL_CLK_DOMAIN_SYSCLK)) {
                                         continue;
+                                }
                                 clkmhz = 0;
                                 status = p3xslave->clkdomainclkgetslaveclk(g,
                                                 pclk,
@@ -728,60 +748,69 @@ static int clk_program_fllclks(struct gk20a *g, struct change_fll_clk *fllclk)
                                         goto done;
                                 }
                                 if (p3xslave->super.super.super.api_domain ==
-                                     CTRL_CLK_DOMAIN_XBARCLK)
+                                     CTRL_CLK_DOMAIN_XBARCLK) {
                                         setfllclk.xbar2clkmhz = clkmhz;
+                                }
                                 if (p3xslave->super.super.super.api_domain ==
-                                     CTRL_CLK_DOMAIN_SYSCLK)
+                                     CTRL_CLK_DOMAIN_SYSCLK) {
                                         setfllclk.sys2clkmhz = clkmhz;
+                                }
                         }
                 }
         }
         /*set regime ids */
         status = get_regime_id(g, CTRL_CLK_DOMAIN_GPCCLK,
                         &setfllclk.current_regime_id_gpc);
-        if (status)
+        if (status) {
                 goto done;
+        }
 
         setfllclk.target_regime_id_gpc = find_regime_id(g,
                         CTRL_CLK_DOMAIN_GPCCLK, setfllclk.gpc2clkmhz);
 
         status = get_regime_id(g, CTRL_CLK_DOMAIN_SYSCLK,
                         &setfllclk.current_regime_id_sys);
-        if (status)
+        if (status) {
                 goto done;
+        }
 
         setfllclk.target_regime_id_sys = find_regime_id(g,
                         CTRL_CLK_DOMAIN_SYSCLK, setfllclk.sys2clkmhz);
 
         status = get_regime_id(g, CTRL_CLK_DOMAIN_XBARCLK,
                         &setfllclk.current_regime_id_xbar);
-        if (status)
+        if (status) {
                 goto done;
+        }
 
         setfllclk.target_regime_id_xbar = find_regime_id(g,
                         CTRL_CLK_DOMAIN_XBARCLK, setfllclk.xbar2clkmhz);
 
         status = clk_pmu_vf_inject(g, &setfllclk);
 
-        if (status)
+        if (status) {
                 nvgpu_err(g,
                         "vf inject to change clk failed");
+        }
 
         /* save regime ids */
         status = set_regime_id(g, CTRL_CLK_DOMAIN_XBARCLK,
                         setfllclk.target_regime_id_xbar);
-        if (status)
+        if (status) {
                 goto done;
+        }
 
         status = set_regime_id(g, CTRL_CLK_DOMAIN_GPCCLK,
                         setfllclk.target_regime_id_gpc);
-        if (status)
+        if (status) {
                 goto done;
+        }
 
         status = set_regime_id(g, CTRL_CLK_DOMAIN_SYSCLK,
                         setfllclk.target_regime_id_sys);
-        if (status)
+        if (status) {
                 goto done;
+        }
 done:
         return status;
 }
@@ -809,17 +838,19 @@ u32 nvgpu_clk_set_boot_fll_clk_gv10x(struct gk20a *g)
         voltuv = gpcclk_voltuv;
 
         status = volt_set_voltage(g, voltuv, 0);
-        if (status)
+        if (status) {
                 nvgpu_err(g,
                         "attempt to set boot voltage failed %d",
                         voltuv);
+        }
 
         bootfllclk.api_clk_domain = CTRL_CLK_DOMAIN_GPCCLK;
         bootfllclk.clkmhz = gpcclk_clkmhz;
         bootfllclk.voltuv = voltuv;
         status = clk_program_fllclks(g, &bootfllclk);
-        if (status)
+        if (status) {
                 nvgpu_err(g, "attempt to set boot gpcclk failed");
+        }
 
         status = clk_pmu_freq_effective_avg_load(g, true);
 
@@ -849,15 +880,17 @@ u32 clk_domain_get_f_or_v(
         struct clk_pmupstate *pclk = &g->clk_pmu;
         u8 rail;
 
-        if ((pclkmhz == NULL) || (pvoltuv == NULL))
+        if ((pclkmhz == NULL) || (pvoltuv == NULL)) {
                 return -EINVAL;
+        }
 
-        if (railidx == CTRL_VOLT_DOMAIN_LOGIC)
+        if (railidx == CTRL_VOLT_DOMAIN_LOGIC) {
                 rail = CLK_PROG_VFE_ENTRY_LOGIC;
-        else if (railidx == CTRL_VOLT_DOMAIN_SRAM)
+        } else if (railidx == CTRL_VOLT_DOMAIN_SRAM) {
                 rail = CLK_PROG_VFE_ENTRY_SRAM;
-        else
+        } else {
                 return -EINVAL;
+        }
 
         BOARDOBJGRP_FOR_EACH(&(pclk->clk_domainobjs.super.super),
                         struct clk_domain *, pdomain, i) {
diff --git a/drivers/gpu/nvgpu/clk/clk_domain.c b/drivers/gpu/nvgpu/clk/clk_domain.c
index 822bba2c..9f17d199 100644
--- a/drivers/gpu/nvgpu/clk/clk_domain.c
+++ b/drivers/gpu/nvgpu/clk/clk_domain.c
@@ -74,34 +74,48 @@ static u32 clktranslatehalmumsettoapinumset(u32 clkhaldomains)
 {
         u32   clkapidomains = 0;
 
-        if (clkhaldomains & BIT(clkwhich_gpcclk))
+        if (clkhaldomains & BIT(clkwhich_gpcclk)) {
                 clkapidomains |= CTRL_CLK_DOMAIN_GPCCLK;
-        if (clkhaldomains & BIT(clkwhich_xbarclk))
+        }
+        if (clkhaldomains & BIT(clkwhich_xbarclk)) {
                 clkapidomains |= CTRL_CLK_DOMAIN_XBARCLK;
-        if (clkhaldomains & BIT(clkwhich_sysclk))
+        }
+        if (clkhaldomains & BIT(clkwhich_sysclk)) {
                 clkapidomains |= CTRL_CLK_DOMAIN_SYSCLK;
-        if (clkhaldomains & BIT(clkwhich_hubclk))
+        }
+        if (clkhaldomains & BIT(clkwhich_hubclk)) {
                 clkapidomains |= CTRL_CLK_DOMAIN_HUBCLK;
-        if (clkhaldomains & BIT(clkwhich_hostclk))
+        }
+        if (clkhaldomains & BIT(clkwhich_hostclk)) {
                 clkapidomains |= CTRL_CLK_DOMAIN_HOSTCLK;
-        if (clkhaldomains & BIT(clkwhich_gpc2clk))
+        }
+        if (clkhaldomains & BIT(clkwhich_gpc2clk)) {
                 clkapidomains |= CTRL_CLK_DOMAIN_GPC2CLK;
-        if (clkhaldomains & BIT(clkwhich_xbar2clk))
+        }
+        if (clkhaldomains & BIT(clkwhich_xbar2clk)) {
                 clkapidomains |= CTRL_CLK_DOMAIN_XBAR2CLK;
-        if (clkhaldomains & BIT(clkwhich_sys2clk))
+        }
+        if (clkhaldomains & BIT(clkwhich_sys2clk)) {
                 clkapidomains |= CTRL_CLK_DOMAIN_SYS2CLK;
-        if (clkhaldomains & BIT(clkwhich_hub2clk))
+        }
+        if (clkhaldomains & BIT(clkwhich_hub2clk)) {
                 clkapidomains |= CTRL_CLK_DOMAIN_HUB2CLK;
-        if (clkhaldomains & BIT(clkwhich_pwrclk))
+        }
+        if (clkhaldomains & BIT(clkwhich_pwrclk)) {
                 clkapidomains |= CTRL_CLK_DOMAIN_PWRCLK;
-        if (clkhaldomains & BIT(clkwhich_pciegenclk))
+        }
+        if (clkhaldomains & BIT(clkwhich_pciegenclk)) {
                 clkapidomains |= CTRL_CLK_DOMAIN_PCIEGENCLK;
-        if (clkhaldomains & BIT(clkwhich_mclk))
+        }
+        if (clkhaldomains & BIT(clkwhich_mclk)) {
                 clkapidomains |= CTRL_CLK_DOMAIN_MCLK;
-        if (clkhaldomains & BIT(clkwhich_nvdclk))
+        }
+        if (clkhaldomains & BIT(clkwhich_nvdclk)) {
                 clkapidomains |= CTRL_CLK_DOMAIN_NVDCLK;
-        if (clkhaldomains & BIT(clkwhich_dispclk))
+        }
+        if (clkhaldomains & BIT(clkwhich_dispclk)) {
                 clkapidomains |= CTRL_CLK_DOMAIN_DISPCLK;
+        }
 
         return clkapidomains;
 }
@@ -131,10 +145,11 @@ static u32 _clk_domains_pmudatainit_3x(struct gk20a *g,
         pset->b_debug_mode = false;
         pset->b_enforce_vf_monotonicity = pdomains->b_enforce_vf_monotonicity;
         pset->b_enforce_vf_smoothening = pdomains->b_enforce_vf_smoothening;
-        if (g->ops.clk.split_rail_support)
+        if (g->ops.clk.split_rail_support) {
                 pset->volt_rails_max = 2;
-        else
+        } else {
                 pset->volt_rails_max = 1;
+        }
         status = boardobjgrpmask_export(
                                 &pdomains->master_domains_mask.super,
                                 pdomains->master_domains_mask.super.bitcount,
@@ -160,8 +175,9 @@ static u32 _clk_domains_pmudata_instget(struct gk20a *g,
 
         /*check whether pmuboardobjgrp has a valid boardobj in index*/
         if (((u32)BIT(idx) &
-                pgrp_set->hdr.data.super.obj_mask.super.data[0]) == 0)
+                pgrp_set->hdr.data.super.obj_mask.super.data[0]) == 0) {
                 return -EINVAL;
+        }
 
         *ppboardobjpmudata = (struct nv_pmu_boardobj *)
                 &pgrp_set->objects[idx].data.board_obj;
@@ -222,8 +238,9 @@ u32 clk_domain_sw_setup(struct gk20a *g)
                 sizeof(struct ctrl_clk_clk_delta));
 
         status = devinit_get_clocks_table(g, pclkdomainobjs);
-        if (status)
+        if (status) {
                 goto done;
+        }
 
         BOARDOBJGRP_FOR_EACH(&(pclkdomainobjs->super.super),
                              struct clk_domain *, pdomain, i) {
@@ -232,16 +249,18 @@ u32 clk_domain_sw_setup(struct gk20a *g)
                                 CTRL_CLK_CLK_DOMAIN_TYPE_3X_PROG)) {
                         status = boardobjgrpmask_bitset(
                                 &pclkdomainobjs->prog_domains_mask.super, i);
-                        if (status)
+                        if (status) {
                                 goto done;
+                        }
                 }
 
                 if (pdomain->super.implements(g, &pdomain->super,
                                 CTRL_CLK_CLK_DOMAIN_TYPE_3X_MASTER)) {
                         status = boardobjgrpmask_bitset(
                                 &pclkdomainobjs->master_domains_mask.super, i);
-                        if (status)
+                        if (status) {
                                 goto done;
+                        }
                 }
 
                 if (pdomain->super.implements(g, &pdomain->super,
@@ -271,8 +290,9 @@ u32 clk_domain_pmu_setup(struct gk20a *g)
 
         pboardobjgrp = &g->clk_pmu.clk_domainobjs.super.super;
 
-        if (!pboardobjgrp->bconstructed)
+        if (!pboardobjgrp->bconstructed) {
                 return -EINVAL;
+        }
 
         status = pboardobjgrp->pmuinithandle(g, pboardobjgrp);
 
@@ -511,8 +531,9 @@ static u32 clk_domain_construct_super(struct gk20a *g,
         status = boardobj_construct_super(g, ppboardobj,
                 size, pargs);
 
-        if (status)
+        if (status) {
                 return -EINVAL;
+        }
 
         pdomain = (struct clk_domain *)*ppboardobj;
 
@@ -547,8 +568,9 @@ static u32 _clk_domain_pmudatainit_3x(struct gk20a *g,
         nvgpu_log_info(g, " ");
 
         status = clk_domain_pmudatainit_super(g, board_obj_ptr, ppmudata);
-        if (status != 0)
+        if (status != 0) {
                 return status;
+        }
 
         pclk_domain_3x = (struct clk_domain_3x *)board_obj_ptr;
 
@@ -572,8 +594,9 @@ static u32 clk_domain_construct_3x(struct gk20a *g,
         ptmpobj->type_mask = BIT(CTRL_CLK_CLK_DOMAIN_TYPE_3X);
         status = clk_domain_construct_super(g, ppboardobj,
                                         size, pargs);
-        if (status)
+        if (status) {
                 return -EINVAL;
+        }
 
         pdomain = (struct clk_domain_3x *)*ppboardobj;
 
@@ -601,8 +624,9 @@ static u32 clkdomainclkproglink_3x_prog(struct gk20a *g,
              i <= p3xprog->clk_prog_idx_last;
              i++) {
                 pprog = CLK_CLK_PROG_GET(pclk, i);
-                if (pprog == NULL)
+                if (pprog == NULL) {
                         status = -EINVAL;
+                }
         }
         return status;
 }
@@ -621,11 +645,13 @@ static int clkdomaingetslaveclk(struct gk20a *g,
 
         nvgpu_log_info(g, " ");
 
-        if (pclkmhz == NULL)
+        if (pclkmhz == NULL) {
                 return -EINVAL;
+        }
 
-        if (masterclkmhz == 0)
+        if (masterclkmhz == 0) {
                 return -EINVAL;
+        }
 
         slaveidx = BOARDOBJ_GET_IDX(pdomain);
         p3xmaster = (struct clk_domain_3x_master *)
@@ -662,11 +688,13 @@ static int clkdomainvfsearch(struct gk20a *g,
 
         nvgpu_log_info(g, " ");
 
-        if ((pclkmhz == NULL) || (pvoltuv == NULL))
+        if ((pclkmhz == NULL) || (pvoltuv == NULL)) {
                 return -EINVAL;
+        }
 
-        if ((*pclkmhz != 0) && (*pvoltuv != 0))
+        if ((*pclkmhz != 0) && (*pvoltuv != 0)) {
                 return -EINVAL;
+        }
 
         bestclkmhz = *pclkmhz;
         bestvoltuv = *pvoltuv;
@@ -749,15 +777,18 @@ static u32 clkdomaingetfpoints
 
         nvgpu_log_info(g, " ");
 
-        if (pfpointscount == NULL)
+        if (pfpointscount == NULL) {
                 return -EINVAL;
+        }
 
-        if ((pfreqpointsinmhz == NULL) && (*pfpointscount != 0))
+        if ((pfreqpointsinmhz == NULL) && (*pfpointscount != 0)) {
                 return -EINVAL;
+        }
 
         if (pdomain->super.implements(g, &pdomain->super,
-                        CTRL_CLK_CLK_DOMAIN_TYPE_3X_SLAVE))
+                        CTRL_CLK_CLK_DOMAIN_TYPE_3X_SLAVE)) {
                 return -EINVAL;
+        }
 
         freqpointsdata = pfreqpointsinmhz;
         totalcount = 0;
@@ -779,8 +810,9 @@ static u32 clkdomaingetfpoints
                 if (*pfpointscount) {
                         remainingcount -= fpointscount;
                         fpointscount = remainingcount;
-                } else
+                } else {
                         fpointscount = 0;
+                }
 
         }
 
@@ -802,8 +834,9 @@ static u32 _clk_domain_pmudatainit_3x_prog(struct gk20a *g,
         nvgpu_log_info(g, " ");
 
         status = _clk_domain_pmudatainit_3x(g, board_obj_ptr, ppmudata);
-        if (status != 0)
+        if (status != 0) {
                 return status;
+        }
 
         pclk_domain_3x_prog = (struct clk_domain_3x_prog *)board_obj_ptr;
 
@@ -839,8 +872,9 @@ static u32 clk_domain_construct_3x_prog(struct gk20a *g,
 
         ptmpobj->type_mask |= BIT(CTRL_CLK_CLK_DOMAIN_TYPE_3X_PROG);
         status = clk_domain_construct_3x(g, ppboardobj, size, pargs);
-        if (status)
+        if (status) {
                 return -EINVAL;
+        }
 
         pdomain = (struct clk_domain_3x_prog *)*ppboardobj;
 
@@ -882,8 +916,9 @@ static u32 _clk_domain_pmudatainit_3x_slave(struct gk20a *g,
         nvgpu_log_info(g, " ");
 
         status = _clk_domain_pmudatainit_3x_prog(g, board_obj_ptr, ppmudata);
-        if (status != 0)
+        if (status != 0) {
                 return status;
+        }
 
         pclk_domain_3x_slave = (struct clk_domain_3x_slave *)board_obj_ptr;
 
@@ -905,13 +940,15 @@ static u32 clk_domain_construct_3x_slave(struct gk20a *g,
                         (struct clk_domain_3x_slave *)pargs;
         u32 status = 0;
 
-        if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_CLK_DOMAIN_TYPE_3X_SLAVE)
+        if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_CLK_DOMAIN_TYPE_3X_SLAVE) {
                 return -EINVAL;
+        }
 
         ptmpobj->type_mask |= BIT(CTRL_CLK_CLK_DOMAIN_TYPE_3X_SLAVE);
         status = clk_domain_construct_3x_prog(g, ppboardobj, size, pargs);
-        if (status)
+        if (status) {
                 return -EINVAL;
+        }
 
         pdomain = (struct clk_domain_3x_slave *)*ppboardobj;
 
@@ -941,8 +978,9 @@ static u32 clkdomainclkproglink_3x_master(struct gk20a *g,
         nvgpu_log_info(g, " ");
 
         status = clkdomainclkproglink_3x_prog(g, pclk, pdomain);
-        if (status)
+        if (status) {
                 goto done;
+        }
 
         /* Iterate over the set of CLK_PROGs pointed at by this domain.*/
         for (i = p3xmaster->super.clk_prog_idx_first;
@@ -960,8 +998,9 @@ static u32 clkdomainclkproglink_3x_master(struct gk20a *g,
                 pprog1xmaster = (struct clk_prog_1x_master *)pprog;
                 status = pprog1xmaster->vfflatten(g, pclk, pprog1xmaster,
                         BOARDOBJ_GET_IDX(p3xmaster), &freq_max_last_mhz);
-                if (status)
+                if (status) {
                         goto done;
+                }
         }
 done:
         nvgpu_log_info(g, "done status %x", status);
@@ -979,8 +1018,9 @@ static u32 _clk_domain_pmudatainit_3x_master(struct gk20a *g,
         nvgpu_log_info(g, " ");
 
         status = _clk_domain_pmudatainit_3x_prog(g, board_obj_ptr, ppmudata);
-        if (status != 0)
+        if (status != 0) {
                 return status;
+        }
 
         pclk_domain_3x_master = (struct clk_domain_3x_master *)board_obj_ptr;
 
@@ -1000,13 +1040,15 @@ static u32 clk_domain_construct_3x_master(struct gk20a *g,
         struct clk_domain_3x_master *pdomain;
         u32 status = 0;
 
-        if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_CLK_DOMAIN_TYPE_3X_MASTER)
+        if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_CLK_DOMAIN_TYPE_3X_MASTER) {
                 return -EINVAL;
+        }
 
         ptmpobj->type_mask |= BIT(CTRL_CLK_CLK_DOMAIN_TYPE_3X_MASTER);
         status = clk_domain_construct_3x_prog(g, ppboardobj, size, pargs);
-        if (status)
+        if (status) {
                 return -EINVAL;
+        }
 
         pdomain = (struct clk_domain_3x_master *)*ppboardobj;
 
@@ -1039,8 +1081,9 @@ static u32 _clk_domain_pmudatainit_3x_fixed(struct gk20a *g,
         nvgpu_log_info(g, " ");
 
         status = _clk_domain_pmudatainit_3x(g, board_obj_ptr, ppmudata);
-        if (status != 0)
+        if (status != 0) {
                 return status;
+        }
 
         pclk_domain_3x_fixed = (struct clk_domain_3x_fixed *)board_obj_ptr;
 
@@ -1062,13 +1105,15 @@ static u32 clk_domain_construct_3x_fixed(struct gk20a *g,
                         (struct clk_domain_3x_fixed *)pargs;
         u32 status = 0;
 
-        if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_CLK_DOMAIN_TYPE_3X_FIXED)
+        if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_CLK_DOMAIN_TYPE_3X_FIXED) {
                 return -EINVAL;
+        }
 
         ptmpobj->type_mask |= BIT(CTRL_CLK_CLK_DOMAIN_TYPE_3X_FIXED);
         status = clk_domain_construct_3x(g, ppboardobj, size, pargs);
-        if (status)
+        if (status) {
                 return -EINVAL;
+        }
 
         pdomain = (struct clk_domain_3x_fixed *)*ppboardobj;
 
@@ -1109,8 +1154,9 @@ static struct clk_domain *construct_clk_domain(struct gk20a *g, void *pargs)
                 return NULL;
         }
 
-        if (status)
+        if (status) {
                 return NULL;
+        }
 
         nvgpu_log_info(g, " Done");
 
@@ -1128,8 +1174,9 @@ static u32 clk_domain_pmudatainit_super(struct gk20a *g,
         nvgpu_log_info(g, " ");
 
         status = boardobj_pmudatainit_super(g, board_obj_ptr, ppmudata);
-        if (status != 0)
+        if (status != 0) {
                 return status;
+        }
 
         pclk_domain = (struct clk_domain *)board_obj_ptr;
 
diff --git a/drivers/gpu/nvgpu/clk/clk_fll.c b/drivers/gpu/nvgpu/clk/clk_fll.c
index a05fdf22..0fd9c33f 100644
--- a/drivers/gpu/nvgpu/clk/clk_fll.c
+++ b/drivers/gpu/nvgpu/clk/clk_fll.c
@@ -84,8 +84,9 @@ static u32 _clk_fll_devgrp_pmudata_instget(struct gk20a *g,
 
         /*check whether pmuboardobjgrp has a valid boardobj in index*/
         if (((u32)BIT(idx) &
-                pgrp_set->hdr.data.super.obj_mask.super.data[0]) == 0)
+                pgrp_set->hdr.data.super.obj_mask.super.data[0]) == 0) {
                 return -EINVAL;
+        }
 
         *ppboardobjpmudata = (struct nv_pmu_boardobj *)
                 &pgrp_set->objects[idx].data.board_obj;
@@ -104,8 +105,9 @@ static u32 _clk_fll_devgrp_pmustatus_instget(struct gk20a *g,
 
         /*check whether pmuboardobjgrp has a valid boardobj in index*/
         if (((u32)BIT(idx) &
-                pgrp_get_status->hdr.data.super.obj_mask.super.data[0]) == 0)
+                pgrp_get_status->hdr.data.super.obj_mask.super.data[0]) == 0) {
                 return -EINVAL;
+        }
 
         *ppboardobjpmustatus = (struct nv_pmu_boardobj_query *)
                         &pgrp_get_status->objects[idx].data.board_obj;
@@ -157,8 +159,9 @@ u32 clk_fll_sw_setup(struct gk20a *g)
         boardobjgrpmask_e32_init(&pfllobjs->lut_prog_master_mask, NULL);
 
         status = devinit_get_fll_device_table(g, pfllobjs);
-        if (status)
+        if (status) {
                 goto done;
+        }
 
         status = BOARDOBJGRP_PMU_CMD_GRP_GET_STATUS_CONSTRUCT(g,
                                 &g->clk_pmu.avfs_fllobjs.super.super,
@@ -215,8 +218,9 @@ u32 clk_fll_pmu_setup(struct gk20a *g)
 
         pboardobjgrp = &g->clk_pmu.avfs_fllobjs.super.super;
 
-        if (!pboardobjgrp->bconstructed)
+        if (!pboardobjgrp->bconstructed) {
                 return -EINVAL;
+        }
 
         status = pboardobjgrp->pmuinithandle(g, pboardobjgrp);
 
@@ -252,18 +256,20 @@ static u32 devinit_get_fll_device_table(struct gk20a *g,
 
         memcpy(&fll_desc_table_header_sz, fll_table_ptr,
                         sizeof(struct fll_descriptor_header));
-        if (fll_desc_table_header_sz.size >= FLL_DESCRIPTOR_HEADER_10_SIZE_6)
+        if (fll_desc_table_header_sz.size >= FLL_DESCRIPTOR_HEADER_10_SIZE_6) {
                 desctablesize = FLL_DESCRIPTOR_HEADER_10_SIZE_6;
-        else
+        } else {
                 desctablesize = FLL_DESCRIPTOR_HEADER_10_SIZE_4;
+        }
 
         memcpy(&fll_desc_table_header, fll_table_ptr, desctablesize);
 
-        if (desctablesize == FLL_DESCRIPTOR_HEADER_10_SIZE_6)
+        if (desctablesize == FLL_DESCRIPTOR_HEADER_10_SIZE_6) {
                 pfllobjs->max_min_freq_mhz =
                         fll_desc_table_header.max_min_freq_mhz;
-        else
+        } else {
                 pfllobjs->max_min_freq_mhz = 0;
+        }
 
         /* Read table entries*/
         fll_tbl_entry_ptr = fll_table_ptr + desctablesize;
@@ -273,18 +279,20 @@ static u32 devinit_get_fll_device_table(struct gk20a *g,
                 memcpy(&fll_desc_table_entry, fll_tbl_entry_ptr,
                                 sizeof(struct fll_descriptor_entry_10));
 
-                if (fll_desc_table_entry.fll_device_type == CTRL_CLK_FLL_TYPE_DISABLED)
+                if (fll_desc_table_entry.fll_device_type == CTRL_CLK_FLL_TYPE_DISABLED) {
                         continue;
+                }
 
                 fll_id = fll_desc_table_entry.fll_device_id;
 
                 if ( (u8)fll_desc_table_entry.vin_idx_logic != CTRL_CLK_VIN_ID_UNDEFINED) {
                         pvin_dev = CLK_GET_VIN_DEVICE(pvinobjs,
                                         (u8)fll_desc_table_entry.vin_idx_logic);
-                        if (pvin_dev == NULL)
+                        if (pvin_dev == NULL) {
                                 return -EINVAL;
-                        else
+                        } else {
                                 pvin_dev->flls_shared_mask |= BIT(fll_id);
+                        }
                 } else {
                         /* Return if Logic ADC device index is invalid*/
                         nvgpu_err(g, "Invalid Logic ADC specified for Nafll ID");
@@ -298,14 +306,16 @@ static u32 devinit_get_fll_device_table(struct gk20a *g,
                 if ( (u8)fll_desc_table_entry.vin_idx_sram != CTRL_CLK_VIN_ID_UNDEFINED) {
                         pvin_dev = CLK_GET_VIN_DEVICE(pvinobjs,
                                         (u8)fll_desc_table_entry.vin_idx_sram);
-                        if (pvin_dev == NULL)
+                        if (pvin_dev == NULL) {
                                 return -EINVAL;
-                        else
+                        } else {
                                 pvin_dev->flls_shared_mask |= BIT(fll_id);
+                        }
                 } else {
                         /* Make sure VSELECT mode is set correctly to _LOGIC*/
-                        if (fll_dev_data.lut_device.vselect_mode != CTRL_CLK_FLL_LUT_VSELECT_LOGIC)
+                        if (fll_dev_data.lut_device.vselect_mode != CTRL_CLK_FLL_LUT_VSELECT_LOGIC) {
                                 return -EINVAL;
+                        }
                 }
 
                 fll_dev_data.super.type =
@@ -357,25 +367,27 @@ done:
 
 u32 nvgpu_clk_get_vbios_clk_domain_gv10x( u32 vbios_domain)
 {
-        if (vbios_domain == 0)
+        if (vbios_domain == 0) {
                 return CTRL_CLK_DOMAIN_GPCCLK;
-        else if (vbios_domain == 1)
+        } else if (vbios_domain == 1) {
                 return CTRL_CLK_DOMAIN_XBARCLK;
-        else if (vbios_domain == 3)
+        } else if (vbios_domain == 3) {
                 return CTRL_CLK_DOMAIN_SYSCLK;
-        else if (vbios_domain == 5)
+        } else if (vbios_domain == 5) {
                 return CTRL_CLK_DOMAIN_NVDCLK;
+        }
         return 0;
 }
 
 u32 nvgpu_clk_get_vbios_clk_domain_gp10x( u32 vbios_domain)
 {
-        if (vbios_domain == 0)
+        if (vbios_domain == 0) {
                 return CTRL_CLK_DOMAIN_GPC2CLK;
-        else if (vbios_domain == 1)
+        } else if (vbios_domain == 1) {
                 return CTRL_CLK_DOMAIN_XBAR2CLK;
-        else if (vbios_domain == 3)
+        } else if (vbios_domain == 3) {
                 return CTRL_CLK_DOMAIN_SYS2CLK;
+        }
         return 0;
 }
 
@@ -384,8 +396,9 @@ static u32 lutbroadcastslaveregister(struct gk20a *g,
                                      struct fll_device *pfll,
                                      struct fll_device *pfll_slave)
 {
-        if (pfll->clk_domain != pfll_slave->clk_domain)
+        if (pfll->clk_domain != pfll_slave->clk_domain) {
                 return -EINVAL;
+        }
 
         return boardobjgrpmask_bitset(&pfll->
                 lut_prog_broadcast_slave_mask.super,
@@ -403,8 +416,9 @@ static struct fll_device *construct_fll_device(struct gk20a *g,
         nvgpu_log_info(g, " ");
         status = boardobj_construct_super(g, &board_obj_ptr,
                 sizeof(struct fll_device), pargs);
-        if (status)
+        if (status) {
                 return NULL;
+        }
 
         pfll_dev = (struct fll_device *)pargs;
         board_obj_fll_ptr = (struct fll_device *)board_obj_ptr;
@@ -446,8 +460,9 @@ static u32 fll_device_init_pmudata_super(struct gk20a *g,
         nvgpu_log_info(g, " ");
 
         status = boardobj_pmudatainit_super(g, board_obj_ptr, ppmudata);
-        if (status != 0)
+        if (status != 0) {
                 return status;
+        }
 
         pfll_dev = (struct fll_device *)board_obj_ptr;
         perf_pmu_data = (struct nv_pmu_clk_clk_fll_device_boardobj_set *)
diff --git a/drivers/gpu/nvgpu/clk/clk_freq_controller.c b/drivers/gpu/nvgpu/clk/clk_freq_controller.c
index 9091f71b..aa2a3a54 100644
--- a/drivers/gpu/nvgpu/clk/clk_freq_controller.c
+++ b/drivers/gpu/nvgpu/clk/clk_freq_controller.c
@@ -41,8 +41,9 @@ static u32 clk_freq_controller_pmudatainit_super(struct gk20a *g,
         u32 status = 0;
 
         status = boardobj_pmudatainit_super(g, board_obj_ptr, ppmudata);
-        if (status)
+        if (status) {
                 return status;
+        }
 
         pfreq_cntlr_set =
                 (struct nv_pmu_clk_clk_freq_controller_boardobj_set *)ppmudata;
@@ -73,8 +74,9 @@ static u32 clk_freq_controller_pmudatainit_pi(struct gk20a *g,
 
         status = clk_freq_controller_pmudatainit_super(g,
                 board_obj_ptr, ppmudata);
-        if (status)
+        if (status) {
                 return -1;
+        }
 
         pfreq_cntlr_pi_set =
                 (struct nv_pmu_clk_clk_freq_controller_pi_boardobj_set *)
@@ -101,8 +103,9 @@ static u32 clk_freq_controller_construct_super(struct gk20a *g,
         u32 status = 0;
 
         status = boardobj_construct_super(g, ppboardobj, size, pargs);
-        if (status)
+        if (status) {
                 return -EINVAL;
+        }
 
         pfreq_cntlr_tmp = (struct clk_freq_controller *)pargs;
         pfreq_cntlr = (struct clk_freq_controller *)*ppboardobj;
@@ -132,8 +135,9 @@ static u32 clk_freq_controller_construct_pi(struct gk20a *g,
 
         status = clk_freq_controller_construct_super(g, ppboardobj,
                         size, pargs);
-        if (status)
+        if (status) {
                 return -EINVAL;
+        }
 
         pfreq_cntlr_pi = (struct clk_freq_controller_pi *)*ppboardobj;
         pfreq_cntlr_pi_tmp = (struct clk_freq_controller_pi *)pargs;
@@ -159,13 +163,15 @@ static struct clk_freq_controller *clk_clk_freq_controller_construct(
         struct boardobj *board_obj_ptr = NULL;
         u32 status = 0;
 
-        if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_CLK_FREQ_CONTROLLER_TYPE_PI)
+        if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_CLK_FREQ_CONTROLLER_TYPE_PI) {
                 return NULL;
+        }
 
         status = clk_freq_controller_construct_pi(g, &board_obj_ptr,
                                 sizeof(struct clk_freq_controller_pi), pargs);
-        if (status)
+        if (status) {
                 return NULL;
+        }
 
         return (struct clk_freq_controller *)board_obj_ptr;
 }
@@ -222,8 +228,9 @@ static u32 clk_get_freq_controller_table(struct gk20a *g,
                         sizeof(struct vbios_fct_1x_entry));
 
                 if (!BIOS_GET_FIELD(entry.flags0,
-                                NV_VBIOS_FCT_1X_ENTRY_FLAGS0_TYPE))
+                                NV_VBIOS_FCT_1X_ENTRY_FLAGS0_TYPE)) {
                         continue;
+                }
 
                 freq_controller_data.board_obj.type = (u8)BIOS_GET_FIELD(
                         entry.flags0, NV_VBIOS_FCT_1X_ENTRY_FLAGS0_TYPE);
@@ -286,8 +293,9 @@ static u32 clk_get_freq_controller_table(struct gk20a *g,
                                 NV_VBIOS_FCT_1X_ENTRY_PARAM8_FREQ_HYST_NEG);
 
                 if (ptmp_freq_cntr_pi->volt_delta_max <
-                        ptmp_freq_cntr_pi->volt_delta_min)
+                        ptmp_freq_cntr_pi->volt_delta_min) {
                         goto done;
+                }
 
                 pclk_freq_cntr = clk_clk_freq_controller_construct(g,
                                                 (void *)&freq_controller_data);
@@ -325,8 +333,9 @@ u32 clk_freq_controller_pmu_setup(struct gk20a *g)
 
         pboardobjgrp = &g->clk_pmu.clk_freq_controllers.super.super;
 
-        if (!pboardobjgrp->bconstructed)
+        if (!pboardobjgrp->bconstructed) {
                 return -EINVAL;
+        }
 
         status = pboardobjgrp->pmuinithandle(g, pboardobjgrp);
 
@@ -347,8 +356,9 @@ static u32 _clk_freq_controller_devgrp_pmudata_instget(struct gk20a *g,
 
         /*check whether pmuboardobjgrp has a valid boardobj in index*/
         if (((u32)BIT(idx) &
-                pgrp_set->hdr.data.super.obj_mask.super.data[0]) == 0)
+                pgrp_set->hdr.data.super.obj_mask.super.data[0]) == 0) {
                 return -EINVAL;
+        }
 
         *ppboardobjpmudata = (struct nv_pmu_boardobj *)
                 &pgrp_set->objects[idx].data.board_obj;
diff --git a/drivers/gpu/nvgpu/clk/clk_prog.c b/drivers/gpu/nvgpu/clk/clk_prog.c
index 8926b9f5..5966d64a 100644
--- a/drivers/gpu/nvgpu/clk/clk_prog.c
+++ b/drivers/gpu/nvgpu/clk/clk_prog.c
@@ -76,8 +76,9 @@ static u32 _clk_progs_pmudata_instget(struct gk20a *g,
 
         /*check whether pmuboardobjgrp has a valid boardobj in index*/
         if (((u32)BIT(idx) &
-                pgrp_set->hdr.data.super.obj_mask.super.data[0]) == 0)
+                pgrp_set->hdr.data.super.obj_mask.super.data[0]) == 0) {
                 return -EINVAL;
+        }
 
         *ppboardobjpmudata = (struct nv_pmu_boardobj *)
                 &pgrp_set->objects[idx].data.board_obj;
@@ -119,8 +120,9 @@ u32 clk_prog_sw_setup(struct gk20a *g)
         pboardobjgrp->pmudatainstget  = _clk_progs_pmudata_instget;
 
         status = devinit_get_clk_prog_table(g, pclkprogobjs);
-        if (status)
+        if (status) {
                 goto done;
+        }
 
         status = clk_domain_clk_prog_link(g, &g->clk_pmu);
         if (status) {
@@ -143,8 +145,9 @@ u32 clk_prog_pmu_setup(struct gk20a *g)
 
         pboardobjgrp = &g->clk_pmu.clk_progobjs.super.super;
 
-        if (!pboardobjgrp->bconstructed)
+        if (!pboardobjgrp->bconstructed) {
                 return -EINVAL;
+        }
 
         status = pboardobjgrp->pmuinithandle(g, pboardobjgrp);
 
@@ -202,11 +205,11 @@ static u32 devinit_get_clk_prog_table(struct gk20a *g,
         }
         hszfmt = header.header_size;
 
-        if (header.entry_size <= VBIOS_CLOCK_PROGRAMMING_TABLE_1X_ENTRY_SIZE_05)
+        if (header.entry_size <= VBIOS_CLOCK_PROGRAMMING_TABLE_1X_ENTRY_SIZE_05) {
                 szfmt = header.entry_size;
-        else if (header.entry_size <= VBIOS_CLOCK_PROGRAMMING_TABLE_1X_ENTRY_SIZE_0D)
+        } else if (header.entry_size <= VBIOS_CLOCK_PROGRAMMING_TABLE_1X_ENTRY_SIZE_0D) {
                 szfmt = header.entry_size;
-        else {
+        } else {
                 status = -EINVAL;
                 goto done;
         }
@@ -399,8 +402,9 @@ static u32 _clk_prog_pmudatainit_1x(struct gk20a *g,
         nvgpu_log_info(g, " ");
 
         status = _clk_prog_pmudatainit_super(g, board_obj_ptr, ppmudata);
-        if (status != 0)
+        if (status != 0) {
                 return status;
+        }
 
         pclk_prog_1x = (struct clk_prog_1x *)board_obj_ptr;
 
@@ -458,8 +462,9 @@ static u32 _clk_prog_pmudatainit_1x_master_ratio(struct gk20a *g,
         nvgpu_log_info(g, " ");
 
         status = _clk_prog_pmudatainit_1x_master(g, board_obj_ptr, ppmudata);
-        if (status != 0)
+        if (status != 0) {
                 return status;
+        }
 
         pclk_prog_1x_master_ratio =
                 (struct clk_prog_1x_master_ratio *)board_obj_ptr;
@@ -486,8 +491,9 @@ static u32 _clk_prog_pmudatainit_1x_master_table(struct gk20a *g,
         nvgpu_log_info(g, " ");
 
         status = _clk_prog_pmudatainit_1x_master(g, board_obj_ptr, ppmudata);
-        if (status != 0)
+        if (status != 0) {
                 return status;
+        }
 
         pclk_prog_1x_master_table =
                 (struct clk_prog_1x_master_table *)board_obj_ptr;
@@ -521,8 +527,9 @@ static u32 _clk_prog_1x_master_rail_construct_vf_point(struct gk20a *g,
                                 &pclk->clk_vf_pointobjs.super.super,
                                 &p_vf_point->super,
                                 *p_vf_point_idx);
-        if (status)
+        if (status) {
                 goto done;
+        }
 
         p_vf_rail->vf_point_idx_last = (*p_vf_point_idx)++;
 
@@ -540,8 +547,9 @@ static u32 clk_prog_construct_super(struct gk20a *g,
 
         status = boardobj_construct_super(g, ppboardobj,
                 size, pargs);
-        if (status)
+        if (status) {
                 return -EINVAL;
+        }
 
         pclkprog = (struct clk_prog *)*ppboardobj;
 
@@ -564,8 +572,9 @@ static u32 clk_prog_construct_1x(struct gk20a *g,
         nvgpu_log_info(g, " ");
         ptmpobj->type_mask |= BIT(CTRL_CLK_CLK_PROG_TYPE_1X);
         status = clk_prog_construct_super(g, ppboardobj, size, pargs);
-        if (status)
+        if (status) {
                 return -EINVAL;
+        }
 
         pclkprog = (struct clk_prog_1x *)*ppboardobj;
 
@@ -596,8 +605,9 @@ static u32 clk_prog_construct_1x_master(struct gk20a *g,
 
         ptmpobj->type_mask |= BIT(CTRL_CLK_CLK_PROG_TYPE_1X_MASTER);
         status = clk_prog_construct_1x(g, ppboardobj, size, pargs);
-        if (status)
+        if (status) {
                 return -EINVAL;
+        }
 
         pclkprog = (struct clk_prog_1x_master *)*ppboardobj;
 
@@ -647,13 +657,15 @@ static u32 clk_prog_construct_1x_master_ratio(struct gk20a *g,
         u32 slavesize = sizeof(struct ctrl_clk_clk_prog_1x_master_ratio_slave_entry) *
                 g->clk_pmu.clk_progobjs.slave_entry_count;
 
-        if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_CLK_PROG_TYPE_1X_MASTER_RATIO)
+        if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_CLK_PROG_TYPE_1X_MASTER_RATIO) {
                 return -EINVAL;
+        }
 
         ptmpobj->type_mask |= BIT(CTRL_CLK_CLK_PROG_TYPE_1X_MASTER_RATIO);
         status = clk_prog_construct_1x_master(g, ppboardobj, size, pargs);
-        if (status)
+        if (status) {
                 return -EINVAL;
+        }
 
         pclkprog = (struct clk_prog_1x_master_ratio *)*ppboardobj;
 
@@ -663,8 +675,9 @@ static u32 clk_prog_construct_1x_master_ratio(struct gk20a *g,
         pclkprog->p_slave_entries =
                 (struct ctrl_clk_clk_prog_1x_master_ratio_slave_entry *)
                 nvgpu_kzalloc(g, slavesize);
-        if (!pclkprog->p_slave_entries)
+        if (!pclkprog->p_slave_entries) {
                 return -ENOMEM;
+        }
 
         memset(pclkprog->p_slave_entries, CTRL_CLK_CLK_DOMAIN_INDEX_INVALID,
                 slavesize);
@@ -688,13 +701,15 @@ static u32 clk_prog_construct_1x_master_table(struct gk20a *g,
 
         nvgpu_log_info(g, "type - %x", BOARDOBJ_GET_TYPE(pargs));
 
-        if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_CLK_PROG_TYPE_1X_MASTER_TABLE)
+        if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_CLK_PROG_TYPE_1X_MASTER_TABLE) {
                 return -EINVAL;
+        }
 
         ptmpobj->type_mask |= BIT(CTRL_CLK_CLK_PROG_TYPE_1X_MASTER_TABLE);
         status = clk_prog_construct_1x_master(g, ppboardobj, size, pargs);
-        if (status)
+        if (status) {
                 return -EINVAL;
+        }
 
         pclkprog = (struct clk_prog_1x_master_table *)*ppboardobj;
 
@@ -716,8 +731,9 @@ static u32 clk_prog_construct_1x_master_table(struct gk20a *g,
         memcpy(pclkprog->p_slave_entries, ptmpprog->p_slave_entries, slavesize);
 
 exit:
-        if (status)
+        if (status) {
                 (*ppboardobj)->destruct(*ppboardobj);
+        }
 
         return status;
 }
@@ -749,8 +765,9 @@ static struct clk_prog *construct_clk_prog(struct gk20a *g, void *pargs)
         }
 
         if (status) {
-                if (board_obj_ptr)
+                if (board_obj_ptr) {
                         board_obj_ptr->destruct(board_obj_ptr);
+                }
                 return NULL;
         }
 
@@ -791,8 +808,9 @@ static u32 vfflatten_prog_1x_master(struct gk20a *g,
                 u8  i;
 
                 p_vf_rail = &p1xmaster->p_vf_entries[vf_rail_idx];
-                if (p_vf_rail->vfe_idx == CTRL_BOARDOBJ_IDX_INVALID)
+                if (p_vf_rail->vfe_idx == CTRL_BOARDOBJ_IDX_INVALID) {
                         continue;
+                }
 
                 p_vf_rail->vf_point_idx_first = vf_point_idx;
 
@@ -821,8 +839,9 @@ static u32 vfflatten_prog_1x_master(struct gk20a *g,
                                 status = _clk_prog_1x_master_rail_construct_vf_point(g, pclk,
                                         p1xmaster, p_vf_rail,
                                         &vf_point_data.vf_point, &vf_point_idx);
-                                if (status)
+                                if (status) {
                                         goto done;
+                                }
                         } while (step_count-- > 0);
                         break;
 
@@ -841,8 +860,9 @@ static u32 vfflatten_prog_1x_master(struct gk20a *g,
                                 status = _clk_prog_1x_master_rail_construct_vf_point(g, pclk,
                                         p1xmaster, p_vf_rail,
                                         &vf_point_data.vf_point, &vf_point_idx);
-                                if (status)
+                                if (status) {
                                         goto done;
+                                }
                         }
                         break;
                 }
@@ -878,19 +898,22 @@ static u32 vflookup_prog_1x_master
         int i;
         struct ctrl_clk_clk_prog_1x_master_ratio_slave_entry *pslaveents;
 
-        if ((*pclkmhz != 0) && (*pvoltuv != 0))
+        if ((*pclkmhz != 0) && (*pvoltuv != 0)) {
                 return -EINVAL;
+        }
 
         pclkprogobjs = &(pclk->clk_progobjs);
 
         slaveentrycount = pclkprogobjs->slave_entry_count;
 
         if (pclkprogobjs->vf_entry_count >
-                CTRL_CLK_CLK_PROG_1X_MASTER_VF_ENTRY_MAX_ENTRIES)
+                CTRL_CLK_CLK_PROG_1X_MASTER_VF_ENTRY_MAX_ENTRIES) {
                 return -EINVAL;
+        }
 
-        if (rail >= pclkprogobjs->vf_entry_count)
+        if (rail >= pclkprogobjs->vf_entry_count) {
                 return -EINVAL;
+        }
 
         pvfentry =  p1xmaster->p_vf_entries;
 
@@ -914,12 +937,14 @@ static u32 vflookup_prog_1x_master
                         pslaveents = p1xmasterratio->p_slave_entries;
                         for (i = 0; i < slaveentrycount;  i++) {
                                 if (pslaveents->clk_dom_idx ==
-                                        *slave_clk_domain)
+                                        *slave_clk_domain) {
                                         break;
+                                }
                                 pslaveents++;
                         }
-                        if (i == slaveentrycount)
+                        if (i == slaveentrycount) {
                                 return -EINVAL;
+                        }
                         clkmhz = (clkmhz * 100)/pslaveents->ratio;
                 } else {
                         /* only support ratio for now */
@@ -944,32 +969,36 @@ static u32 vflookup_prog_1x_master
                 pvfpoint = CLK_CLK_VF_POINT_GET(pclk,
                                 pvfentry->vf_point_idx_last);
                 /* above range? */
-                if (clkmhz > clkvfpointfreqmhzget(g, pvfpoint))
+                if (clkmhz > clkvfpointfreqmhzget(g, pvfpoint)) {
                         return -EINVAL;
+                }
 
                 for (j = pvfentry->vf_point_idx_last;
                         j >= pvfentry->vf_point_idx_first; j--) {
                         pvfpoint = CLK_CLK_VF_POINT_GET(pclk, j);
-                        if (clkmhz <= clkvfpointfreqmhzget(g, pvfpoint))
+                        if (clkmhz <= clkvfpointfreqmhzget(g, pvfpoint)) {
                                 voltuv = clkvfpointvoltageuvget(g, pvfpoint);
-                        else
+                        } else {
                                 break;
+                        }
                 }
         } else {        /* looking for clk? */
 
                 pvfpoint = CLK_CLK_VF_POINT_GET(pclk,
                                 pvfentry->vf_point_idx_first);
                 /* below range? */
-                if (voltuv < clkvfpointvoltageuvget(g, pvfpoint))
+                if (voltuv < clkvfpointvoltageuvget(g, pvfpoint)) {
                         return -EINVAL;
+                }
 
                 for (j = pvfentry->vf_point_idx_first;
                         j <= pvfentry->vf_point_idx_last; j++) {
                         pvfpoint = CLK_CLK_VF_POINT_GET(pclk, j);
-                        if (voltuv >= clkvfpointvoltageuvget(g, pvfpoint))
+                        if (voltuv >= clkvfpointvoltageuvget(g, pvfpoint)) {
                                 clkmhz = clkvfpointfreqmhzget(g, pvfpoint);
-                        else
+                        } else {
                                 break;
+                        }
                 }
         }
 
@@ -985,12 +1014,14 @@ static u32 vflookup_prog_1x_master
                         pslaveents = p1xmasterratio->p_slave_entries;
                         for (i = 0; i < slaveentrycount;  i++) {
                                 if (pslaveents->clk_dom_idx ==
-                                        *slave_clk_domain)
+                                        *slave_clk_domain) {
                                         break;
+                                }
                                 pslaveents++;
                         }
-                        if (i == slaveentrycount)
+                        if (i == slaveentrycount) {
                                 return -EINVAL;
+                        }
                         clkmhz = (clkmhz * pslaveents->ratio)/100;
                 } else {
                         /* only support ratio for now */
@@ -999,8 +1030,9 @@ static u32 vflookup_prog_1x_master
         }
         *pclkmhz = clkmhz;
         *pvoltuv = voltuv;
-        if ((clkmhz == 0) || (voltuv == 0))
+        if ((clkmhz == 0) || (voltuv == 0)) {
                 return -EINVAL;
+        }
         return 0;
 }
 
@@ -1022,17 +1054,20 @@ static u32 getfpoints_prog_1x_master
         u8 j;
         u32 fpointscount = 0;
 
-        if (pfpointscount == NULL)
+        if (pfpointscount == NULL) {
                 return -EINVAL;
+        }
 
         pclkprogobjs = &(pclk->clk_progobjs);
 
         if (pclkprogobjs->vf_entry_count >
-                CTRL_CLK_CLK_PROG_1X_MASTER_VF_ENTRY_MAX_ENTRIES)
+                CTRL_CLK_CLK_PROG_1X_MASTER_VF_ENTRY_MAX_ENTRIES) {
                 return -EINVAL;
+        }
 
-        if (rail >= pclkprogobjs->vf_entry_count)
+        if (rail >= pclkprogobjs->vf_entry_count) {
                 return -EINVAL;
+        }
 
         pvfentry =  p1xmaster->p_vf_entries;
 
@@ -1045,11 +1080,13 @@ static u32 getfpoints_prog_1x_master
                 pvfentry->vf_point_idx_first + 1;
 
         /* if pointer for freq data is NULL simply return count */
-        if (*ppfreqpointsinmhz == NULL)
+        if (*ppfreqpointsinmhz == NULL) {
                 goto done;
+        }
 
-        if (fpointscount > *pfpointscount)
+        if (fpointscount > *pfpointscount) {
                 return -ENOMEM;
+        }
         for (j = pvfentry->vf_point_idx_first;
                 j <= pvfentry->vf_point_idx_last; j++) {
                 pvfpoint = CLK_CLK_VF_POINT_GET(pclk, j);
@@ -1075,11 +1112,13 @@ static int getslaveclk_prog_1x_master(struct gk20a *g,
         u8 i;
         struct ctrl_clk_clk_prog_1x_master_ratio_slave_entry *pslaveents;
 
-        if (pclkmhz == NULL)
+        if (pclkmhz == NULL) {
                 return -EINVAL;
+        }
 
-        if (masterclkmhz == 0)
+        if (masterclkmhz == 0) {
                 return -EINVAL;
+        }
 
         *pclkmhz = 0;
         pclkprogobjs = &(pclk->clk_progobjs);
@@ -1094,12 +1133,14 @@ static int getslaveclk_prog_1x_master(struct gk20a *g,
                 pslaveents = p1xmasterratio->p_slave_entries;
                 for (i = 0; i < slaveentrycount;  i++) {
                         if (pslaveents->clk_dom_idx ==
-                                slave_clk_domain)
+                                slave_clk_domain) {
                                 break;
+                        }
                         pslaveents++;
                 }
-                if (i == slaveentrycount)
+                if (i == slaveentrycount) {
                         return -EINVAL;
+                }
                 *pclkmhz = (masterclkmhz * pslaveents->ratio)/100;
         } else {
                 /* only support ratio for now */
diff --git a/drivers/gpu/nvgpu/clk/clk_vf_point.c b/drivers/gpu/nvgpu/clk/clk_vf_point.c
index b459c012..5fc1d8e5 100644
--- a/drivers/gpu/nvgpu/clk/clk_vf_point.c
+++ b/drivers/gpu/nvgpu/clk/clk_vf_point.c
@@ -62,8 +62,9 @@ static u32 _clk_vf_points_pmudata_instget(struct gk20a *g,
         nvgpu_log_info(g, " ");
 
         /*check whether pmuboardobjgrp has a valid boardobj in index*/
-        if (idx >= CTRL_BOARDOBJGRP_E255_MAX_OBJECTS)
+        if (idx >= CTRL_BOARDOBJGRP_E255_MAX_OBJECTS) {
                 return -EINVAL;
+        }
 
         *ppboardobjpmudata = (struct nv_pmu_boardobj *)
                 &pgrp_set->objects[idx].data.board_obj;
@@ -81,8 +82,9 @@ static u32 _clk_vf_points_pmustatus_instget(struct gk20a *g,
                 pboardobjgrppmu;
 
         /*check whether pmuboardobjgrp has a valid boardobj in index*/
-        if (idx >= CTRL_BOARDOBJGRP_E255_MAX_OBJECTS)
+        if (idx >= CTRL_BOARDOBJGRP_E255_MAX_OBJECTS) {
                 return -EINVAL;
+        }
 
         *ppboardobjpmustatus = (struct nv_pmu_boardobj_query *)
                         &pgrp_get_status->objects[idx].data.board_obj;
@@ -145,8 +147,9 @@ u32 clk_vf_point_pmu_setup(struct gk20a *g)
 
         pboardobjgrp = &g->clk_pmu.clk_vf_pointobjs.super.super;
 
-        if (!pboardobjgrp->bconstructed)
+        if (!pboardobjgrp->bconstructed) {
                 return -EINVAL;
+        }
 
         status = pboardobjgrp->pmuinithandle(g, pboardobjgrp);
 
@@ -165,8 +168,9 @@ static u32 clk_vf_point_construct_super(struct gk20a *g,
 
         status = boardobj_construct_super(g, ppboardobj,
                 size, pargs);
-        if (status)
+        if (status) {
                 return -EINVAL;
+        }
 
         pclkvfpoint = (struct clk_vf_point *)*ppboardobj;
 
@@ -190,8 +194,9 @@ static u32 _clk_vf_point_pmudatainit_volt(struct gk20a *g,
         nvgpu_log_info(g, " ");
 
         status = _clk_vf_point_pmudatainit_super(g, board_obj_ptr, ppmudata);
-        if (status != 0)
+        if (status != 0) {
                 return status;
+        }
 
         pclk_vf_point_volt =
                 (struct clk_vf_point_volt *)board_obj_ptr;
@@ -217,8 +222,9 @@ static u32 _clk_vf_point_pmudatainit_freq(struct gk20a *g,
         nvgpu_log_info(g, " ");
 
         status = _clk_vf_point_pmudatainit_super(g, board_obj_ptr, ppmudata);
-        if (status != 0)
+        if (status != 0) {
                 return status;
+        }
 
         pclk_vf_point_freq =
                 (struct clk_vf_point_freq *)board_obj_ptr;
@@ -244,13 +250,15 @@ static u32 clk_vf_point_construct_volt(struct gk20a *g,
                         (struct clk_vf_point_volt *)pargs;
         u32 status = 0;
 
-        if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_CLK_VF_POINT_TYPE_VOLT)
+        if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_CLK_VF_POINT_TYPE_VOLT) {
                 return -EINVAL;
+        }
 
         ptmpobj->type_mask = BIT(CTRL_CLK_CLK_VF_POINT_TYPE_VOLT);
         status = clk_vf_point_construct_super(g, ppboardobj, size, pargs);
-        if (status)
+        if (status) {
                 return -EINVAL;
+        }
 
         pclkvfpoint = (struct clk_vf_point_volt *)*ppboardobj;
 
@@ -273,13 +281,15 @@ static u32 clk_vf_point_construct_freq(struct gk20a *g,
                         (struct clk_vf_point_freq *)pargs;
         u32 status = 0;
 
-        if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_CLK_VF_POINT_TYPE_FREQ)
+        if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_CLK_VF_POINT_TYPE_FREQ) {
                 return -EINVAL;
+        }
 
         ptmpobj->type_mask = BIT(CTRL_CLK_CLK_VF_POINT_TYPE_FREQ);
         status = clk_vf_point_construct_super(g, ppboardobj, size, pargs);
-        if (status)
+        if (status) {
                 return -EINVAL;
+        }
 
         pclkvfpoint = (struct clk_vf_point_freq *)*ppboardobj;
 
@@ -313,8 +323,9 @@ struct clk_vf_point *construct_clk_vf_point(struct gk20a *g, void *pargs)
                 return NULL;
         }
 
-        if (status)
+        if (status) {
                 return NULL;
+        }
 
         nvgpu_log_info(g, " Done");
 
@@ -332,8 +343,9 @@ static u32 _clk_vf_point_pmudatainit_super(struct gk20a *g,
         nvgpu_log_info(g, " ");
 
         status = boardobj_pmudatainit_super(g, board_obj_ptr, ppmudata);
-        if (status != 0)
+        if (status != 0) {
                 return status;
+        }
 
         pclk_vf_point =
                 (struct clk_vf_point *)board_obj_ptr;
diff --git a/drivers/gpu/nvgpu/clk/clk_vin.c b/drivers/gpu/nvgpu/clk/clk_vin.c
index d57522af..1c18b662 100644
--- a/drivers/gpu/nvgpu/clk/clk_vin.c
+++ b/drivers/gpu/nvgpu/clk/clk_vin.c
@@ -155,8 +155,9 @@ static u32 _clk_vin_devgrp_pmudata_instget(struct gk20a *g,
 
         /*check whether pmuboardobjgrp has a valid boardobj in index*/
         if (((u32)BIT(idx) &
-                pgrp_set->hdr.data.super.obj_mask.super.data[0]) == 0)
+                pgrp_set->hdr.data.super.obj_mask.super.data[0]) == 0) {
                 return -EINVAL;
+        }
 
         *ppboardobjpmudata = (struct nv_pmu_boardobj *)
                 &pgrp_set->objects[idx].data.board_obj;
@@ -175,8 +176,9 @@ static u32 _clk_vin_devgrp_pmustatus_instget(struct gk20a *g,
 
         /*check whether pmuboardobjgrp has a valid boardobj in index*/
         if (((u32)BIT(idx) &
-                pgrp_get_status->hdr.data.super.obj_mask.super.data[0]) == 0)
+                pgrp_get_status->hdr.data.super.obj_mask.super.data[0]) == 0) {
                 return -EINVAL;
+        }
 
         *ppboardobjpmustatus = (struct nv_pmu_boardobj_query *)
                         &pgrp_get_status->objects[idx].data.board_obj;
@@ -219,8 +221,9 @@ u32 clk_vin_sw_setup(struct gk20a *g)
         pboardobjgrp->pmustatusinstget  = _clk_vin_devgrp_pmustatus_instget;
 
         status = devinit_get_vin_device_table(g, &g->clk_pmu.avfs_vinobjs);
-        if (status)
+        if (status) {
                 goto done;
+        }
 
         /*update vin calibration to fuse */
         g->ops.pmu_ver.clk.clk_avfs_get_vin_cal_data(g, pvinobjs, pvindev);
@@ -249,8 +252,9 @@ u32 clk_vin_pmu_setup(struct gk20a *g)
 
         pboardobjgrp = &g->clk_pmu.avfs_vinobjs.super.super;
 
-        if (!pboardobjgrp->bconstructed)
+        if (!pboardobjgrp->bconstructed) {
                 return -EINVAL;
+        }
 
         status = pboardobjgrp->pmuinithandle(g, pboardobjgrp);
 
@@ -299,8 +303,9 @@ static u32 devinit_get_vin_device_table(struct gk20a *g,
                                 NV_VIN_DESC_FLAGS0_DISABLE_CONTROL);
         cal_type = BIOS_GET_FIELD(vin_desc_table_header.flags0,
                                 NV_VIN_DESC_FLAGS0_VIN_CAL_TYPE);
-        if(!cal_type)
+        if (!cal_type) {
                 cal_type = CTRL_CLK_VIN_CAL_TYPE_V10;
+        }
 
         switch (cal_type) {
         case CTRL_CLK_VIN_CAL_TYPE_V10:
@@ -333,8 +338,9 @@ static u32 devinit_get_vin_device_table(struct gk20a *g,
                 memcpy(&vin_desc_table_entry, vin_tbl_entry_ptr,
                        sizeof(struct vin_descriptor_entry_10));
 
-                if (vin_desc_table_entry.vin_device_type == CTRL_CLK_VIN_TYPE_DISABLED)
+                if (vin_desc_table_entry.vin_device_type == CTRL_CLK_VIN_TYPE_DISABLED) {
                         continue;
+                }
 
                 vin_device_data.boardobj.type =
                         (u8)vin_desc_table_entry.vin_device_type;
@@ -379,13 +385,15 @@ static u32 vin_device_construct_v10(struct gk20a *g,
         struct vin_device_v10 *ptmpvin_device_v10 = (struct vin_device_v10 *)pargs;
         u32 status = 0;
 
-        if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_VIN_TYPE_V10)
+        if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_VIN_TYPE_V10) {
                 return -EINVAL;
+        }
 
         ptmpobj->type_mask |= BIT(CTRL_CLK_VIN_TYPE_V10);
         status = vin_device_construct_super(g, ppboardobj, size, pargs);
-        if (status)
+        if (status) {
                 return -EINVAL;
+        }
 
         pvin_device_v10 = (struct vin_device_v10 *)*ppboardobj;
 
@@ -407,13 +415,15 @@ static u32 vin_device_construct_v20(struct gk20a *g,
         struct vin_device_v20 *ptmpvin_device_v20 = (struct vin_device_v20 *)pargs;
         u32 status = 0;
 
-        if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_VIN_TYPE_V20)
+        if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_VIN_TYPE_V20) {
                 return -EINVAL;
+        }
 
         ptmpobj->type_mask |= BIT(CTRL_CLK_VIN_TYPE_V20);
         status = vin_device_construct_super(g, ppboardobj, size, pargs);
-        if (status)
+        if (status) {
                 return -EINVAL;
+        }
 
         pvin_device_v20 = (struct vin_device_v20 *)*ppboardobj;
 
@@ -434,8 +444,9 @@ static u32 vin_device_construct_super(struct gk20a *g,
         u32 status = 0;
         status = boardobj_construct_super(g, ppboardobj, size, pargs);
 
-        if (status)
+        if (status) {
                 return -EINVAL;
+        }
 
         pvin_device = (struct vin_device *)*ppboardobj;
 
@@ -470,8 +481,9 @@ static struct vin_device *construct_vin_device(struct gk20a *g, void *pargs)
                 return NULL;
         };
 
-        if (status)
+        if (status) {
                 return NULL;
+        }
 
         nvgpu_log_info(g, " Done");
 
@@ -491,8 +503,9 @@ static u32 vin_device_init_pmudata_v10(struct gk20a *g,
         nvgpu_log_info(g, " ");
 
         status = vin_device_init_pmudata_super(g, board_obj_ptr, ppmudata);
-        if (status != 0)
+        if (status != 0) {
                 return status;
+        }
 
         pvin_dev_v20 = (struct vin_device_v20 *)board_obj_ptr;
         perf_pmu_data = (struct nv_pmu_clk_clk_vin_device_v10_boardobj_set *)
@@ -517,8 +530,9 @@ static u32 vin_device_init_pmudata_v20(struct gk20a *g,
         nvgpu_log_info(g, " ");
 
         status = vin_device_init_pmudata_super(g, board_obj_ptr, ppmudata);
-        if (status != 0)
+        if (status != 0) {
                 return status;
+        }
 
         pvin_dev_v20 = (struct vin_device_v20 *)board_obj_ptr;
         perf_pmu_data = (struct nv_pmu_clk_clk_vin_device_v20_boardobj_set *)
@@ -543,8 +557,9 @@ static u32 vin_device_init_pmudata_super(struct gk20a *g,
         nvgpu_log_info(g, " ");
 
         status = boardobj_pmudatainit_super(g, board_obj_ptr, ppmudata);
-        if (status != 0)
+        if (status != 0) {
                 return status;
+        }
 
         pvin_dev = (struct vin_device *)board_obj_ptr;
         perf_pmu_data = (struct nv_pmu_clk_clk_vin_device_boardobj_set *)