diff options
author | Lakshmanan M <lm@nvidia.com> | 2016-11-07 05:19:00 -0500 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-01-10 06:54:56 -0500 |
commit | eaeb5ff20f7663738cea2a415a7d923febf7ff85 (patch) | |
tree | fa81708fa3cbb8772fbce84a23bf4f71729acc33 | |
parent | 21c83717b1826c854fe131528379b634a3c892c8 (diff) |
gpu: nvgpu: Add thermal alert event handling
* Added the thermal alert event handling
* Added the thermal alert event PMU RPC
JIRA DNVGPU-130
Bug 200231080
Change-Id: If5ff2704e5aa6ad2f25123f72c3049a311dae5dc
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: http://git-master/r/1248964
(cherry picked from commit 1850e5a9b9dfa2f9df634e2f284ab282ad9f7fc8)
Reviewed-on: http://git-master/r/1253452
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.h | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/pmu_gk20a.c | 21 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/pmuif/gpmuiftherm.h | 22 |
3 files changed, 44 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 9e0dd64a..b955a84a 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h | |||
@@ -593,6 +593,7 @@ struct gpu_ops { | |||
593 | int (*get_internal_sensor_curr_temp)(struct gk20a *g, u32 *temp_f24_8); | 593 | int (*get_internal_sensor_curr_temp)(struct gk20a *g, u32 *temp_f24_8); |
594 | void (*get_internal_sensor_limits)(s32 *max_24_8, | 594 | void (*get_internal_sensor_limits)(s32 *max_24_8, |
595 | s32 *min_24_8); | 595 | s32 *min_24_8); |
596 | u32 (*configure_therm_alert)(struct gk20a *g, s32 curr_warn_temp); | ||
596 | } therm; | 597 | } therm; |
597 | struct { | 598 | struct { |
598 | bool (*is_pmu_supported)(struct gk20a *g); | 599 | bool (*is_pmu_supported)(struct gk20a *g); |
diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c index 56ebda1a..58dd6f43 100644 --- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c | |||
@@ -4029,6 +4029,24 @@ static int pmu_handle_perfmon_event(struct pmu_gk20a *pmu, | |||
4029 | } | 4029 | } |
4030 | 4030 | ||
4031 | 4031 | ||
4032 | static int pmu_handle_therm_event(struct pmu_gk20a *pmu, | ||
4033 | struct nv_pmu_therm_msg *msg) | ||
4034 | { | ||
4035 | gk20a_dbg_fn(""); | ||
4036 | |||
4037 | switch (msg->msg_type) { | ||
4038 | case NV_PMU_THERM_MSG_ID_EVENT_HW_SLOWDOWN_NOTIFICATION: | ||
4039 | gk20a_dbg_pmu("received asserted event mask %d", | ||
4040 | msg->hw_slct_msg.mask); | ||
4041 | break; | ||
4042 | default: | ||
4043 | gk20a_dbg_pmu("unkown therm event received %d", msg->msg_type); | ||
4044 | break; | ||
4045 | } | ||
4046 | |||
4047 | return 0; | ||
4048 | } | ||
4049 | |||
4032 | static int pmu_handle_event(struct pmu_gk20a *pmu, struct pmu_msg *msg) | 4050 | static int pmu_handle_event(struct pmu_gk20a *pmu, struct pmu_msg *msg) |
4033 | { | 4051 | { |
4034 | int err = 0; | 4052 | int err = 0; |
@@ -4048,6 +4066,9 @@ static int pmu_handle_event(struct pmu_gk20a *pmu, struct pmu_msg *msg) | |||
4048 | WARN_ON(1); | 4066 | WARN_ON(1); |
4049 | } | 4067 | } |
4050 | break; | 4068 | break; |
4069 | case PMU_UNIT_THERM: | ||
4070 | err = pmu_handle_therm_event(pmu, &msg->msg.therm); | ||
4071 | break; | ||
4051 | default: | 4072 | default: |
4052 | break; | 4073 | break; |
4053 | } | 4074 | } |
diff --git a/drivers/gpu/nvgpu/pmuif/gpmuiftherm.h b/drivers/gpu/nvgpu/pmuif/gpmuiftherm.h index 9c10e93c..c87fe8a8 100644 --- a/drivers/gpu/nvgpu/pmuif/gpmuiftherm.h +++ b/drivers/gpu/nvgpu/pmuif/gpmuiftherm.h | |||
@@ -18,8 +18,12 @@ | |||
18 | 18 | ||
19 | #define NV_PMU_THERM_CMD_ID_RPC 0x00000002 | 19 | #define NV_PMU_THERM_CMD_ID_RPC 0x00000002 |
20 | #define NV_PMU_THERM_MSG_ID_RPC 0x00000002 | 20 | #define NV_PMU_THERM_MSG_ID_RPC 0x00000002 |
21 | #define NV_PMU_THERM_RPC_ID_SLCT 0x00000000 | ||
21 | #define NV_PMU_THERM_RPC_ID_SLCT_EVENT_TEMP_TH_SET 0x00000006 | 22 | #define NV_PMU_THERM_RPC_ID_SLCT_EVENT_TEMP_TH_SET 0x00000006 |
22 | #define NV_PMU_THERM_EVENT_THERMAL_1 0x00000004 | 23 | #define NV_PMU_THERM_EVENT_THERMAL_1 0x00000004 |
24 | #define NV_PMU_THERM_CMD_ID_HW_SLOWDOWN_NOTIFICATION 0x00000001 | ||
25 | #define NV_RM_PMU_THERM_HW_SLOWDOWN_NOTIFICATION_REQUEST_ENABLE 0x00000001 | ||
26 | #define NV_PMU_THERM_MSG_ID_EVENT_HW_SLOWDOWN_NOTIFICATION 0x00000001 | ||
23 | 27 | ||
24 | struct nv_pmu_therm_rpc_slct_event_temp_th_set { | 28 | struct nv_pmu_therm_rpc_slct_event_temp_th_set { |
25 | s32 temp_threshold; | 29 | s32 temp_threshold; |
@@ -27,10 +31,16 @@ struct nv_pmu_therm_rpc_slct_event_temp_th_set { | |||
27 | flcn_status flcn_stat; | 31 | flcn_status flcn_stat; |
28 | }; | 32 | }; |
29 | 33 | ||
34 | struct nv_pmu_therm_rpc_slct { | ||
35 | u32 mask_enabled; | ||
36 | flcn_status flcn_stat; | ||
37 | }; | ||
38 | |||
30 | struct nv_pmu_therm_rpc { | 39 | struct nv_pmu_therm_rpc { |
31 | u8 function; | 40 | u8 function; |
32 | bool b_supported; | 41 | bool b_supported; |
33 | union { | 42 | union { |
43 | struct nv_pmu_therm_rpc_slct slct; | ||
34 | struct nv_pmu_therm_rpc_slct_event_temp_th_set slct_event_temp_th_set; | 44 | struct nv_pmu_therm_rpc_slct_event_temp_th_set slct_event_temp_th_set; |
35 | } params; | 45 | } params; |
36 | }; | 46 | }; |
@@ -41,6 +51,11 @@ struct nv_pmu_therm_cmd_rpc { | |||
41 | struct nv_pmu_allocation request; | 51 | struct nv_pmu_allocation request; |
42 | }; | 52 | }; |
43 | 53 | ||
54 | struct nv_pmu_therm_cmd_hw_slowdown_notification { | ||
55 | u8 cmd_type; | ||
56 | u8 request; | ||
57 | }; | ||
58 | |||
44 | #define NV_PMU_THERM_CMD_RPC_ALLOC_OFFSET \ | 59 | #define NV_PMU_THERM_CMD_RPC_ALLOC_OFFSET \ |
45 | offsetof(struct nv_pmu_therm_cmd_rpc, request) | 60 | offsetof(struct nv_pmu_therm_cmd_rpc, request) |
46 | 61 | ||
@@ -48,6 +63,7 @@ struct nv_pmu_therm_cmd { | |||
48 | union { | 63 | union { |
49 | u8 cmd_type; | 64 | u8 cmd_type; |
50 | struct nv_pmu_therm_cmd_rpc rpc; | 65 | struct nv_pmu_therm_cmd_rpc rpc; |
66 | struct nv_pmu_therm_cmd_hw_slowdown_notification hw_slct_notification; | ||
51 | }; | 67 | }; |
52 | }; | 68 | }; |
53 | 69 | ||
@@ -57,6 +73,11 @@ struct nv_pmu_therm_msg_rpc { | |||
57 | struct nv_pmu_allocation response; | 73 | struct nv_pmu_allocation response; |
58 | }; | 74 | }; |
59 | 75 | ||
76 | struct nv_pmu_therm_msg_event_hw_slowdown_notification { | ||
77 | u8 msg_type; | ||
78 | u32 mask; | ||
79 | }; | ||
80 | |||
60 | #define NV_PMU_THERM_MSG_RPC_ALLOC_OFFSET \ | 81 | #define NV_PMU_THERM_MSG_RPC_ALLOC_OFFSET \ |
61 | offsetof(struct nv_pmu_therm_msg_rpc, response) | 82 | offsetof(struct nv_pmu_therm_msg_rpc, response) |
62 | 83 | ||
@@ -64,6 +85,7 @@ struct nv_pmu_therm_msg { | |||
64 | union { | 85 | union { |
65 | u8 msg_type; | 86 | u8 msg_type; |
66 | struct nv_pmu_therm_msg_rpc rpc; | 87 | struct nv_pmu_therm_msg_rpc rpc; |
88 | struct nv_pmu_therm_msg_event_hw_slowdown_notification hw_slct_msg; | ||
67 | }; | 89 | }; |
68 | }; | 90 | }; |
69 | 91 | ||