diff options
author | Terje Bergstrom <tbergstrom@nvidia.com> | 2018-05-24 18:25:41 -0400 |
---|---|---|
committer | Tejal Kudav <tkudav@nvidia.com> | 2018-06-14 09:44:07 -0400 |
commit | d71d38087ded679f60714dae3a859523a19df04f (patch) | |
tree | 61439d294705ef91ce08ae4c02d4921eec943283 | |
parent | 5215d65c25b5e76c19d9d12b03c52f69e2d40227 (diff) |
gpu: nvgpu: Separate timer from bus
Code touching timer registers was combined with bus code. They're two
logically separate register spaces, so separate the code accordingly.
JIRA NVGPU-588
Change-Id: I40e2925ff156669f41ddc1f2e7714f92a2da367b
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1730893
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
24 files changed, 212 insertions, 117 deletions
diff --git a/drivers/gpu/nvgpu/Makefile b/drivers/gpu/nvgpu/Makefile index 8f2e72d6..67a9c7f1 100644 --- a/drivers/gpu/nvgpu/Makefile +++ b/drivers/gpu/nvgpu/Makefile | |||
@@ -23,9 +23,10 @@ obj-$(CONFIG_GK20A) := nvgpu.o | |||
23 | # OS independent parts of nvgpu. The work to collect files here | 23 | # OS independent parts of nvgpu. The work to collect files here |
24 | # is in progress. | 24 | # is in progress. |
25 | 25 | ||
26 | nvgpu-y += common/bus/bus.o \ | 26 | nvgpu-y += common/bus/bus_gk20a.o \ |
27 | common/bus/bus_gk20a.o \ | 27 | common/bus/bus_gm20b.o \ |
28 | common/bus/bus_gm20b.o | 28 | common/ptimer/ptimer.o \ |
29 | common/ptimer/ptimer_gk20a.o | ||
29 | 30 | ||
30 | nvgpu-y += \ | 31 | nvgpu-y += \ |
31 | common/linux/kmem.o \ | 32 | common/linux/kmem.o \ |
diff --git a/drivers/gpu/nvgpu/clk/clk_arb.c b/drivers/gpu/nvgpu/clk/clk_arb.c index 67e452f0..539cd33e 100644 --- a/drivers/gpu/nvgpu/clk/clk_arb.c +++ b/drivers/gpu/nvgpu/clk/clk_arb.c | |||
@@ -759,7 +759,7 @@ static void nvgpu_clk_arb_run_arbiter_cb(struct nvgpu_clk_arb *arb) | |||
759 | goto exit_arb; | 759 | goto exit_arb; |
760 | 760 | ||
761 | #ifdef CONFIG_DEBUG_FS | 761 | #ifdef CONFIG_DEBUG_FS |
762 | g->ops.bus.read_ptimer(g, &t0); | 762 | g->ops.ptimer.read_ptimer(g, &t0); |
763 | #endif | 763 | #endif |
764 | 764 | ||
765 | /* Only one arbiter should be running */ | 765 | /* Only one arbiter should be running */ |
@@ -958,7 +958,7 @@ static void nvgpu_clk_arb_run_arbiter_cb(struct nvgpu_clk_arb *arb) | |||
958 | nvgpu_cond_signal_interruptible(&arb->request_wq); | 958 | nvgpu_cond_signal_interruptible(&arb->request_wq); |
959 | 959 | ||
960 | #ifdef CONFIG_DEBUG_FS | 960 | #ifdef CONFIG_DEBUG_FS |
961 | g->ops.bus.read_ptimer(g, &t1); | 961 | g->ops.ptimer.read_ptimer(g, &t1); |
962 | 962 | ||
963 | debug = arb->debug == &arb->debug_pool[0] ? | 963 | debug = arb->debug == &arb->debug_pool[0] ? |
964 | &arb->debug_pool[1] : &arb->debug_pool[0]; | 964 | &arb->debug_pool[1] : &arb->debug_pool[0]; |
diff --git a/drivers/gpu/nvgpu/common/bus/bus_gk20a.c b/drivers/gpu/nvgpu/common/bus/bus_gk20a.c index 9f0446c6..532fc9c6 100644 --- a/drivers/gpu/nvgpu/common/bus/bus_gk20a.c +++ b/drivers/gpu/nvgpu/common/bus/bus_gk20a.c | |||
@@ -28,7 +28,6 @@ | |||
28 | #include "bus_gk20a.h" | 28 | #include "bus_gk20a.h" |
29 | 29 | ||
30 | #include <nvgpu/hw/gk20a/hw_bus_gk20a.h> | 30 | #include <nvgpu/hw/gk20a/hw_bus_gk20a.h> |
31 | #include <nvgpu/hw/gk20a/hw_timer_gk20a.h> | ||
32 | 31 | ||
33 | void gk20a_bus_init_hw(struct gk20a *g) | 32 | void gk20a_bus_init_hw(struct gk20a *g) |
34 | { | 33 | { |
@@ -45,7 +44,7 @@ void gk20a_bus_init_hw(struct gk20a *g) | |||
45 | 44 | ||
46 | void gk20a_bus_isr(struct gk20a *g) | 45 | void gk20a_bus_isr(struct gk20a *g) |
47 | { | 46 | { |
48 | u32 val, save0, save1, fecs_errcode = 0; | 47 | u32 val; |
49 | 48 | ||
50 | val = gk20a_readl(g, bus_intr_0_r()); | 49 | val = gk20a_readl(g, bus_intr_0_r()); |
51 | 50 | ||
@@ -53,80 +52,13 @@ void gk20a_bus_isr(struct gk20a *g) | |||
53 | bus_intr_0_pri_fecserr_m() | | 52 | bus_intr_0_pri_fecserr_m() | |
54 | bus_intr_0_pri_timeout_m())) { | 53 | bus_intr_0_pri_timeout_m())) { |
55 | 54 | ||
56 | save0 = gk20a_readl(g, timer_pri_timeout_save_0_r()); | 55 | g->ops.ptimer.isr(g); |
57 | if (timer_pri_timeout_save_0_fecs_tgt_v(save0)) { | ||
58 | /* | ||
59 | * write & addr fields in timeout_save0 | ||
60 | * might not be reliable | ||
61 | */ | ||
62 | fecs_errcode = gk20a_readl(g, | ||
63 | timer_pri_timeout_fecs_errcode_r()); | ||
64 | } | ||
65 | |||
66 | save1 = gk20a_readl(g, timer_pri_timeout_save_1_r()); | ||
67 | nvgpu_err(g, "NV_PBUS_INTR_0: 0x%08x ADR 0x%08x " | ||
68 | "%s DATA 0x%08x ", | ||
69 | val, | ||
70 | timer_pri_timeout_save_0_addr_v(save0) << 2, | ||
71 | timer_pri_timeout_save_0_write_v(save0) ? | ||
72 | "WRITE" : "READ", save1); | ||
73 | |||
74 | gk20a_writel(g, timer_pri_timeout_save_0_r(), 0); | ||
75 | gk20a_writel(g, timer_pri_timeout_save_1_r(), 0); | ||
76 | |||
77 | if (fecs_errcode) { | ||
78 | nvgpu_err(g, "FECS_ERRCODE 0x%08x", fecs_errcode); | ||
79 | if (g->ops.priv_ring.decode_error_code) | ||
80 | g->ops.priv_ring.decode_error_code(g, | ||
81 | fecs_errcode); | ||
82 | } | ||
83 | |||
84 | } else { | 56 | } else { |
85 | nvgpu_err(g, "Unhandled NV_PBUS_INTR_0: 0x%08x", val); | 57 | nvgpu_err(g, "Unhandled NV_PBUS_INTR_0: 0x%08x", val); |
86 | } | 58 | } |
87 | gk20a_writel(g, bus_intr_0_r(), val); | 59 | gk20a_writel(g, bus_intr_0_r(), val); |
88 | } | 60 | } |
89 | 61 | ||
90 | int gk20a_read_ptimer(struct gk20a *g, u64 *value) | ||
91 | { | ||
92 | const unsigned int max_iterations = 3; | ||
93 | unsigned int i = 0; | ||
94 | u32 gpu_timestamp_hi_prev = 0; | ||
95 | |||
96 | if (!value) | ||
97 | return -EINVAL; | ||
98 | |||
99 | /* Note. The GPU nanosecond timer consists of two 32-bit | ||
100 | * registers (high & low). To detect a possible low register | ||
101 | * wrap-around between the reads, we need to read the high | ||
102 | * register before and after low. The wraparound happens | ||
103 | * approximately once per 4 secs. */ | ||
104 | |||
105 | /* get initial gpu_timestamp_hi value */ | ||
106 | gpu_timestamp_hi_prev = gk20a_readl(g, timer_time_1_r()); | ||
107 | |||
108 | for (i = 0; i < max_iterations; ++i) { | ||
109 | u32 gpu_timestamp_hi = 0; | ||
110 | u32 gpu_timestamp_lo = 0; | ||
111 | |||
112 | gpu_timestamp_lo = gk20a_readl(g, timer_time_0_r()); | ||
113 | gpu_timestamp_hi = gk20a_readl(g, timer_time_1_r()); | ||
114 | |||
115 | if (gpu_timestamp_hi == gpu_timestamp_hi_prev) { | ||
116 | *value = (((u64)gpu_timestamp_hi) << 32) | | ||
117 | gpu_timestamp_lo; | ||
118 | return 0; | ||
119 | } | ||
120 | |||
121 | /* wrap-around detected, retry */ | ||
122 | gpu_timestamp_hi_prev = gpu_timestamp_hi; | ||
123 | } | ||
124 | |||
125 | /* too many iterations, bail out */ | ||
126 | nvgpu_err(g, "failed to read ptimer"); | ||
127 | return -EBUSY; | ||
128 | } | ||
129 | |||
130 | int gk20a_bus_bar1_bind(struct gk20a *g, struct nvgpu_mem *bar1_inst) | 62 | int gk20a_bus_bar1_bind(struct gk20a *g, struct nvgpu_mem *bar1_inst) |
131 | { | 63 | { |
132 | u64 iova = nvgpu_inst_block_addr(g, bar1_inst); | 64 | u64 iova = nvgpu_inst_block_addr(g, bar1_inst); |
diff --git a/drivers/gpu/nvgpu/common/bus/bus_gk20a.h b/drivers/gpu/nvgpu/common/bus/bus_gk20a.h index fe1cad58..541472cd 100644 --- a/drivers/gpu/nvgpu/common/bus/bus_gk20a.h +++ b/drivers/gpu/nvgpu/common/bus/bus_gk20a.h | |||
@@ -25,13 +25,11 @@ | |||
25 | #include <nvgpu/types.h> | 25 | #include <nvgpu/types.h> |
26 | 26 | ||
27 | struct gk20a; | 27 | struct gk20a; |
28 | struct gpu_ops; | ||
29 | struct nvgpu_mem; | 28 | struct nvgpu_mem; |
30 | struct nvgpu_sgt; | 29 | struct nvgpu_sgt; |
31 | struct nvgpu_sgl; | 30 | struct nvgpu_sgl; |
32 | 31 | ||
33 | void gk20a_bus_isr(struct gk20a *g); | 32 | void gk20a_bus_isr(struct gk20a *g); |
34 | int gk20a_read_ptimer(struct gk20a *g, u64 *value); | ||
35 | void gk20a_bus_init_hw(struct gk20a *g); | 33 | void gk20a_bus_init_hw(struct gk20a *g); |
36 | int gk20a_bus_bar1_bind(struct gk20a *g, struct nvgpu_mem *bar1_inst); | 34 | int gk20a_bus_bar1_bind(struct gk20a *g, struct nvgpu_mem *bar1_inst); |
37 | u32 gk20a_bus_set_bar0_window(struct gk20a *g, struct nvgpu_mem *mem, | 35 | u32 gk20a_bus_set_bar0_window(struct gk20a *g, struct nvgpu_mem *mem, |
diff --git a/drivers/gpu/nvgpu/common/bus/bus_gm20b.c b/drivers/gpu/nvgpu/common/bus/bus_gm20b.c index 3e27053a..669cb0ae 100644 --- a/drivers/gpu/nvgpu/common/bus/bus_gm20b.c +++ b/drivers/gpu/nvgpu/common/bus/bus_gm20b.c | |||
@@ -23,13 +23,10 @@ | |||
23 | */ | 23 | */ |
24 | 24 | ||
25 | #include <nvgpu/timers.h> | 25 | #include <nvgpu/timers.h> |
26 | #include <nvgpu/bus.h> | ||
27 | #include <nvgpu/mm.h> | 26 | #include <nvgpu/mm.h> |
28 | #include <nvgpu/enabled.h> | 27 | #include <nvgpu/enabled.h> |
29 | 28 | ||
30 | #include "gk20a/gk20a.h" | 29 | #include "gk20a/gk20a.h" |
31 | |||
32 | #include "bus_gk20a.h" | ||
33 | #include "bus_gm20b.h" | 30 | #include "bus_gm20b.h" |
34 | 31 | ||
35 | #include <nvgpu/hw/gm20b/hw_bus_gm20b.h> | 32 | #include <nvgpu/hw/gm20b/hw_bus_gm20b.h> |
diff --git a/drivers/gpu/nvgpu/common/bus/bus_gm20b.h b/drivers/gpu/nvgpu/common/bus/bus_gm20b.h index 961b906a..1700a7e7 100644 --- a/drivers/gpu/nvgpu/common/bus/bus_gm20b.h +++ b/drivers/gpu/nvgpu/common/bus/bus_gm20b.h | |||
@@ -22,8 +22,8 @@ | |||
22 | * DEALINGS IN THE SOFTWARE. | 22 | * DEALINGS IN THE SOFTWARE. |
23 | */ | 23 | */ |
24 | 24 | ||
25 | #ifndef _NVGPU_GM20B_BUS | 25 | #ifndef NVGPU_GM20B_BUS |
26 | #define _NVGPU_GM20B_BUS | 26 | #define NVGPU_GM20B_BUS |
27 | 27 | ||
28 | struct gk20a; | 28 | struct gk20a; |
29 | struct nvgpu_mem; | 29 | struct nvgpu_mem; |
diff --git a/drivers/gpu/nvgpu/common/linux/ctxsw_trace.c b/drivers/gpu/nvgpu/common/linux/ctxsw_trace.c index 2f0c3e89..a335988a 100644 --- a/drivers/gpu/nvgpu/common/linux/ctxsw_trace.c +++ b/drivers/gpu/nvgpu/common/linux/ctxsw_trace.c | |||
@@ -702,7 +702,7 @@ void gk20a_ctxsw_trace_channel_reset(struct gk20a *g, struct channel_gk20a *ch) | |||
702 | if (!g->ctxsw_trace) | 702 | if (!g->ctxsw_trace) |
703 | return; | 703 | return; |
704 | 704 | ||
705 | g->ops.bus.read_ptimer(g, &entry.timestamp); | 705 | g->ops.ptimer.read_ptimer(g, &entry.timestamp); |
706 | gk20a_ctxsw_trace_write(g, &entry); | 706 | gk20a_ctxsw_trace_write(g, &entry); |
707 | gk20a_ctxsw_trace_wake_up(g, 0); | 707 | gk20a_ctxsw_trace_wake_up(g, 0); |
708 | #endif | 708 | #endif |
@@ -722,7 +722,7 @@ void gk20a_ctxsw_trace_tsg_reset(struct gk20a *g, struct tsg_gk20a *tsg) | |||
722 | if (!g->ctxsw_trace) | 722 | if (!g->ctxsw_trace) |
723 | return; | 723 | return; |
724 | 724 | ||
725 | g->ops.bus.read_ptimer(g, &entry.timestamp); | 725 | g->ops.ptimer.read_ptimer(g, &entry.timestamp); |
726 | gk20a_ctxsw_trace_write(g, &entry); | 726 | gk20a_ctxsw_trace_write(g, &entry); |
727 | gk20a_ctxsw_trace_wake_up(g, 0); | 727 | gk20a_ctxsw_trace_wake_up(g, 0); |
728 | #endif | 728 | #endif |
diff --git a/drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c b/drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c index ee0739c9..cda2ce46 100644 --- a/drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c +++ b/drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c | |||
@@ -24,7 +24,7 @@ | |||
24 | #include <nvgpu/bitops.h> | 24 | #include <nvgpu/bitops.h> |
25 | #include <nvgpu/kmem.h> | 25 | #include <nvgpu/kmem.h> |
26 | #include <nvgpu/bug.h> | 26 | #include <nvgpu/bug.h> |
27 | #include <nvgpu/bus.h> | 27 | #include <nvgpu/ptimer.h> |
28 | #include <nvgpu/vidmem.h> | 28 | #include <nvgpu/vidmem.h> |
29 | #include <nvgpu/log.h> | 29 | #include <nvgpu/log.h> |
30 | #include <nvgpu/enabled.h> | 30 | #include <nvgpu/enabled.h> |
@@ -811,7 +811,7 @@ static int nvgpu_gpu_get_cpu_time_correlation_info( | |||
811 | return -ENOMEM; | 811 | return -ENOMEM; |
812 | } | 812 | } |
813 | 813 | ||
814 | err = g->ops.bus.get_timestamps_zipper(g, | 814 | err = g->ops.ptimer.get_timestamps_zipper(g, |
815 | args->source_id, args->count, samples); | 815 | args->source_id, args->count, samples); |
816 | if (!err) { | 816 | if (!err) { |
817 | for (i = 0; i < args->count; i++) { | 817 | for (i = 0; i < args->count; i++) { |
@@ -836,7 +836,7 @@ static int nvgpu_gpu_get_gpu_time( | |||
836 | if (err) | 836 | if (err) |
837 | return err; | 837 | return err; |
838 | 838 | ||
839 | err = g->ops.bus.read_ptimer(g, &time); | 839 | err = g->ops.ptimer.read_ptimer(g, &time); |
840 | if (!err) | 840 | if (!err) |
841 | args->gpu_timestamp = time; | 841 | args->gpu_timestamp = time; |
842 | 842 | ||
diff --git a/drivers/gpu/nvgpu/common/linux/vgpu/vgpu_linux.c b/drivers/gpu/nvgpu/common/linux/vgpu/vgpu_linux.c index 90fbc079..0d224eb9 100644 --- a/drivers/gpu/nvgpu/common/linux/vgpu/vgpu_linux.c +++ b/drivers/gpu/nvgpu/common/linux/vgpu/vgpu_linux.c | |||
@@ -27,7 +27,6 @@ | |||
27 | #include <nvgpu/bug.h> | 27 | #include <nvgpu/bug.h> |
28 | #include <nvgpu/enabled.h> | 28 | #include <nvgpu/enabled.h> |
29 | #include <nvgpu/debug.h> | 29 | #include <nvgpu/debug.h> |
30 | #include <nvgpu/bus.h> | ||
31 | #include <nvgpu/soc.h> | 30 | #include <nvgpu/soc.h> |
32 | #include <nvgpu/ctxsw_trace.h> | 31 | #include <nvgpu/ctxsw_trace.h> |
33 | #include <nvgpu/defaults.h> | 32 | #include <nvgpu/defaults.h> |
diff --git a/drivers/gpu/nvgpu/common/bus/bus.c b/drivers/gpu/nvgpu/common/ptimer/ptimer.c index 3889512a..d5f9470d 100644 --- a/drivers/gpu/nvgpu/common/bus/bus.c +++ b/drivers/gpu/nvgpu/common/ptimer/ptimer.c | |||
@@ -20,7 +20,7 @@ | |||
20 | * DEALINGS IN THE SOFTWARE. | 20 | * DEALINGS IN THE SOFTWARE. |
21 | */ | 21 | */ |
22 | 22 | ||
23 | #include <nvgpu/bus.h> | 23 | #include <nvgpu/ptimer.h> |
24 | 24 | ||
25 | #include "gk20a/gk20a.h" | 25 | #include "gk20a/gk20a.h" |
26 | 26 | ||
@@ -38,7 +38,7 @@ int nvgpu_get_timestamps_zipper(struct gk20a *g, | |||
38 | } | 38 | } |
39 | 39 | ||
40 | for (i = 0; i < count; i++) { | 40 | for (i = 0; i < count; i++) { |
41 | err = g->ops.bus.read_ptimer(g, &samples[i].gpu_timestamp); | 41 | err = g->ops.ptimer.read_ptimer(g, &samples[i].gpu_timestamp); |
42 | if (err) | 42 | if (err) |
43 | return err; | 43 | return err; |
44 | 44 | ||
diff --git a/drivers/gpu/nvgpu/common/ptimer/ptimer_gk20a.c b/drivers/gpu/nvgpu/common/ptimer/ptimer_gk20a.c new file mode 100644 index 00000000..52e47601 --- /dev/null +++ b/drivers/gpu/nvgpu/common/ptimer/ptimer_gk20a.c | |||
@@ -0,0 +1,100 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved. | ||
3 | * | ||
4 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
5 | * copy of this software and associated documentation files (the "Software"), | ||
6 | * to deal in the Software without restriction, including without limitation | ||
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
8 | * and/or sell copies of the Software, and to permit persons to whom the | ||
9 | * Software is furnished to do so, subject to the following conditions: | ||
10 | * | ||
11 | * The above copyright notice and this permission notice shall be included in | ||
12 | * all copies or substantial portions of the Software. | ||
13 | * | ||
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
17 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | ||
18 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | ||
19 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | ||
20 | * DEALINGS IN THE SOFTWARE. | ||
21 | */ | ||
22 | |||
23 | #include <nvgpu/log.h> | ||
24 | |||
25 | #include "gk20a/gk20a.h" | ||
26 | #include "ptimer_gk20a.h" | ||
27 | |||
28 | #include <nvgpu/hw/gk20a/hw_timer_gk20a.h> | ||
29 | |||
30 | void gk20a_ptimer_isr(struct gk20a *g) | ||
31 | { | ||
32 | u32 save0, save1, fecs_errcode = 0; | ||
33 | |||
34 | save0 = gk20a_readl(g, timer_pri_timeout_save_0_r()); | ||
35 | if (timer_pri_timeout_save_0_fecs_tgt_v(save0)) { | ||
36 | /* | ||
37 | * write & addr fields in timeout_save0 | ||
38 | * might not be reliable | ||
39 | */ | ||
40 | fecs_errcode = gk20a_readl(g, | ||
41 | timer_pri_timeout_fecs_errcode_r()); | ||
42 | } | ||
43 | |||
44 | save1 = gk20a_readl(g, timer_pri_timeout_save_1_r()); | ||
45 | nvgpu_err(g, "PRI timeout: ADR 0x%08x " | ||
46 | "%s DATA 0x%08x", | ||
47 | timer_pri_timeout_save_0_addr_v(save0) << 2, | ||
48 | timer_pri_timeout_save_0_write_v(save0) ? | ||
49 | "WRITE" : "READ", save1); | ||
50 | |||
51 | gk20a_writel(g, timer_pri_timeout_save_0_r(), 0); | ||
52 | gk20a_writel(g, timer_pri_timeout_save_1_r(), 0); | ||
53 | |||
54 | if (fecs_errcode) { | ||
55 | nvgpu_err(g, "FECS_ERRCODE 0x%08x", fecs_errcode); | ||
56 | if (g->ops.priv_ring.decode_error_code) | ||
57 | g->ops.priv_ring.decode_error_code(g, | ||
58 | fecs_errcode); | ||
59 | } | ||
60 | } | ||
61 | |||
62 | int gk20a_read_ptimer(struct gk20a *g, u64 *value) | ||
63 | { | ||
64 | const unsigned int max_iterations = 3; | ||
65 | unsigned int i = 0; | ||
66 | u32 gpu_timestamp_hi_prev = 0; | ||
67 | |||
68 | if (!value) | ||
69 | return -EINVAL; | ||
70 | |||
71 | /* Note. The GPU nanosecond timer consists of two 32-bit | ||
72 | * registers (high & low). To detect a possible low register | ||
73 | * wrap-around between the reads, we need to read the high | ||
74 | * register before and after low. The wraparound happens | ||
75 | * approximately once per 4 secs. */ | ||
76 | |||
77 | /* get initial gpu_timestamp_hi value */ | ||
78 | gpu_timestamp_hi_prev = gk20a_readl(g, timer_time_1_r()); | ||
79 | |||
80 | for (i = 0; i < max_iterations; ++i) { | ||
81 | u32 gpu_timestamp_hi = 0; | ||
82 | u32 gpu_timestamp_lo = 0; | ||
83 | |||
84 | gpu_timestamp_lo = gk20a_readl(g, timer_time_0_r()); | ||
85 | gpu_timestamp_hi = gk20a_readl(g, timer_time_1_r()); | ||
86 | |||
87 | if (gpu_timestamp_hi == gpu_timestamp_hi_prev) { | ||
88 | *value = (((u64)gpu_timestamp_hi) << 32) | | ||
89 | gpu_timestamp_lo; | ||
90 | return 0; | ||
91 | } | ||
92 | |||
93 | /* wrap-around detected, retry */ | ||
94 | gpu_timestamp_hi_prev = gpu_timestamp_hi; | ||
95 | } | ||
96 | |||
97 | /* too many iterations, bail out */ | ||
98 | nvgpu_err(g, "failed to read ptimer"); | ||
99 | return -EBUSY; | ||
100 | } | ||
diff --git a/drivers/gpu/nvgpu/common/ptimer/ptimer_gk20a.h b/drivers/gpu/nvgpu/common/ptimer/ptimer_gk20a.h new file mode 100644 index 00000000..b95dc1ca --- /dev/null +++ b/drivers/gpu/nvgpu/common/ptimer/ptimer_gk20a.h | |||
@@ -0,0 +1,32 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved. | ||
3 | * | ||
4 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
5 | * copy of this software and associated documentation files (the "Software"), | ||
6 | * to deal in the Software without restriction, including without limitation | ||
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
8 | * and/or sell copies of the Software, and to permit persons to whom the | ||
9 | * Software is furnished to do so, subject to the following conditions: | ||
10 | * | ||
11 | * The above copyright notice and this permission notice shall be included in | ||
12 | * all copies or substantial portions of the Software. | ||
13 | * | ||
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
17 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | ||
18 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | ||
19 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | ||
20 | * DEALINGS IN THE SOFTWARE. | ||
21 | */ | ||
22 | #ifndef PTIMER_GK20A_H | ||
23 | #define PTIMER_GK20A_H | ||
24 | |||
25 | #include <nvgpu/types.h> | ||
26 | |||
27 | struct gk20a; | ||
28 | |||
29 | void gk20a_ptimer_isr(struct gk20a *g); | ||
30 | int gk20a_read_ptimer(struct gk20a *g, u64 *value); | ||
31 | |||
32 | #endif /* PTIMER_GK20A_H */ | ||
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 2a9fb57c..08a1fc10 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h | |||
@@ -1120,10 +1120,6 @@ struct gpu_ops { | |||
1120 | struct { | 1120 | struct { |
1121 | void (*init_hw)(struct gk20a *g); | 1121 | void (*init_hw)(struct gk20a *g); |
1122 | void (*isr)(struct gk20a *g); | 1122 | void (*isr)(struct gk20a *g); |
1123 | int (*read_ptimer)(struct gk20a *g, u64 *value); | ||
1124 | int (*get_timestamps_zipper)(struct gk20a *g, | ||
1125 | u32 source_id, u32 count, | ||
1126 | struct nvgpu_cpu_time_correlation_sample *); | ||
1127 | int (*bar1_bind)(struct gk20a *g, struct nvgpu_mem *bar1_inst); | 1123 | int (*bar1_bind)(struct gk20a *g, struct nvgpu_mem *bar1_inst); |
1128 | u32 (*set_bar0_window)(struct gk20a *g, struct nvgpu_mem *mem, | 1124 | u32 (*set_bar0_window)(struct gk20a *g, struct nvgpu_mem *mem, |
1129 | struct nvgpu_sgt *sgt, struct nvgpu_sgl *sgl, | 1125 | struct nvgpu_sgt *sgt, struct nvgpu_sgl *sgl, |
@@ -1131,6 +1127,14 @@ struct gpu_ops { | |||
1131 | } bus; | 1127 | } bus; |
1132 | 1128 | ||
1133 | struct { | 1129 | struct { |
1130 | void (*isr)(struct gk20a *g); | ||
1131 | int (*read_ptimer)(struct gk20a *g, u64 *value); | ||
1132 | int (*get_timestamps_zipper)(struct gk20a *g, | ||
1133 | u32 source_id, u32 count, | ||
1134 | struct nvgpu_cpu_time_correlation_sample *); | ||
1135 | } ptimer; | ||
1136 | |||
1137 | struct { | ||
1134 | int (*init)(struct gk20a *g); | 1138 | int (*init)(struct gk20a *g); |
1135 | int (*preos_wait_for_halt)(struct gk20a *g); | 1139 | int (*preos_wait_for_halt)(struct gk20a *g); |
1136 | void (*preos_reload_check)(struct gk20a *g); | 1140 | void (*preos_reload_check)(struct gk20a *g); |
diff --git a/drivers/gpu/nvgpu/gm20b/clk_gm20b.c b/drivers/gpu/nvgpu/gm20b/clk_gm20b.c index e5cc6352..f47f6cf6 100644 --- a/drivers/gpu/nvgpu/gm20b/clk_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/clk_gm20b.c | |||
@@ -32,7 +32,6 @@ | |||
32 | #include <nvgpu/types.h> | 32 | #include <nvgpu/types.h> |
33 | 33 | ||
34 | #include <nvgpu/hw/gm20b/hw_trim_gm20b.h> | 34 | #include <nvgpu/hw/gm20b/hw_trim_gm20b.h> |
35 | #include <nvgpu/hw/gm20b/hw_timer_gm20b.h> | ||
36 | #include <nvgpu/hw/gm20b/hw_therm_gm20b.h> | 35 | #include <nvgpu/hw/gm20b/hw_therm_gm20b.h> |
37 | #include <nvgpu/hw/gm20b/hw_fuse_gm20b.h> | 36 | #include <nvgpu/hw/gm20b/hw_fuse_gm20b.h> |
38 | 37 | ||
diff --git a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c index ea021d27..9f93d0eb 100644 --- a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c | |||
@@ -25,6 +25,7 @@ | |||
25 | #include "common/clock_gating/gm20b_gating_reglist.h" | 25 | #include "common/clock_gating/gm20b_gating_reglist.h" |
26 | #include "common/bus/bus_gm20b.h" | 26 | #include "common/bus/bus_gm20b.h" |
27 | #include "common/bus/bus_gk20a.h" | 27 | #include "common/bus/bus_gk20a.h" |
28 | #include "common/ptimer/ptimer_gk20a.h" | ||
28 | 29 | ||
29 | #include "gk20a/gk20a.h" | 30 | #include "gk20a/gk20a.h" |
30 | #include "gk20a/ce2_gk20a.h" | 31 | #include "gk20a/ce2_gk20a.h" |
@@ -60,7 +61,7 @@ | |||
60 | #include <nvgpu/debug.h> | 61 | #include <nvgpu/debug.h> |
61 | #include <nvgpu/bug.h> | 62 | #include <nvgpu/bug.h> |
62 | #include <nvgpu/enabled.h> | 63 | #include <nvgpu/enabled.h> |
63 | #include <nvgpu/bus.h> | 64 | #include <nvgpu/ptimer.h> |
64 | #include <nvgpu/error_notifier.h> | 65 | #include <nvgpu/error_notifier.h> |
65 | 66 | ||
66 | #include <nvgpu/hw/gm20b/hw_proj_gm20b.h> | 67 | #include <nvgpu/hw/gm20b/hw_proj_gm20b.h> |
@@ -605,11 +606,14 @@ static const struct gpu_ops gm20b_ops = { | |||
605 | .bus = { | 606 | .bus = { |
606 | .init_hw = gk20a_bus_init_hw, | 607 | .init_hw = gk20a_bus_init_hw, |
607 | .isr = gk20a_bus_isr, | 608 | .isr = gk20a_bus_isr, |
608 | .read_ptimer = gk20a_read_ptimer, | ||
609 | .get_timestamps_zipper = nvgpu_get_timestamps_zipper, | ||
610 | .bar1_bind = gm20b_bus_bar1_bind, | 609 | .bar1_bind = gm20b_bus_bar1_bind, |
611 | .set_bar0_window = gk20a_bus_set_bar0_window, | 610 | .set_bar0_window = gk20a_bus_set_bar0_window, |
612 | }, | 611 | }, |
612 | .ptimer = { | ||
613 | .isr = gk20a_ptimer_isr, | ||
614 | .read_ptimer = gk20a_read_ptimer, | ||
615 | .get_timestamps_zipper = nvgpu_get_timestamps_zipper, | ||
616 | }, | ||
613 | #if defined(CONFIG_GK20A_CYCLE_STATS) | 617 | #if defined(CONFIG_GK20A_CYCLE_STATS) |
614 | .css = { | 618 | .css = { |
615 | .enable_snapshot = css_hw_enable_snapshot, | 619 | .enable_snapshot = css_hw_enable_snapshot, |
@@ -667,6 +671,7 @@ int gm20b_init_hal(struct gk20a *g) | |||
667 | gops->debug = gm20b_ops.debug; | 671 | gops->debug = gm20b_ops.debug; |
668 | gops->debugger = gm20b_ops.debugger; | 672 | gops->debugger = gm20b_ops.debugger; |
669 | gops->bus = gm20b_ops.bus; | 673 | gops->bus = gm20b_ops.bus; |
674 | gops->ptimer = gm20b_ops.ptimer; | ||
670 | #if defined(CONFIG_GK20A_CYCLE_STATS) | 675 | #if defined(CONFIG_GK20A_CYCLE_STATS) |
671 | gops->css = gm20b_ops.css; | 676 | gops->css = gm20b_ops.css; |
672 | #endif | 677 | #endif |
diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c index 1a9c6a74..33e69d4e 100644 --- a/drivers/gpu/nvgpu/gp106/hal_gp106.c +++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c | |||
@@ -24,6 +24,7 @@ | |||
24 | 24 | ||
25 | #include "common/bus/bus_gk20a.h" | 25 | #include "common/bus/bus_gk20a.h" |
26 | #include "common/clock_gating/gp106_gating_reglist.h" | 26 | #include "common/clock_gating/gp106_gating_reglist.h" |
27 | #include "common/ptimer/ptimer_gk20a.h" | ||
27 | 28 | ||
28 | #include "gk20a/gk20a.h" | 29 | #include "gk20a/gk20a.h" |
29 | #include "gk20a/fifo_gk20a.h" | 30 | #include "gk20a/fifo_gk20a.h" |
@@ -86,7 +87,7 @@ | |||
86 | 87 | ||
87 | #include <nvgpu/debug.h> | 88 | #include <nvgpu/debug.h> |
88 | #include <nvgpu/bug.h> | 89 | #include <nvgpu/bug.h> |
89 | #include <nvgpu/bus.h> | 90 | #include <nvgpu/ptimer.h> |
90 | #include <nvgpu/enabled.h> | 91 | #include <nvgpu/enabled.h> |
91 | #include <nvgpu/ctxsw_trace.h> | 92 | #include <nvgpu/ctxsw_trace.h> |
92 | #include <nvgpu/error_notifier.h> | 93 | #include <nvgpu/error_notifier.h> |
@@ -720,11 +721,14 @@ static const struct gpu_ops gp106_ops = { | |||
720 | .bus = { | 721 | .bus = { |
721 | .init_hw = gk20a_bus_init_hw, | 722 | .init_hw = gk20a_bus_init_hw, |
722 | .isr = gk20a_bus_isr, | 723 | .isr = gk20a_bus_isr, |
723 | .read_ptimer = gk20a_read_ptimer, | ||
724 | .get_timestamps_zipper = nvgpu_get_timestamps_zipper, | ||
725 | .bar1_bind = gk20a_bus_bar1_bind, | 724 | .bar1_bind = gk20a_bus_bar1_bind, |
726 | .set_bar0_window = gk20a_bus_set_bar0_window, | 725 | .set_bar0_window = gk20a_bus_set_bar0_window, |
727 | }, | 726 | }, |
727 | .ptimer = { | ||
728 | .isr = gk20a_ptimer_isr, | ||
729 | .read_ptimer = gk20a_read_ptimer, | ||
730 | .get_timestamps_zipper = nvgpu_get_timestamps_zipper, | ||
731 | }, | ||
728 | #if defined(CONFIG_GK20A_CYCLE_STATS) | 732 | #if defined(CONFIG_GK20A_CYCLE_STATS) |
729 | .css = { | 733 | .css = { |
730 | .enable_snapshot = css_hw_enable_snapshot, | 734 | .enable_snapshot = css_hw_enable_snapshot, |
@@ -806,6 +810,7 @@ int gp106_init_hal(struct gk20a *g) | |||
806 | gops->debugger = gp106_ops.debugger; | 810 | gops->debugger = gp106_ops.debugger; |
807 | gops->dbg_session_ops = gp106_ops.dbg_session_ops; | 811 | gops->dbg_session_ops = gp106_ops.dbg_session_ops; |
808 | gops->bus = gp106_ops.bus; | 812 | gops->bus = gp106_ops.bus; |
813 | gops->ptimer = gp106_ops.ptimer; | ||
809 | #if defined(CONFIG_GK20A_CYCLE_STATS) | 814 | #if defined(CONFIG_GK20A_CYCLE_STATS) |
810 | gops->css = gp106_ops.css; | 815 | gops->css = gp106_ops.css; |
811 | #endif | 816 | #endif |
diff --git a/drivers/gpu/nvgpu/gp106/mclk_gp106.c b/drivers/gpu/nvgpu/gp106/mclk_gp106.c index bfb66e6e..074aec92 100644 --- a/drivers/gpu/nvgpu/gp106/mclk_gp106.c +++ b/drivers/gpu/nvgpu/gp106/mclk_gp106.c | |||
@@ -3353,7 +3353,7 @@ int gp106_mclk_change(struct gk20a *g, u16 val) | |||
3353 | pseq_cmd->cmd_type = NV_PMU_SEQ_CMD_ID_RUN_SCRIPT; | 3353 | pseq_cmd->cmd_type = NV_PMU_SEQ_CMD_ID_RUN_SCRIPT; |
3354 | 3354 | ||
3355 | #ifdef CONFIG_DEBUG_FS | 3355 | #ifdef CONFIG_DEBUG_FS |
3356 | g->ops.bus.read_ptimer(g, &t0); | 3356 | g->ops.ptimer.read_ptimer(g, &t0); |
3357 | #endif | 3357 | #endif |
3358 | 3358 | ||
3359 | if (speed == GP106_MCLK_HIGH_SPEED) { | 3359 | if (speed == GP106_MCLK_HIGH_SPEED) { |
@@ -3402,7 +3402,7 @@ int gp106_mclk_change(struct gk20a *g, u16 val) | |||
3402 | mclk->speed = speed; | 3402 | mclk->speed = speed; |
3403 | 3403 | ||
3404 | #ifdef CONFIG_DEBUG_FS | 3404 | #ifdef CONFIG_DEBUG_FS |
3405 | g->ops.bus.read_ptimer(g, &t1); | 3405 | g->ops.ptimer.read_ptimer(g, &t1); |
3406 | 3406 | ||
3407 | nvgpu_mutex_acquire(&mclk->data_lock); | 3407 | nvgpu_mutex_acquire(&mclk->data_lock); |
3408 | mclk->switch_num++; | 3408 | mclk->switch_num++; |
diff --git a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c index defec775..0106f6c9 100644 --- a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c | |||
@@ -24,6 +24,7 @@ | |||
24 | 24 | ||
25 | #include "common/bus/bus_gk20a.h" | 25 | #include "common/bus/bus_gk20a.h" |
26 | #include "common/clock_gating/gp10b_gating_reglist.h" | 26 | #include "common/clock_gating/gp10b_gating_reglist.h" |
27 | #include "common/ptimer/ptimer_gk20a.h" | ||
27 | 28 | ||
28 | #include "gk20a/gk20a.h" | 29 | #include "gk20a/gk20a.h" |
29 | #include "gk20a/fifo_gk20a.h" | 30 | #include "gk20a/fifo_gk20a.h" |
@@ -69,7 +70,7 @@ | |||
69 | #include <nvgpu/debug.h> | 70 | #include <nvgpu/debug.h> |
70 | #include <nvgpu/bug.h> | 71 | #include <nvgpu/bug.h> |
71 | #include <nvgpu/enabled.h> | 72 | #include <nvgpu/enabled.h> |
72 | #include <nvgpu/bus.h> | 73 | #include <nvgpu/ptimer.h> |
73 | #include <nvgpu/ctxsw_trace.h> | 74 | #include <nvgpu/ctxsw_trace.h> |
74 | #include <nvgpu/error_notifier.h> | 75 | #include <nvgpu/error_notifier.h> |
75 | 76 | ||
@@ -650,11 +651,14 @@ static const struct gpu_ops gp10b_ops = { | |||
650 | .bus = { | 651 | .bus = { |
651 | .init_hw = gk20a_bus_init_hw, | 652 | .init_hw = gk20a_bus_init_hw, |
652 | .isr = gk20a_bus_isr, | 653 | .isr = gk20a_bus_isr, |
653 | .read_ptimer = gk20a_read_ptimer, | ||
654 | .get_timestamps_zipper = nvgpu_get_timestamps_zipper, | ||
655 | .bar1_bind = gk20a_bus_bar1_bind, | 654 | .bar1_bind = gk20a_bus_bar1_bind, |
656 | .set_bar0_window = gk20a_bus_set_bar0_window, | 655 | .set_bar0_window = gk20a_bus_set_bar0_window, |
657 | }, | 656 | }, |
657 | .ptimer = { | ||
658 | .isr = gk20a_ptimer_isr, | ||
659 | .read_ptimer = gk20a_read_ptimer, | ||
660 | .get_timestamps_zipper = nvgpu_get_timestamps_zipper, | ||
661 | }, | ||
658 | #if defined(CONFIG_GK20A_CYCLE_STATS) | 662 | #if defined(CONFIG_GK20A_CYCLE_STATS) |
659 | .css = { | 663 | .css = { |
660 | .enable_snapshot = css_hw_enable_snapshot, | 664 | .enable_snapshot = css_hw_enable_snapshot, |
@@ -705,6 +709,7 @@ int gp10b_init_hal(struct gk20a *g) | |||
705 | gops->debugger = gp10b_ops.debugger; | 709 | gops->debugger = gp10b_ops.debugger; |
706 | gops->dbg_session_ops = gp10b_ops.dbg_session_ops; | 710 | gops->dbg_session_ops = gp10b_ops.dbg_session_ops; |
707 | gops->bus = gp10b_ops.bus; | 711 | gops->bus = gp10b_ops.bus; |
712 | gops->ptimer = gp10b_ops.ptimer; | ||
708 | #if defined(CONFIG_GK20A_CYCLE_STATS) | 713 | #if defined(CONFIG_GK20A_CYCLE_STATS) |
709 | gops->css = gp10b_ops.css; | 714 | gops->css = gp10b_ops.css; |
710 | #endif | 715 | #endif |
diff --git a/drivers/gpu/nvgpu/gv100/hal_gv100.c b/drivers/gpu/nvgpu/gv100/hal_gv100.c index ac68bff3..dd3a5398 100644 --- a/drivers/gpu/nvgpu/gv100/hal_gv100.c +++ b/drivers/gpu/nvgpu/gv100/hal_gv100.c | |||
@@ -24,6 +24,7 @@ | |||
24 | 24 | ||
25 | #include "common/bus/bus_gk20a.h" | 25 | #include "common/bus/bus_gk20a.h" |
26 | #include "common/clock_gating/gv100_gating_reglist.h" | 26 | #include "common/clock_gating/gv100_gating_reglist.h" |
27 | #include "common/ptimer/ptimer_gk20a.h" | ||
27 | 28 | ||
28 | #include "gk20a/gk20a.h" | 29 | #include "gk20a/gk20a.h" |
29 | #include "gk20a/fifo_gk20a.h" | 30 | #include "gk20a/fifo_gk20a.h" |
@@ -99,7 +100,7 @@ | |||
99 | #include "gv100/nvlink_gv100.h" | 100 | #include "gv100/nvlink_gv100.h" |
100 | #include "gv100/regops_gv100.h" | 101 | #include "gv100/regops_gv100.h" |
101 | 102 | ||
102 | #include <nvgpu/bus.h> | 103 | #include <nvgpu/ptimer.h> |
103 | #include <nvgpu/debug.h> | 104 | #include <nvgpu/debug.h> |
104 | #include <nvgpu/enabled.h> | 105 | #include <nvgpu/enabled.h> |
105 | #include <nvgpu/ctxsw_trace.h> | 106 | #include <nvgpu/ctxsw_trace.h> |
@@ -790,11 +791,14 @@ static const struct gpu_ops gv100_ops = { | |||
790 | .bus = { | 791 | .bus = { |
791 | .init_hw = gk20a_bus_init_hw, | 792 | .init_hw = gk20a_bus_init_hw, |
792 | .isr = gk20a_bus_isr, | 793 | .isr = gk20a_bus_isr, |
793 | .read_ptimer = gk20a_read_ptimer, | ||
794 | .get_timestamps_zipper = nvgpu_get_timestamps_zipper, | ||
795 | .bar1_bind = NULL, | 794 | .bar1_bind = NULL, |
796 | .set_bar0_window = gk20a_bus_set_bar0_window, | 795 | .set_bar0_window = gk20a_bus_set_bar0_window, |
797 | }, | 796 | }, |
797 | .ptimer = { | ||
798 | .isr = gk20a_ptimer_isr, | ||
799 | .read_ptimer = gk20a_read_ptimer, | ||
800 | .get_timestamps_zipper = nvgpu_get_timestamps_zipper, | ||
801 | }, | ||
798 | #if defined(CONFIG_GK20A_CYCLE_STATS) | 802 | #if defined(CONFIG_GK20A_CYCLE_STATS) |
799 | .css = { | 803 | .css = { |
800 | .enable_snapshot = gv11b_css_hw_enable_snapshot, | 804 | .enable_snapshot = gv11b_css_hw_enable_snapshot, |
@@ -878,6 +882,7 @@ int gv100_init_hal(struct gk20a *g) | |||
878 | gops->debugger = gv100_ops.debugger; | 882 | gops->debugger = gv100_ops.debugger; |
879 | gops->dbg_session_ops = gv100_ops.dbg_session_ops; | 883 | gops->dbg_session_ops = gv100_ops.dbg_session_ops; |
880 | gops->bus = gv100_ops.bus; | 884 | gops->bus = gv100_ops.bus; |
885 | gops->ptimer = gv100_ops.ptimer; | ||
881 | #if defined(CONFIG_GK20A_CYCLE_STATS) | 886 | #if defined(CONFIG_GK20A_CYCLE_STATS) |
882 | gops->css = gv100_ops.css; | 887 | gops->css = gv100_ops.css; |
883 | #endif | 888 | #endif |
diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c index 6ec3c610..7b552723 100644 --- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c | |||
@@ -24,6 +24,7 @@ | |||
24 | 24 | ||
25 | #include "common/bus/bus_gk20a.h" | 25 | #include "common/bus/bus_gk20a.h" |
26 | #include "common/clock_gating/gv11b_gating_reglist.h" | 26 | #include "common/clock_gating/gv11b_gating_reglist.h" |
27 | #include "common/ptimer/ptimer_gk20a.h" | ||
27 | 28 | ||
28 | #include "gk20a/gk20a.h" | 29 | #include "gk20a/gk20a.h" |
29 | #include "gk20a/fifo_gk20a.h" | 30 | #include "gk20a/fifo_gk20a.h" |
@@ -82,7 +83,7 @@ | |||
82 | #include "subctx_gv11b.h" | 83 | #include "subctx_gv11b.h" |
83 | #include "therm_gv11b.h" | 84 | #include "therm_gv11b.h" |
84 | 85 | ||
85 | #include <nvgpu/bus.h> | 86 | #include <nvgpu/ptimer.h> |
86 | #include <nvgpu/debug.h> | 87 | #include <nvgpu/debug.h> |
87 | #include <nvgpu/enabled.h> | 88 | #include <nvgpu/enabled.h> |
88 | #include <nvgpu/ctxsw_trace.h> | 89 | #include <nvgpu/ctxsw_trace.h> |
@@ -722,11 +723,14 @@ static const struct gpu_ops gv11b_ops = { | |||
722 | .bus = { | 723 | .bus = { |
723 | .init_hw = gk20a_bus_init_hw, | 724 | .init_hw = gk20a_bus_init_hw, |
724 | .isr = gk20a_bus_isr, | 725 | .isr = gk20a_bus_isr, |
725 | .read_ptimer = gk20a_read_ptimer, | ||
726 | .get_timestamps_zipper = nvgpu_get_timestamps_zipper, | ||
727 | .bar1_bind = NULL, | 726 | .bar1_bind = NULL, |
728 | .set_bar0_window = gk20a_bus_set_bar0_window, | 727 | .set_bar0_window = gk20a_bus_set_bar0_window, |
729 | }, | 728 | }, |
729 | .ptimer = { | ||
730 | .isr = gk20a_ptimer_isr, | ||
731 | .read_ptimer = gk20a_read_ptimer, | ||
732 | .get_timestamps_zipper = nvgpu_get_timestamps_zipper, | ||
733 | }, | ||
730 | #if defined(CONFIG_GK20A_CYCLE_STATS) | 734 | #if defined(CONFIG_GK20A_CYCLE_STATS) |
731 | .css = { | 735 | .css = { |
732 | .enable_snapshot = gv11b_css_hw_enable_snapshot, | 736 | .enable_snapshot = gv11b_css_hw_enable_snapshot, |
@@ -776,6 +780,7 @@ int gv11b_init_hal(struct gk20a *g) | |||
776 | gops->debugger = gv11b_ops.debugger; | 780 | gops->debugger = gv11b_ops.debugger; |
777 | gops->dbg_session_ops = gv11b_ops.dbg_session_ops; | 781 | gops->dbg_session_ops = gv11b_ops.dbg_session_ops; |
778 | gops->bus = gv11b_ops.bus; | 782 | gops->bus = gv11b_ops.bus; |
783 | gops->ptimer = gv11b_ops.ptimer; | ||
779 | #if defined(CONFIG_GK20A_CYCLE_STATS) | 784 | #if defined(CONFIG_GK20A_CYCLE_STATS) |
780 | gops->css = gv11b_ops.css; | 785 | gops->css = gv11b_ops.css; |
781 | #endif | 786 | #endif |
diff --git a/drivers/gpu/nvgpu/include/nvgpu/bus.h b/drivers/gpu/nvgpu/include/nvgpu/ptimer.h index 6957bfbd..6957bfbd 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/bus.h +++ b/drivers/gpu/nvgpu/include/nvgpu/ptimer.h | |||
diff --git a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c index 2e12b512..3fa78e54 100644 --- a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c +++ b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c | |||
@@ -523,11 +523,14 @@ static const struct gpu_ops vgpu_gp10b_ops = { | |||
523 | .bus = { | 523 | .bus = { |
524 | .init_hw = gk20a_bus_init_hw, | 524 | .init_hw = gk20a_bus_init_hw, |
525 | .isr = gk20a_bus_isr, | 525 | .isr = gk20a_bus_isr, |
526 | .read_ptimer = vgpu_read_ptimer, | ||
527 | .get_timestamps_zipper = vgpu_get_timestamps_zipper, | ||
528 | .bar1_bind = gk20a_bus_bar1_bind, | 526 | .bar1_bind = gk20a_bus_bar1_bind, |
529 | .set_bar0_window = gk20a_bus_set_bar0_window, | 527 | .set_bar0_window = gk20a_bus_set_bar0_window, |
530 | }, | 528 | }, |
529 | .ptimer = { | ||
530 | .isr = NULL, | ||
531 | .read_ptimer = vgpu_read_ptimer, | ||
532 | .get_timestamps_zipper = vgpu_get_timestamps_zipper, | ||
533 | }, | ||
531 | #if defined(CONFIG_GK20A_CYCLE_STATS) | 534 | #if defined(CONFIG_GK20A_CYCLE_STATS) |
532 | .css = { | 535 | .css = { |
533 | .enable_snapshot = vgpu_css_enable_snapshot_buffer, | 536 | .enable_snapshot = vgpu_css_enable_snapshot_buffer, |
@@ -578,6 +581,7 @@ int vgpu_gp10b_init_hal(struct gk20a *g) | |||
578 | gops->debugger = vgpu_gp10b_ops.debugger; | 581 | gops->debugger = vgpu_gp10b_ops.debugger; |
579 | gops->dbg_session_ops = vgpu_gp10b_ops.dbg_session_ops; | 582 | gops->dbg_session_ops = vgpu_gp10b_ops.dbg_session_ops; |
580 | gops->bus = vgpu_gp10b_ops.bus; | 583 | gops->bus = vgpu_gp10b_ops.bus; |
584 | gops->ptimer = vgpu_gp10b_ops.ptimer; | ||
581 | #if defined(CONFIG_GK20A_CYCLE_STATS) | 585 | #if defined(CONFIG_GK20A_CYCLE_STATS) |
582 | gops->css = vgpu_gp10b_ops.css; | 586 | gops->css = vgpu_gp10b_ops.css; |
583 | #endif | 587 | #endif |
diff --git a/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c b/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c index 0b1aa672..d6b305d4 100644 --- a/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c +++ b/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c | |||
@@ -574,11 +574,14 @@ static const struct gpu_ops vgpu_gv11b_ops = { | |||
574 | .bus = { | 574 | .bus = { |
575 | .init_hw = gk20a_bus_init_hw, | 575 | .init_hw = gk20a_bus_init_hw, |
576 | .isr = gk20a_bus_isr, | 576 | .isr = gk20a_bus_isr, |
577 | .read_ptimer = vgpu_read_ptimer, | ||
578 | .get_timestamps_zipper = vgpu_get_timestamps_zipper, | ||
579 | .bar1_bind = NULL, | 577 | .bar1_bind = NULL, |
580 | .set_bar0_window = gk20a_bus_set_bar0_window, | 578 | .set_bar0_window = gk20a_bus_set_bar0_window, |
581 | }, | 579 | }, |
580 | .ptimer = { | ||
581 | .isr = NULL, | ||
582 | .read_ptimer = vgpu_read_ptimer, | ||
583 | .get_timestamps_zipper = vgpu_get_timestamps_zipper, | ||
584 | }, | ||
582 | #if defined(CONFIG_GK20A_CYCLE_STATS) | 585 | #if defined(CONFIG_GK20A_CYCLE_STATS) |
583 | .css = { | 586 | .css = { |
584 | .enable_snapshot = vgpu_css_enable_snapshot_buffer, | 587 | .enable_snapshot = vgpu_css_enable_snapshot_buffer, |
@@ -625,6 +628,7 @@ int vgpu_gv11b_init_hal(struct gk20a *g) | |||
625 | gops->debugger = vgpu_gv11b_ops.debugger; | 628 | gops->debugger = vgpu_gv11b_ops.debugger; |
626 | gops->dbg_session_ops = vgpu_gv11b_ops.dbg_session_ops; | 629 | gops->dbg_session_ops = vgpu_gv11b_ops.dbg_session_ops; |
627 | gops->bus = vgpu_gv11b_ops.bus; | 630 | gops->bus = vgpu_gv11b_ops.bus; |
631 | gops->ptimer = vgpu_gv11b_ops.ptimer; | ||
628 | #if defined(CONFIG_GK20A_CYCLE_STATS) | 632 | #if defined(CONFIG_GK20A_CYCLE_STATS) |
629 | gops->css = vgpu_gv11b_ops.css; | 633 | gops->css = vgpu_gv11b_ops.css; |
630 | #endif | 634 | #endif |
diff --git a/drivers/gpu/nvgpu/vgpu/vgpu.c b/drivers/gpu/nvgpu/vgpu/vgpu.c index 2bdef427..7760b56f 100644 --- a/drivers/gpu/nvgpu/vgpu/vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/vgpu.c | |||
@@ -21,7 +21,7 @@ | |||
21 | */ | 21 | */ |
22 | 22 | ||
23 | #include <nvgpu/enabled.h> | 23 | #include <nvgpu/enabled.h> |
24 | #include <nvgpu/bus.h> | 24 | #include <nvgpu/ptimer.h> |
25 | #include <nvgpu/vgpu/vgpu_ivc.h> | 25 | #include <nvgpu/vgpu/vgpu_ivc.h> |
26 | #include <nvgpu/vgpu/vgpu.h> | 26 | #include <nvgpu/vgpu/vgpu.h> |
27 | 27 | ||