gpu: nvgpu: add fbpa ecc support

- add fbpa ecc counters
- add HALs for init_fbpa and fbpa_isr

Jira NVGPUT-69
Jira NVGPUT-68

Change-Id: I3c8fbb664a9b08ece23d860d84881d4860706f77
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1726307
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

5 files changed, 22 insertions, 1 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/ecc_gk20a.h b/drivers/gpu/nvgpu/gk20a/ecc_gk20a.h
index fba8ba7d..af10f828 100644
--- a/drivers/gpu/nvgpu/gk20a/ecc_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/ecc_gk20a.h
@@ -91,6 +91,11 @@ struct ecc_gk20a {
                 struct gk20a_ecc_stat pmu_uncorrected_err_count;
         } pmu;
 
+        struct {
+                struct gk20a_ecc_stat fbpa_sec_err_count;
+                struct gk20a_ecc_stat fbpa_ded_err_count;
+        } fbpa;
+
 };
 
 #endif /*__ECC_GK20A_H__*/
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.c b/drivers/gpu/nvgpu/gk20a/gk20a.c
index b502ef02..9c030f71 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.c
@@ -198,6 +198,14 @@ int gk20a_finalize_poweron(struct gk20a *g)
                 }
         }
 
+        if (g->ops.fb.init_fbpa) {
+                err = g->ops.fb.init_fbpa(g);
+                if (err) {
+                        nvgpu_err(g, "failed to init fbpa");
+                        goto done;
+                }
+        }
+
         if (g->ops.fb.mem_unlock) {
                 err = g->ops.fb.mem_unlock(g);
                 if (err) {
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index 5440238f..74bb64b3 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -520,6 +520,8 @@ struct gpu_ops {
                         unsigned int intr_type);
                 void (*disable_hub_intr)(struct gk20a *g, unsigned int index,
                         unsigned int intr_type);
+                int (*init_fbpa)(struct gk20a *g);
+                void (*fbpa_isr)(struct gk20a *g);
         } fb;
         struct {
                 void (*slcg_bus_load_gating_prod)(struct gk20a *g, bool prod);
diff --git a/drivers/gpu/nvgpu/gp10b/mc_gp10b.c b/drivers/gpu/nvgpu/gp10b/mc_gp10b.c
index 6fe4da15..8f4695ff 100644
--- a/drivers/gpu/nvgpu/gp10b/mc_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/mc_gp10b.c
@@ -131,6 +131,8 @@ void mc_gp10b_isr_stall(struct gk20a *g)
                         g->ops.mc.is_intr_nvlink_pending(g, mc_intr_0)) {
                 g->ops.nvlink.isr(g);
         }
+        if (mc_intr_0 & mc_intr_pfb_pending_f() && g->ops.fb.fbpa_isr)
+                g->ops.fb.fbpa_isr(g);
 
         nvgpu_log(g, gpu_dbg_intr, "stall intr done 0x%08x\n", mc_intr_0);
 
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_mc_gp10b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_mc_gp10b.h
index dbf0ce35..39c132ae 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_mc_gp10b.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_mc_gp10b.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2014-2017, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2014-2018, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -88,6 +88,10 @@ static inline u32 mc_intr_replayable_fault_pending_f(void)
 {
         return 0x200U;
 }
+static inline u32 mc_intr_pfb_pending_f(void)
+{
+        return 0x2000U;
+}
 static inline u32 mc_intr_pgraph_pending_f(void)
 {
         return 0x1000U;