gpu: nvgpu: add support for L3 cache allocation of buffers

Add gv11b implementation of gpu_phys_addr() that checks the t19x
GMMU attributes struct to determine if L3 allocation should be
enabled. If L3 alloc is enabled then a special physical address
bit is set.

Add flag NVGPU_AS_MAP_BUFFER_FLAGS_L3_ALLOC to struct
nvgpu_as_map_buffer_ex_args so that User space can add a hint to
allocate buffer in L3 cache

Jira GPUT19X-10
Bug 200279508

Change-Id: I1bb9876a670b252980922aa50e3e69b802be137f
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master/r/1512602
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>

5 files changed, 77 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/Makefile b/drivers/gpu/nvgpu/Makefile
index 33391a80..6fdabe62 100644
--- a/drivers/gpu/nvgpu/Makefile
+++ b/drivers/gpu/nvgpu/Makefile
@@ -1,6 +1,7 @@
 nvgpu-t19x := ../../../../nvgpu-t19x/drivers/gpu/nvgpu
 
 nvgpu-y += \
+        $(nvgpu-t19x)/common/mm/gmmu_t19x.o \
         $(nvgpu-t19x)/common/linux/ioctl_tsg_t19x.o \
         $(nvgpu-t19x)/gv11b/gv11b.o  \
         $(nvgpu-t19x)/gv11b/bus_gv11b.o  \
diff --git a/drivers/gpu/nvgpu/common/mm/gmmu_t19x.c b/drivers/gpu/nvgpu/common/mm/gmmu_t19x.c
new file mode 100644
index 00000000..05abec1b
--- /dev/null
+++ b/drivers/gpu/nvgpu/common/mm/gmmu_t19x.c
@@ -0,0 +1,25 @@
+/*
+ * Copyright (c) 2017, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <uapi/linux/nvgpu.h>
+
+#include <nvgpu/gmmu.h>
+
+void nvgpu_gmmu_add_t19x_attrs(struct nvgpu_gmmu_attrs *attrs, u32 flags)
+{
+        attrs->t19x_attrs.l3_alloc = (bool)(flags &
+                                            NVGPU_AS_MAP_BUFFER_FLAGS_L3_ALLOC);
+}
diff --git a/drivers/gpu/nvgpu/gv11b/mm_gv11b.c b/drivers/gpu/nvgpu/gv11b/mm_gv11b.c
index 9d1e0f25..cc8dafa3 100644
--- a/drivers/gpu/nvgpu/gv11b/mm_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/mm_gv11b.c
@@ -23,6 +23,8 @@
 
 #include <nvgpu/hw/gv11b/hw_fb_gv11b.h>
 
+#define NVGPU_L3_ALLOC_BIT      36
+
 static bool gv11b_mm_is_bar1_supported(struct gk20a *g)
 {
         return false;
@@ -61,6 +63,20 @@ void gv11b_mm_l2_flush(struct gk20a *g, bool invalidate)
         g->ops.mm.fb_flush(g);
 }
 
+/*
+ * On Volta the GPU determines whether to do L3 allocation for a mapping by
+ * checking bit 36 of the phsyical address. So if a mapping should allocte lines
+ * in the L3 this bit must be set.
+ */
+u64 gv11b_gpu_phys_addr(struct gk20a *g,
+                        struct nvgpu_gmmu_attrs *attrs, u64 phys)
+{
+        if (attrs->t19x_attrs.l3_alloc)
+                return phys | NVGPU_L3_ALLOC_BIT;
+
+        return phys;
+}
+
 void gv11b_init_mm(struct gpu_ops *gops)
 {
         gp10b_init_mm(gops);
@@ -69,4 +85,5 @@ void gv11b_init_mm(struct gpu_ops *gops)
         gops->mm.init_mm_setup_hw = gk20a_init_mm_setup_hw;
         gops->mm.mmu_fault_pending = gv11b_mm_mmu_fault_pending;
         gops->mm.l2_flush = gv11b_mm_l2_flush;
+        gops->mm.gpu_phys_addr = gv11b_gpu_phys_addr;
 }
diff --git a/drivers/gpu/nvgpu/include/nvgpu/gmmu_t19x.h b/drivers/gpu/nvgpu/include/nvgpu/gmmu_t19x.h
new file mode 100644
index 00000000..8e1a4846
--- /dev/null
+++ b/drivers/gpu/nvgpu/include/nvgpu/gmmu_t19x.h
@@ -0,0 +1,28 @@
+/*
+ * Copyright (c) 2017, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __NVGPU_GMMU_T19X_H__
+#define __NVGPU_GMMU_T19X_H__
+
+struct nvgpu_gmmu_attrs;
+
+struct nvgpu_gmmu_attrs_t19x {
+        bool                     l3_alloc;
+};
+
+void nvgpu_gmmu_add_t19x_attrs(struct nvgpu_gmmu_attrs *attrs, u32 flags);
+
+#endif
diff --git a/include/uapi/linux/nvgpu-t19x.h b/include/uapi/linux/nvgpu-t19x.h
index 96514a88..bc37bc7c 100644
--- a/include/uapi/linux/nvgpu-t19x.h
+++ b/include/uapi/linux/nvgpu-t19x.h
@@ -27,6 +27,12 @@
 #define NVGPU_GPU_ARCH_GV110 0x00000150
 #define NVGPU_GPU_IMPL_GV11B 0x0000000B
 
+/*
+ * this flag is used in struct nvgpu_as_map_buffer_ex_args
+ * to provide L3 cache allocation hint
+ */
+#define NVGPU_AS_MAP_BUFFER_FLAGS_L3_ALLOC      (1 << 7)
+
 /*  subcontexts are available */
 #define NVGPU_GPU_FLAGS_SUPPORT_TSG_SUBCONTEXTS         (1ULL << 22)