diff options
author | seshendra Gadagottu <sgadagottu@nvidia.com> | 2018-06-08 19:25:49 -0400 |
---|---|---|
committer | Tejal Kudav <tkudav@nvidia.com> | 2018-06-14 09:44:08 -0400 |
commit | ae47fa042c2b7379079d54be13df001911954b9e (patch) | |
tree | 870a5d8eb2c506c79c335608a62dad2287ac3371 | |
parent | 6a46965eb3b7b657c089142579ab20d6efefc0fc (diff) |
gpu: nvgpu: populate vsm mapping based on nonpes_aware_tpc
For gv1xx, kernel smid configuration programming is done based
on nonpes aware tpc. For user space to be in sync with hw
populate vsm mapping based on nonpes_aware_tpcs.
Bug 200405202
Change-Id: Id89291ca64c2118915dc6f18f62e17f411d467b0
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1744304
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
-rw-r--r-- | drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c | 9 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.h | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv100/hal_gv100.c | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/gr_gv11b.c | 4 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/gr_gv11b.h | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/hal_gv11b.c | 1 |
6 files changed, 14 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c b/drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c index cda2ce46..73a8131d 100644 --- a/drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c +++ b/drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c | |||
@@ -782,7 +782,14 @@ static int gk20a_ctrl_vsm_mapping(struct gk20a *g, | |||
782 | 782 | ||
783 | for (i = 0; i < gr->no_of_sm; i++) { | 783 | for (i = 0; i < gr->no_of_sm; i++) { |
784 | vsms_buf[i].gpc_index = gr->sm_to_cluster[i].gpc_index; | 784 | vsms_buf[i].gpc_index = gr->sm_to_cluster[i].gpc_index; |
785 | vsms_buf[i].tpc_index = gr->sm_to_cluster[i].tpc_index; | 785 | if (g->ops.gr.get_nonpes_aware_tpc) |
786 | vsms_buf[i].tpc_index = | ||
787 | g->ops.gr.get_nonpes_aware_tpc(g, | ||
788 | gr->sm_to_cluster[i].gpc_index, | ||
789 | gr->sm_to_cluster[i].tpc_index); | ||
790 | else | ||
791 | vsms_buf[i].tpc_index = | ||
792 | gr->sm_to_cluster[i].tpc_index; | ||
786 | } | 793 | } |
787 | 794 | ||
788 | err = copy_to_user((void __user *)(uintptr_t) | 795 | err = copy_to_user((void __user *)(uintptr_t) |
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 49f2a34a..be8917c7 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h | |||
@@ -481,6 +481,7 @@ struct gpu_ops { | |||
481 | struct channel_gk20a *c); | 481 | struct channel_gk20a *c); |
482 | int (*commit_global_ctx_buffers)(struct gk20a *g, | 482 | int (*commit_global_ctx_buffers)(struct gk20a *g, |
483 | struct channel_gk20a *c, bool patch); | 483 | struct channel_gk20a *c, bool patch); |
484 | u32 (*get_nonpes_aware_tpc)(struct gk20a *g, u32 gpc, u32 tpc); | ||
484 | } gr; | 485 | } gr; |
485 | struct { | 486 | struct { |
486 | void (*init_hw)(struct gk20a *g); | 487 | void (*init_hw)(struct gk20a *g); |
diff --git a/drivers/gpu/nvgpu/gv100/hal_gv100.c b/drivers/gpu/nvgpu/gv100/hal_gv100.c index 00840448..1d6f59b3 100644 --- a/drivers/gpu/nvgpu/gv100/hal_gv100.c +++ b/drivers/gpu/nvgpu/gv100/hal_gv100.c | |||
@@ -449,6 +449,7 @@ static const struct gpu_ops gv100_ops = { | |||
449 | .alloc_global_ctx_buffers = gr_gk20a_alloc_global_ctx_buffers, | 449 | .alloc_global_ctx_buffers = gr_gk20a_alloc_global_ctx_buffers, |
450 | .map_global_ctx_buffers = gr_gk20a_map_global_ctx_buffers, | 450 | .map_global_ctx_buffers = gr_gk20a_map_global_ctx_buffers, |
451 | .commit_global_ctx_buffers = gr_gk20a_commit_global_ctx_buffers, | 451 | .commit_global_ctx_buffers = gr_gk20a_commit_global_ctx_buffers, |
452 | .get_nonpes_aware_tpc = gr_gv11b_get_nonpes_aware_tpc, | ||
452 | }, | 453 | }, |
453 | .fb = { | 454 | .fb = { |
454 | .reset = gv100_fb_reset, | 455 | .reset = gv100_fb_reset, |
diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c index f57be9dd..694ff8ad 100644 --- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c | |||
@@ -2661,7 +2661,7 @@ void gr_gv11b_detect_sm_arch(struct gk20a *g) | |||
2661 | gr_gpc0_tpc0_sm_arch_warp_count_v(v); | 2661 | gr_gpc0_tpc0_sm_arch_warp_count_v(v); |
2662 | } | 2662 | } |
2663 | 2663 | ||
2664 | static u32 gr_gv11b_get_nonpes_aware_tpc(struct gk20a *g, u32 gpc, u32 tpc) | 2664 | u32 gr_gv11b_get_nonpes_aware_tpc(struct gk20a *g, u32 gpc, u32 tpc) |
2665 | { | 2665 | { |
2666 | u32 tpc_new = 0; | 2666 | u32 tpc_new = 0; |
2667 | u32 temp; | 2667 | u32 temp; |
@@ -2691,7 +2691,7 @@ void gr_gv11b_program_sm_id_numbering(struct gk20a *g, | |||
2691 | u32 tpc_offset = tpc_in_gpc_stride * tpc; | 2691 | u32 tpc_offset = tpc_in_gpc_stride * tpc; |
2692 | u32 global_tpc_index = g->gr.sm_to_cluster[smid].global_tpc_index; | 2692 | u32 global_tpc_index = g->gr.sm_to_cluster[smid].global_tpc_index; |
2693 | 2693 | ||
2694 | tpc = gr_gv11b_get_nonpes_aware_tpc(g, gpc, tpc); | 2694 | tpc = g->ops.gr.get_nonpes_aware_tpc(g, gpc, tpc); |
2695 | 2695 | ||
2696 | gk20a_writel(g, gr_gpc0_tpc0_sm_cfg_r() + gpc_offset + tpc_offset, | 2696 | gk20a_writel(g, gr_gpc0_tpc0_sm_cfg_r() + gpc_offset + tpc_offset, |
2697 | gr_gpc0_tpc0_sm_cfg_tpc_id_f(global_tpc_index)); | 2697 | gr_gpc0_tpc0_sm_cfg_tpc_id_f(global_tpc_index)); |
diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.h b/drivers/gpu/nvgpu/gv11b/gr_gv11b.h index f6f05a3b..fb4c8b69 100644 --- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.h +++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.h | |||
@@ -248,4 +248,5 @@ int gr_gv11b_create_priv_addr_table(struct gk20a *g, | |||
248 | u32 addr, | 248 | u32 addr, |
249 | u32 *priv_addr_table, | 249 | u32 *priv_addr_table, |
250 | u32 *num_registers); | 250 | u32 *num_registers); |
251 | u32 gr_gv11b_get_nonpes_aware_tpc(struct gk20a *g, u32 gpc, u32 tpc); | ||
251 | #endif | 252 | #endif |
diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c index ce8f5051..f9ac1f2a 100644 --- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c | |||
@@ -415,6 +415,7 @@ static const struct gpu_ops gv11b_ops = { | |||
415 | .alloc_global_ctx_buffers = gr_gk20a_alloc_global_ctx_buffers, | 415 | .alloc_global_ctx_buffers = gr_gk20a_alloc_global_ctx_buffers, |
416 | .map_global_ctx_buffers = gr_gk20a_map_global_ctx_buffers, | 416 | .map_global_ctx_buffers = gr_gk20a_map_global_ctx_buffers, |
417 | .commit_global_ctx_buffers = gr_gk20a_commit_global_ctx_buffers, | 417 | .commit_global_ctx_buffers = gr_gk20a_commit_global_ctx_buffers, |
418 | .get_nonpes_aware_tpc = gr_gv11b_get_nonpes_aware_tpc, | ||
418 | }, | 419 | }, |
419 | .fb = { | 420 | .fb = { |
420 | .reset = gv11b_fb_reset, | 421 | .reset = gv11b_fb_reset, |