diff options
author | Adeel Raza <araza@nvidia.com> | 2016-06-03 13:46:31 -0400 |
---|---|---|
committer | Deepak Nibade <dnibade@nvidia.com> | 2016-12-27 04:56:17 -0500 |
commit | 943be575ccae312ab4cf10e1bdf1a2203d10d689 (patch) | |
tree | 195ec9dfbfe847d1e730f6e3bf5378afa1759fa0 | |
parent | 8403bb63000fd9aa35a43fcddc82de2760ad0ac3 (diff) |
gpu: nvgpu: gp10b: clear TEX ECC interrupt
Fix bug in clearing the TEX ECC interrupt.
Bug 200206379
Change-Id: I758b55d20919173de527aeb98143851edcde4eeb
Signed-off-by: Adeel Raza <araza@nvidia.com>
Reviewed-on: http://git-master/r/1158806
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/gr_gp10b.c | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/hw_gr_gp10b.h | 4 |
2 files changed, 5 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c index 339f0413..2ba18410 100644 --- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c | |||
@@ -346,7 +346,7 @@ static int gr_gp10b_handle_tex_exception(struct gk20a *g, u32 gpc, u32 tpc, | |||
346 | 346 | ||
347 | gk20a_writel(g, | 347 | gk20a_writel(g, |
348 | gr_gpc0_tpc0_tex_m_hww_esr_r() + offset, | 348 | gr_gpc0_tpc0_tex_m_hww_esr_r() + offset, |
349 | esr); | 349 | esr | gr_gpc0_tpc0_tex_m_hww_esr_reset_active_f()); |
350 | 350 | ||
351 | return ret; | 351 | return ret; |
352 | } | 352 | } |
diff --git a/drivers/gpu/nvgpu/gp10b/hw_gr_gp10b.h b/drivers/gpu/nvgpu/gp10b/hw_gr_gp10b.h index 12d84716..0e47c508 100644 --- a/drivers/gpu/nvgpu/gp10b/hw_gr_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/hw_gr_gp10b.h | |||
@@ -3694,6 +3694,10 @@ static inline u32 gr_gpc0_tpc0_tex_m_hww_esr_ecc_ded_pending_f(void) | |||
3694 | { | 3694 | { |
3695 | return 0x100; | 3695 | return 0x100; |
3696 | } | 3696 | } |
3697 | static inline u32 gr_gpc0_tpc0_tex_m_hww_esr_reset_active_f(void) | ||
3698 | { | ||
3699 | return 0x40000000; | ||
3700 | } | ||
3697 | static inline u32 gr_gpc0_tpc0_sm_hww_warp_esr_r(void) | 3701 | static inline u32 gr_gpc0_tpc0_sm_hww_warp_esr_r(void) |
3698 | { | 3702 | { |
3699 | return 0x00504648; | 3703 | return 0x00504648; |