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authorMahantesh Kumbar <mkumbar@nvidia.com>2017-04-24 06:07:19 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-05-03 02:36:07 -0400
commit940cd280e15a206d51ceaf42d407fa4b96f40c9a (patch)
tree99e35e4e950c78ef11fe340f6ae10a91d2834299
parentf30a685f48768b784fb92652d945f43a289e13c4 (diff)
gpu: nvgpu: falcon controller HAL init
- Assign base address for falcon based on falcon id. - Init mutex for falcon - Init ops with NULL Change-Id: I9efee5c2b15106c7dfc6e55c996f62c7f7b85fc2 Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/1468452 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
-rw-r--r--drivers/gpu/nvgpu/Makefile.nvgpu1
-rw-r--r--drivers/gpu/nvgpu/gk20a/flcn_gk20a.c68
-rw-r--r--drivers/gpu/nvgpu/gk20a/flcn_gk20a.h19
-rw-r--r--drivers/gpu/nvgpu/gk20a/hal_gk20a.c4
4 files changed, 91 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/Makefile.nvgpu b/drivers/gpu/nvgpu/Makefile.nvgpu
index 5400b10d..8ed7f125 100644
--- a/drivers/gpu/nvgpu/Makefile.nvgpu
+++ b/drivers/gpu/nvgpu/Makefile.nvgpu
@@ -63,6 +63,7 @@ nvgpu-y := \
63 gk20a/kind_gk20a.o \ 63 gk20a/kind_gk20a.o \
64 gk20a/mm_gk20a.o \ 64 gk20a/mm_gk20a.o \
65 gk20a/pmu_gk20a.o \ 65 gk20a/pmu_gk20a.o \
66 gk20a/flcn_gk20a.o \
66 gk20a/priv_ring_gk20a.o \ 67 gk20a/priv_ring_gk20a.o \
67 gk20a/fence_gk20a.o \ 68 gk20a/fence_gk20a.o \
68 gk20a/therm_gk20a.o \ 69 gk20a/therm_gk20a.o \
diff --git a/drivers/gpu/nvgpu/gk20a/flcn_gk20a.c b/drivers/gpu/nvgpu/gk20a/flcn_gk20a.c
new file mode 100644
index 00000000..404718d0
--- /dev/null
+++ b/drivers/gpu/nvgpu/gk20a/flcn_gk20a.c
@@ -0,0 +1,68 @@
1/*
2 * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 */
13#include "gk20a/gk20a.h"
14
15static void gk20a_falcon_ops(struct nvgpu_falcon *flcn)
16{
17 struct nvgpu_falcon_ops *flcn_ops = &flcn->flcn_ops;
18 struct nvgpu_falcon_version_ops *flcn_vops = &flcn->flcn_vops;
19
20 flcn_ops->reset = NULL;
21 flcn_ops->enable_irq = NULL;
22 flcn_ops->fbif_transcfg = NULL;
23 flcn_ops->read_hwcfg = NULL;
24 flcn_ops->write_hwcfg = NULL;
25 flcn_ops->copy_from_dmem = NULL;
26 flcn_ops->copy_to_dmem = NULL;
27 flcn_ops->dma_copy = NULL;
28 flcn_ops->mailbox_read = NULL;
29 flcn_ops->mailbox_write = NULL;
30 flcn_ops->get_unit_status = NULL;
31 flcn_ops->dump_falcon_stats = NULL;
32
33 flcn_vops->start_cpu_secure = NULL;
34 flcn_vops->write_dmatrfbase = NULL;
35}
36
37void gk20a_falcon_hal_sw_init(struct nvgpu_falcon *flcn)
38{
39 struct gk20a *g = flcn->g;
40
41
42 switch (flcn->flcn_id) {
43 case FALCON_ID_PMU:
44 flcn->flcn_base = FALCON_PWR_BASE;
45 break;
46 case FALCON_ID_SEC2:
47 flcn->flcn_base = FALCON_SEC_BASE;
48 break;
49 case FALCON_ID_FECS:
50 flcn->flcn_base = FALCON_FECS_BASE;
51 break;
52 case FALCON_ID_GPCCS:
53 flcn->flcn_base = FALCON_GPCCS_BASE;
54 break;
55 default:
56 nvgpu_err(g, "Invalid flcn request");
57 break;
58 }
59
60 nvgpu_mutex_init(&flcn->copy_lock);
61
62 gk20a_falcon_ops(flcn);
63}
64
65void gk20a_falcon_init_hal(struct gpu_ops *gops)
66{
67 gops->falcon.falcon_hal_sw_init = gk20a_falcon_hal_sw_init;
68}
diff --git a/drivers/gpu/nvgpu/gk20a/flcn_gk20a.h b/drivers/gpu/nvgpu/gk20a/flcn_gk20a.h
new file mode 100644
index 00000000..388dba31
--- /dev/null
+++ b/drivers/gpu/nvgpu/gk20a/flcn_gk20a.h
@@ -0,0 +1,19 @@
1/*
2 * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 */
13#ifndef __FLCN_GK20A_H__
14#define __FLCN_GK20A_H__
15
16void gk20a_falcon_sw_init(struct nvgpu_falcon *flcn);
17void gk20a_falcon_init_hal(struct gpu_ops *gops);
18
19#endif /* __FLCN_GK20A_H__ */
diff --git a/drivers/gpu/nvgpu/gk20a/hal_gk20a.c b/drivers/gpu/nvgpu/gk20a/hal_gk20a.c
index 2ea4a0f1..3dbe856d 100644
--- a/drivers/gpu/nvgpu/gk20a/hal_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/hal_gk20a.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * GK20A Tegra HAL interface. 4 * GK20A Tegra HAL interface.
5 * 5 *
6 * Copyright (c) 2014-2016, NVIDIA CORPORATION. All rights reserved. 6 * Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved.
7 * 7 *
8 * This program is free software; you can redistribute it and/or modify it 8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms and conditions of the GNU General Public License, 9 * under the terms and conditions of the GNU General Public License,
@@ -26,6 +26,7 @@
26#include "fecs_trace_gk20a.h" 26#include "fecs_trace_gk20a.h"
27#include "mm_gk20a.h" 27#include "mm_gk20a.h"
28#include "mc_gk20a.h" 28#include "mc_gk20a.h"
29#include "flcn_gk20a.h"
29#include "pmu_gk20a.h" 30#include "pmu_gk20a.h"
30#include "clk_gk20a.h" 31#include "clk_gk20a.h"
31#include "regops_gk20a.h" 32#include "regops_gk20a.h"
@@ -162,6 +163,7 @@ int gk20a_init_hal(struct gk20a *g)
162 gk20a_init_ce2(gops); 163 gk20a_init_ce2(gops);
163 gk20a_init_gr_ctx(gops); 164 gk20a_init_gr_ctx(gops);
164 gk20a_init_mm(gops); 165 gk20a_init_mm(gops);
166 gk20a_falcon_init_hal(gops);
165 gk20a_init_pmu_ops(gops); 167 gk20a_init_pmu_ops(gops);
166 gk20a_init_clk_ops(gops); 168 gk20a_init_clk_ops(gops);
167 gk20a_init_regops(gops); 169 gk20a_init_regops(gops);