gpu: nvgpu: Reorg gr_ctx HAL initialization

Reorganize HAL initialization to remove inheritance and construct
the gpu_ops struct at compile time. This patch only covers the
gr_ctx sub-module of the gpu_ops struct.

Perform HAL function assignments in hal_gxxxx.c through the
population of a chip-specific copy of gpu_ops.

Jira NVGPU-74

Change-Id: I783d8e8919d8694ad2aa0d285e4c5a2b62580f48
Signed-off-by: Sunny He <suhe@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1527417
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

12 files changed, 39 insertions, 42 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index 8135f05e..90c35a7b 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -663,7 +663,6 @@ struct gpu_ops {
         struct {
                 int (*get_netlist_name)(struct gk20a *g, int index, char *name);
                 bool (*is_fw_defined)(void);
-                bool use_dma_for_fw_bootstrap;
         } gr_ctx;
         struct {
                 int (*init)(struct gk20a *g);
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
index d7c80b91..037f0df4 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
@@ -2367,7 +2367,7 @@ int gr_gk20a_load_ctxsw_ucode(struct gk20a *g)
          * In case bootloader is not supported, revert to the old way of
          * loading gr ucode, without the faster bootstrap routine.
          */
-        if (!g->ops.gr_ctx.use_dma_for_fw_bootstrap) {
+        if (!nvgpu_is_enabled(g, NVGPU_GR_USE_DMA_FOR_FW_BOOTSTRAP)) {
                 gr_gk20a_load_falcon_dmem(g);
                 gr_gk20a_load_falcon_imem(g);
                 gr_gk20a_start_falcon_ucode(g);
@@ -2400,7 +2400,7 @@ static int gr_gk20a_wait_ctxsw_ready(struct gk20a *g)
                 return ret;
         }
 
-        if (g->ops.gr_ctx.use_dma_for_fw_bootstrap ||
+        if (nvgpu_is_enabled(g, NVGPU_GR_USE_DMA_FOR_FW_BOOTSTRAP) ||
                 nvgpu_is_enabled(g, NVGPU_SEC_SECUREGPCCS))
                 gk20a_writel(g, gr_fecs_current_ctx_r(),
                         gr_fecs_current_ctx_valid_false_f());
diff --git a/drivers/gpu/nvgpu/gm20b/gr_ctx_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_ctx_gm20b.c
index e22acbe3..555c1409 100644
--- a/drivers/gpu/nvgpu/gm20b/gr_ctx_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/gr_ctx_gm20b.c
@@ -3,7 +3,7 @@
  *
  * GM20B Graphics Context
  *
- * Copyright (c) 2015, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2015-2017, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -22,7 +22,7 @@
 #include "gk20a/gk20a.h"
 #include "gr_ctx_gm20b.h"
 
-static int gr_gm20b_get_netlist_name(struct gk20a *g, int index, char *name)
+int gr_gm20b_get_netlist_name(struct gk20a *g, int index, char *name)
 {
         switch (index) {
 #ifdef GM20B_NETLIST_IMAGE_FW_NAME
@@ -57,7 +57,7 @@ static int gr_gm20b_get_netlist_name(struct gk20a *g, int index, char *name)
         return -1;
 }
 
-static bool gr_gm20b_is_firmware_defined(void)
+bool gr_gm20b_is_firmware_defined(void)
 {
 #ifdef GM20B_NETLIST_IMAGE_FW_NAME
         return true;
@@ -65,9 +65,3 @@ static bool gr_gm20b_is_firmware_defined(void)
         return false;
 #endif
 }
-
-void gm20b_init_gr_ctx(struct gpu_ops *gops) {
-        gops->gr_ctx.get_netlist_name = gr_gm20b_get_netlist_name;
-        gops->gr_ctx.is_fw_defined = gr_gm20b_is_firmware_defined;
-        gops->gr_ctx.use_dma_for_fw_bootstrap = true;
-}
diff --git a/drivers/gpu/nvgpu/gm20b/gr_ctx_gm20b.h b/drivers/gpu/nvgpu/gm20b/gr_ctx_gm20b.h
index 9172e151..414634da 100644
--- a/drivers/gpu/nvgpu/gm20b/gr_ctx_gm20b.h
+++ b/drivers/gpu/nvgpu/gm20b/gr_ctx_gm20b.h
@@ -1,7 +1,7 @@
 /*
  * GM20B Graphics Context
  *
- * Copyright (c) 2014, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2014-2017, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -24,6 +24,7 @@
 /*#undef GM20B_NETLIST_IMAGE_FW_NAME*/
 #define GM20B_NETLIST_IMAGE_FW_NAME GK20A_NETLIST_IMAGE_B
 
-void gm20b_init_gr_ctx(struct gpu_ops *gops);
+int gr_gm20b_get_netlist_name(struct gk20a *g, int index, char *name);
+bool gr_gm20b_is_firmware_defined(void);
 
 #endif /*__GR_CTX_GM20B_H__*/
diff --git a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
index c89f3746..1a11b11c 100644
--- a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
@@ -268,6 +268,10 @@ static const struct gpu_ops gm20b_ops = {
                 .get_syncpt_incr_cmd_size = gk20a_fifo_get_syncpt_incr_cmd_size,
 #endif
         },
+        .gr_ctx = {
+                .get_netlist_name = gr_gm20b_get_netlist_name,
+                .is_fw_defined = gr_gm20b_is_firmware_defined,
+        },
         .mc = {
                 .intr_enable = mc_gk20a_intr_enable,
                 .intr_unit_config = mc_gk20a_intr_unit_config,
@@ -339,6 +343,7 @@ int gm20b_init_hal(struct gk20a *g)
         gops->ce2 = gm20b_ops.ce2;
         gops->clock_gating = gm20b_ops.clock_gating;
         gops->fifo = gm20b_ops.fifo;
+        gops->gr_ctx = gm20b_ops.gr_ctx;
         gops->mc = gm20b_ops.mc;
         gops->dbg_session_ops = gm20b_ops.dbg_session_ops;
         gops->debug = gm20b_ops.debug;
@@ -356,6 +361,7 @@ int gm20b_init_hal(struct gk20a *g)
                 gm20b_ops.chip_init_gpu_characteristics;
         gops->get_litter_value = gm20b_ops.get_litter_value;
 
+        __nvgpu_set_enabled(g, NVGPU_GR_USE_DMA_FOR_FW_BOOTSTRAP, true);
         __nvgpu_set_enabled(g, NVGPU_SEC_SECUREGPCCS, false);
         __nvgpu_set_enabled(g, NVGPU_PMU_PSTATE, false);
 
@@ -389,7 +395,6 @@ int gm20b_init_hal(struct gk20a *g)
         g->bootstrap_owner = LSF_BOOTSTRAP_OWNER_DEFAULT;
         gm20b_init_gr(g);
         gm20b_init_fb(gops);
-        gm20b_init_gr_ctx(gops);
         gm20b_init_mm(gops);
         gm20b_init_pmu_ops(g);
         gm20b_init_clk_ops(gops);
diff --git a/drivers/gpu/nvgpu/gp106/gr_ctx_gp106.c b/drivers/gpu/nvgpu/gp106/gr_ctx_gp106.c
index 3a49cc60..706ff7e0 100644
--- a/drivers/gpu/nvgpu/gp106/gr_ctx_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/gr_ctx_gp106.c
@@ -1,7 +1,7 @@
 /*
  * GP106 Graphics Context
  *
- * Copyright (c) 2016, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2016-2017, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -16,7 +16,7 @@
 #include "gk20a/gk20a.h"
 #include "gr_ctx_gp106.h"
 
-static int gr_gp106_get_netlist_name(struct gk20a *g, int index, char *name)
+int gr_gp106_get_netlist_name(struct gk20a *g, int index, char *name)
 {
         u32 ver = g->gpu_characteristics.arch + g->gpu_characteristics.impl;
 
@@ -36,14 +36,7 @@ static int gr_gp106_get_netlist_name(struct gk20a *g, int index, char *name)
         return 0;
 }
 
-static bool gr_gp106_is_firmware_defined(void)
+bool gr_gp106_is_firmware_defined(void)
 {
         return true;
 }
-
-void gp106_init_gr_ctx(struct gpu_ops *gops)
-{
-        gops->gr_ctx.get_netlist_name = gr_gp106_get_netlist_name;
-        gops->gr_ctx.is_fw_defined = gr_gp106_is_firmware_defined;
-        gops->gr_ctx.use_dma_for_fw_bootstrap = false;
-}
diff --git a/drivers/gpu/nvgpu/gp106/gr_ctx_gp106.h b/drivers/gpu/nvgpu/gp106/gr_ctx_gp106.h
index fef80abb..f1162f5e 100644
--- a/drivers/gpu/nvgpu/gp106/gr_ctx_gp106.h
+++ b/drivers/gpu/nvgpu/gp106/gr_ctx_gp106.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2016, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2016-2017, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -22,6 +22,7 @@
 #define GP106_NETLIST_IMAGE_FW_NAME GK20A_NETLIST_IMAGE_C
 #define GP104_NETLIST_IMAGE_FW_NAME GK20A_NETLIST_IMAGE_D
 
-void gp106_init_gr_ctx(struct gpu_ops *gops);
+int gr_gp106_get_netlist_name(struct gk20a *g, int index, char *name);
+bool gr_gp106_is_firmware_defined(void);
 
 #endif /*__GR_CTX_GP106_H__*/
diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c
index 227b22e6..763dab44 100644
--- a/drivers/gpu/nvgpu/gp106/hal_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c
@@ -313,6 +313,10 @@ static const struct gpu_ops gp106_ops = {
                 .resetup_ramfc = gp10b_fifo_resetup_ramfc,
                 .device_info_fault_id = top_device_info_data_fault_id_enum_v,
         },
+        .gr_ctx = {
+                .get_netlist_name = gr_gp106_get_netlist_name,
+                .is_fw_defined = gr_gp106_is_firmware_defined,
+        },
         .mc = {
                 .intr_enable = mc_gp10b_intr_enable,
                 .intr_unit_config = mc_gp10b_intr_unit_config,
@@ -403,6 +407,7 @@ int gp106_init_hal(struct gk20a *g)
         gops->ce2 = gp106_ops.ce2;
         gops->clock_gating = gp106_ops.clock_gating;
         gops->fifo = gp106_ops.fifo;
+        gops->gr_ctx = gp106_ops.gr_ctx;
         gops->mc = gp106_ops.mc;
         gops->debug = gp106_ops.debug;
         gops->dbg_session_ops = gp106_ops.dbg_session_ops;
@@ -421,6 +426,7 @@ int gp106_init_hal(struct gk20a *g)
                 gp106_ops.chip_init_gpu_characteristics;
         gops->bios_init = gp106_ops.bios_init;
 
+        __nvgpu_set_enabled(g, NVGPU_GR_USE_DMA_FOR_FW_BOOTSTRAP, true);
         __nvgpu_set_enabled(g, NVGPU_SEC_PRIVSECURITY, true);
         __nvgpu_set_enabled(g, NVGPU_SEC_SECUREGPCCS, true);
         __nvgpu_set_enabled(g, NVGPU_PMU_PSTATE, true);
@@ -429,7 +435,6 @@ int gp106_init_hal(struct gk20a *g)
         gp106_init_gr(g);
         gp10b_init_fecs_trace_ops(gops);
         gp106_init_fb(gops);
-        gp106_init_gr_ctx(gops);
         gp106_init_mm(gops);
         gp106_init_pmu_ops(g);
         gp106_init_clk_ops(gops);
@@ -439,7 +444,6 @@ int gp106_init_hal(struct gk20a *g)
         gp106_init_therm_ops(gops);
 
         g->name = "gp10x";
-        gops->gr_ctx.use_dma_for_fw_bootstrap = true;
 
         c->twod_class = FERMI_TWOD_A;
         c->threed_class = PASCAL_B;
diff --git a/drivers/gpu/nvgpu/gp10b/gr_ctx_gp10b.c b/drivers/gpu/nvgpu/gp10b/gr_ctx_gp10b.c
index 2bb4a313..0c1798c0 100644
--- a/drivers/gpu/nvgpu/gp10b/gr_ctx_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/gr_ctx_gp10b.c
@@ -3,7 +3,7 @@
  *
  * GM20B Graphics Context
  *
- * Copyright (c) 2015, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2015-2017, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -22,7 +22,7 @@
 #include "gk20a/gk20a.h"
 #include "gr_ctx_gp10b.h"
 
-static int gr_gp10b_get_netlist_name(struct gk20a *g, int index, char *name)
+int gr_gp10b_get_netlist_name(struct gk20a *g, int index, char *name)
 {
         switch (index) {
 #ifdef GP10B_NETLIST_IMAGE_FW_NAME
@@ -57,7 +57,7 @@ static int gr_gp10b_get_netlist_name(struct gk20a *g, int index, char *name)
         return -1;
 }
 
-static bool gr_gp10b_is_firmware_defined(void)
+bool gr_gp10b_is_firmware_defined(void)
 {
 #ifdef GP10B_NETLIST_IMAGE_FW_NAME
         return true;
@@ -65,9 +65,3 @@ static bool gr_gp10b_is_firmware_defined(void)
         return false;
 #endif
 }
-
-void gp10b_init_gr_ctx(struct gpu_ops *gops) {
-        gops->gr_ctx.get_netlist_name = gr_gp10b_get_netlist_name;
-        gops->gr_ctx.is_fw_defined = gr_gp10b_is_firmware_defined;
-        gops->gr_ctx.use_dma_for_fw_bootstrap = true;
-}
diff --git a/drivers/gpu/nvgpu/gp10b/gr_ctx_gp10b.h b/drivers/gpu/nvgpu/gp10b/gr_ctx_gp10b.h
index b5c76d24..45415a01 100644
--- a/drivers/gpu/nvgpu/gp10b/gr_ctx_gp10b.h
+++ b/drivers/gpu/nvgpu/gp10b/gr_ctx_gp10b.h
@@ -1,7 +1,7 @@
 /*
  * GP10B Graphics Context
  *
- * Copyright (c) 2015, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2015-2017, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -23,6 +23,7 @@
 /* production netlist, one and only one from below */
 #define GP10B_NETLIST_IMAGE_FW_NAME GK20A_NETLIST_IMAGE_A
 
-void gp10b_init_gr_ctx(struct gpu_ops *gops);
+int gr_gp10b_get_netlist_name(struct gk20a *g, int index, char *name);
+bool gr_gp10b_is_firmware_defined(void);
 
 #endif /*__GR_CTX_GP10B_H__*/
diff --git a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
index feac284b..80018910 100644
--- a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
@@ -279,6 +279,10 @@ static const struct gpu_ops gp10b_ops = {
                 .resetup_ramfc = gp10b_fifo_resetup_ramfc,
                 .device_info_fault_id = top_device_info_data_fault_id_enum_v,
         },
+        .gr_ctx = {
+                .get_netlist_name = gr_gp10b_get_netlist_name,
+                .is_fw_defined = gr_gp10b_is_firmware_defined,
+        },
         .mc = {
                 .intr_enable = mc_gp10b_intr_enable,
                 .intr_unit_config = mc_gp10b_intr_unit_config,
@@ -352,6 +356,7 @@ int gp10b_init_hal(struct gk20a *g)
         gops->ce2 = gp10b_ops.ce2;
         gops->clock_gating = gp10b_ops.clock_gating;
         gops->fifo = gp10b_ops.fifo;
+        gops->gr_ctx = gp10b_ops.gr_ctx;
         gops->mc = gp10b_ops.mc;
         gops->debug = gp10b_ops.debug;
         gops->dbg_session_ops = gp10b_ops.dbg_session_ops;
@@ -369,6 +374,7 @@ int gp10b_init_hal(struct gk20a *g)
                 gp10b_ops.chip_init_gpu_characteristics;
         gops->get_litter_value = gp10b_ops.get_litter_value;
 
+        __nvgpu_set_enabled(g, NVGPU_GR_USE_DMA_FOR_FW_BOOTSTRAP, true);
         __nvgpu_set_enabled(g, NVGPU_PMU_PSTATE, false);
 
 #ifdef CONFIG_TEGRA_ACR
@@ -412,7 +418,6 @@ int gp10b_init_hal(struct gk20a *g)
         gp10b_init_gr(g);
         gp10b_init_fecs_trace_ops(gops);
         gp10b_init_fb(gops);
-        gp10b_init_gr_ctx(gops);
         gp10b_init_mm(gops);
         gp10b_init_pmu_ops(g);
         gp10b_init_regops(gops);
diff --git a/drivers/gpu/nvgpu/include/nvgpu/enabled.h b/drivers/gpu/nvgpu/include/nvgpu/enabled.h
index 7aac4be9..fd29a9eb 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/enabled.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/enabled.h
@@ -27,7 +27,7 @@ struct gk20a;
  */
 #define NVGPU_IS_FMODEL                         1
 #define NVGPU_DRIVER_IS_DYING                   2
-
+#define NVGPU_GR_USE_DMA_FOR_FW_BOOTSTRAP 3
 /*
  * MM flags.
  */