gpu: nvgpu: add NULL check for enable/disable_shadow_rom HALs

gops.xve.enable_shadow_rom and gops.xve.disable_shadow_rom HALs could be NULL
on some platforms
Execute them only if they are defined

Jira NVGPUT-120

Change-Id: I683d74a850372f442291a419951a2376805eb1e5
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1772559
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 5 insertions, 2 deletions

diff --git a/drivers/gpu/nvgpu/gp106/bios_gp106.c b/drivers/gpu/nvgpu/gp106/bios_gp106.c
index e30baf38..09d7b9af 100644
--- a/drivers/gpu/nvgpu/gp106/bios_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/bios_gp106.c
@@ -196,7 +196,9 @@ int gp106_bios_init(struct gk20a *g)
         g->bios.data = nvgpu_vmalloc(g, BIOS_SIZE);
         if (!g->bios.data)
                 return -ENOMEM;
-        g->ops.xve.disable_shadow_rom(g);
+
+        if (g->ops.xve.disable_shadow_rom)
+                g->ops.xve.disable_shadow_rom(g);
         for (i = 0; i < g->bios.size/4; i++) {
                 u32 val = be32_to_cpu(gk20a_readl(g, 0x300000 + i*4));
 
@@ -205,7 +207,8 @@ int gp106_bios_init(struct gk20a *g)
                 g->bios.data[(i*4)+2] = (val >> 8) & 0xff;
                 g->bios.data[(i*4)+3] = val & 0xff;
         }
-        g->ops.xve.enable_shadow_rom(g);
+        if (g->ops.xve.enable_shadow_rom)
+                g->ops.xve.enable_shadow_rom(g);
 
         err = nvgpu_bios_parse_rom(g);
         if (err)