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authorDavid Nieto <dmartineznie@nvidia.com>2017-04-27 16:11:26 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-04-28 16:44:12 -0400
commit4580763b4608706b5be467e67f9242716f10ea09 (patch)
treee79df765128ad1581c6e5c1b8fca6bc335521526
parente13d0723f62a0cfa5a2a1b007e08cfe3788a143a (diff)
gpu: nvgpu: fix K4.9 sparse messages
Fix issues related with wrong storage type for 64 bit variables. (1) Fixed width of HZ_TO_MHZ constant (2) changed fence_wait timeout to store unsigned long bug 200299572 Change-Id: Ie8f2386b738f3aafce75fc2440947e36befac273 Signed-off-by: David Nieto <dmartineznie@nvidia.com> Reviewed-on: http://git-master/r/1471611 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
-rw-r--r--drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c2
-rw-r--r--drivers/gpu/nvgpu/gk20a/fence_gk20a.c5
-rw-r--r--drivers/gpu/nvgpu/gk20a/fence_gk20a.h3
3 files changed, 6 insertions, 4 deletions
diff --git a/drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c b/drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c
index 97e911b9..17090291 100644
--- a/drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c
+++ b/drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c
@@ -32,7 +32,7 @@
32 32
33#include <nvgpu/log.h> 33#include <nvgpu/log.h>
34 34
35#define HZ_TO_MHZ(a) ((a > 0xF414F9CD7) ? 0xffff : (a >> 32) ? \ 35#define HZ_TO_MHZ(a) ((a > 0xF414F9CD7ULL) ? 0xffff : (a >> 32) ? \
36 (u32) ((a * 0x10C8ULL) >> 32) : (u16) ((u32) a/MHZ)) 36 (u32) ((a * 0x10C8ULL) >> 32) : (u16) ((u32) a/MHZ))
37#define MHZ_TO_HZ(a) ((u64)a * MHZ) 37#define MHZ_TO_HZ(a) ((u64)a * MHZ)
38 38
diff --git a/drivers/gpu/nvgpu/gk20a/fence_gk20a.c b/drivers/gpu/nvgpu/gk20a/fence_gk20a.c
index 92698745..87c4f6be 100644
--- a/drivers/gpu/nvgpu/gk20a/fence_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/fence_gk20a.c
@@ -82,11 +82,12 @@ static inline bool gk20a_fence_is_valid(struct gk20a_fence *f)
82 return valid; 82 return valid;
83} 83}
84 84
85int gk20a_fence_wait(struct gk20a *g, struct gk20a_fence *f, int timeout) 85int gk20a_fence_wait(struct gk20a *g, struct gk20a_fence *f,
86 unsigned long timeout)
86{ 87{
87 if (f && gk20a_fence_is_valid(f)) { 88 if (f && gk20a_fence_is_valid(f)) {
88 if (!nvgpu_platform_is_silicon(g)) 89 if (!nvgpu_platform_is_silicon(g))
89 timeout = (u32)MAX_SCHEDULE_TIMEOUT; 90 timeout = MAX_SCHEDULE_TIMEOUT;
90 return f->ops->wait(f, timeout); 91 return f->ops->wait(f, timeout);
91 } 92 }
92 return 0; 93 return 0;
diff --git a/drivers/gpu/nvgpu/gk20a/fence_gk20a.h b/drivers/gpu/nvgpu/gk20a/fence_gk20a.h
index c26cd250..87fa9fdb 100644
--- a/drivers/gpu/nvgpu/gk20a/fence_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/fence_gk20a.h
@@ -85,7 +85,8 @@ void gk20a_init_fence(struct gk20a_fence *f,
85/* Fence operations */ 85/* Fence operations */
86void gk20a_fence_put(struct gk20a_fence *f); 86void gk20a_fence_put(struct gk20a_fence *f);
87struct gk20a_fence *gk20a_fence_get(struct gk20a_fence *f); 87struct gk20a_fence *gk20a_fence_get(struct gk20a_fence *f);
88int gk20a_fence_wait(struct gk20a *g, struct gk20a_fence *f, int timeout); 88int gk20a_fence_wait(struct gk20a *g, struct gk20a_fence *f,
89 unsigned long timeout);
89bool gk20a_fence_is_expired(struct gk20a_fence *f); 90bool gk20a_fence_is_expired(struct gk20a_fence *f);
90int gk20a_fence_install_fd(struct gk20a_fence *f); 91int gk20a_fence_install_fd(struct gk20a_fence *f);
91 92