diff options
author | Terje Bergstrom <tbergstrom@nvidia.com> | 2014-12-09 03:49:08 -0500 |
---|---|---|
committer | Deepak Nibade <dnibade@nvidia.com> | 2016-12-27 04:52:03 -0500 |
commit | 4493b6b2004420eacab07f4e063377599ec9fe53 (patch) | |
tree | 44394a4b6b3ea6a06709a04ee739c99e630ff336 | |
parent | d40f3fb2731b9e0586677026dcdeaabf63398933 (diff) |
gpu: nvgpu: gp10b: Enable CILP mode for compute
Allow enabling CILP for compute. Set CTA by default.
Bug 1517461
Change-Id: I85cc931b810afb3ee6116de1200d01b52e1bc29e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/661298
GVS: Gerrit_Virtual_Submit
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/gr_gp10b.c | 21 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/gr_gp10b.h | 3 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/hw_ctxsw_prog_gp10b.h | 16 |
3 files changed, 35 insertions, 5 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c index 0a60612d..576cdf45 100644 --- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c | |||
@@ -510,13 +510,14 @@ static int gr_gp10b_init_ctx_state(struct gk20a *g) | |||
510 | 510 | ||
511 | int gr_gp10b_alloc_gr_ctx(struct gk20a *g, | 511 | int gr_gp10b_alloc_gr_ctx(struct gk20a *g, |
512 | struct gr_ctx_desc **gr_ctx, struct vm_gk20a *vm, | 512 | struct gr_ctx_desc **gr_ctx, struct vm_gk20a *vm, |
513 | u32 class, | ||
513 | u32 flags) | 514 | u32 flags) |
514 | { | 515 | { |
515 | int err; | 516 | int err; |
516 | 517 | ||
517 | gk20a_dbg_fn(""); | 518 | gk20a_dbg_fn(""); |
518 | 519 | ||
519 | err = gr_gk20a_alloc_gr_ctx(g, gr_ctx, vm, flags); | 520 | err = gr_gk20a_alloc_gr_ctx(g, gr_ctx, vm, class, flags); |
520 | if (err) | 521 | if (err) |
521 | return err; | 522 | return err; |
522 | 523 | ||
@@ -566,9 +567,15 @@ int gr_gp10b_alloc_gr_ctx(struct gk20a *g, | |||
566 | goto fail_free_betacb; | 567 | goto fail_free_betacb; |
567 | } | 568 | } |
568 | 569 | ||
569 | (*gr_ctx)->t18x.preempt_mode = flags; | 570 | (*gr_ctx)->preempt_mode = flags; |
570 | } | 571 | } |
571 | 572 | ||
573 | if (class == PASCAL_COMPUTE_A) | ||
574 | if (flags == NVGPU_GR_PREEMPTION_MODE_CILP) | ||
575 | (*gr_ctx)->preempt_mode = NVGPU_GR_PREEMPTION_MODE_CILP; | ||
576 | else | ||
577 | (*gr_ctx)->preempt_mode = NVGPU_GR_PREEMPTION_MODE_CTA; | ||
578 | |||
572 | gk20a_dbg_fn("done"); | 579 | gk20a_dbg_fn("done"); |
573 | 580 | ||
574 | return err; | 581 | return err; |
@@ -610,16 +617,24 @@ static void gr_gp10b_update_ctxsw_preemption_mode(struct gk20a *g, | |||
610 | struct gr_ctx_desc *gr_ctx = ch_ctx->gr_ctx; | 617 | struct gr_ctx_desc *gr_ctx = ch_ctx->gr_ctx; |
611 | u32 gfxp_preempt_option = | 618 | u32 gfxp_preempt_option = |
612 | ctxsw_prog_main_image_graphics_preemption_options_control_gfxp_f(); | 619 | ctxsw_prog_main_image_graphics_preemption_options_control_gfxp_f(); |
620 | u32 cilp_preempt_option = | ||
621 | ctxsw_prog_main_image_compute_preemption_options_control_cilp_f(); | ||
613 | int err; | 622 | int err; |
614 | 623 | ||
615 | gk20a_dbg_fn(""); | 624 | gk20a_dbg_fn(""); |
616 | 625 | ||
617 | if (gr_ctx->t18x.preempt_mode == NVGPU_GR_PREEMPTION_MODE_GFXP) { | 626 | if (gr_ctx->preempt_mode == NVGPU_GR_PREEMPTION_MODE_GFXP) { |
618 | gk20a_dbg_info("GfxP: %x", gfxp_preempt_option); | 627 | gk20a_dbg_info("GfxP: %x", gfxp_preempt_option); |
619 | gk20a_mem_wr32(ctx_ptr + ctxsw_prog_main_image_graphics_preemption_options_o(), 0, | 628 | gk20a_mem_wr32(ctx_ptr + ctxsw_prog_main_image_graphics_preemption_options_o(), 0, |
620 | gfxp_preempt_option); | 629 | gfxp_preempt_option); |
621 | } | 630 | } |
622 | 631 | ||
632 | if (gr_ctx->preempt_mode == NVGPU_GR_PREEMPTION_MODE_CILP) { | ||
633 | gk20a_dbg_info("CILP: %x", cilp_preempt_option); | ||
634 | gk20a_mem_wr32(ctx_ptr + ctxsw_prog_main_image_compute_preemption_options_o(), 0, | ||
635 | cilp_preempt_option); | ||
636 | } | ||
637 | |||
623 | if (gr_ctx->t18x.preempt_ctxsw_buffer.gpu_va) { | 638 | if (gr_ctx->t18x.preempt_ctxsw_buffer.gpu_va) { |
624 | u32 addr; | 639 | u32 addr; |
625 | u32 size; | 640 | u32 size; |
diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.h b/drivers/gpu/nvgpu/gp10b/gr_gp10b.h index 6bbda564..1b99cafb 100644 --- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.h | |||
@@ -39,14 +39,13 @@ struct gr_t18x { | |||
39 | }; | 39 | }; |
40 | 40 | ||
41 | struct gr_ctx_desc_t18x { | 41 | struct gr_ctx_desc_t18x { |
42 | int preempt_mode; | ||
43 | struct mem_desc preempt_ctxsw_buffer; | 42 | struct mem_desc preempt_ctxsw_buffer; |
44 | struct mem_desc spill_ctxsw_buffer; | 43 | struct mem_desc spill_ctxsw_buffer; |
45 | struct mem_desc betacb_ctxsw_buffer; | 44 | struct mem_desc betacb_ctxsw_buffer; |
46 | struct mem_desc pagepool_ctxsw_buffer; | 45 | struct mem_desc pagepool_ctxsw_buffer; |
47 | }; | 46 | }; |
48 | 47 | ||
49 | #define NVGPU_GR_PREEMPTION_MODE_WFI 0 | ||
50 | #define NVGPU_GR_PREEMPTION_MODE_GFXP 1 | 48 | #define NVGPU_GR_PREEMPTION_MODE_GFXP 1 |
49 | #define NVGPU_GR_PREEMPTION_MODE_CILP 3 | ||
51 | 50 | ||
52 | #endif | 51 | #endif |
diff --git a/drivers/gpu/nvgpu/gp10b/hw_ctxsw_prog_gp10b.h b/drivers/gpu/nvgpu/gp10b/hw_ctxsw_prog_gp10b.h index 0892f12e..7872c19c 100644 --- a/drivers/gpu/nvgpu/gp10b/hw_ctxsw_prog_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/hw_ctxsw_prog_gp10b.h | |||
@@ -254,4 +254,20 @@ static inline u32 ctxsw_prog_main_image_full_preemption_ptr_o(void) | |||
254 | { | 254 | { |
255 | return 0x00000068; | 255 | return 0x00000068; |
256 | } | 256 | } |
257 | static inline u32 ctxsw_prog_main_image_compute_preemption_options_o(void) | ||
258 | { | ||
259 | return 0x00000084; | ||
260 | } | ||
261 | static inline u32 ctxsw_prog_main_image_compute_preemption_options_control_f(u32 v) | ||
262 | { | ||
263 | return (v & 0x3) << 0; | ||
264 | } | ||
265 | static inline u32 ctxsw_prog_main_image_compute_preemption_options_control_cta_f(void) | ||
266 | { | ||
267 | return 0x1; | ||
268 | } | ||
269 | static inline u32 ctxsw_prog_main_image_compute_preemption_options_control_cilp_f(void) | ||
270 | { | ||
271 | return 0x2; | ||
272 | } | ||
257 | #endif | 273 | #endif |