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authorRichard Zhao <rizhao@nvidia.com>2018-04-20 18:17:13 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-04-25 12:36:53 -0400
commit3d0ddb8c4a735cc0c321ddef935f5c3eaad08660 (patch)
tree2568629c3867968a6c65c381a909cb2a36faea2d
parent98dce7eaac374ccd5c4d7cf6d76decc4e9cd3896 (diff)
gpu: nvgpu: move parameter of .vm_bind_channel from as_share to vm
as_share is more os specific and not yet used on other OSes. Jira VQRM-2344 Change-Id: Ie2ed007125400484352fbab602c37a198e8a64ae Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1699842 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
-rw-r--r--drivers/gpu/nvgpu/common/linux/cde.c2
-rw-r--r--drivers/gpu/nvgpu/common/linux/ioctl_as.c2
-rw-r--r--drivers/gpu/nvgpu/gk20a/ce2_gk20a.c2
-rw-r--r--drivers/gpu/nvgpu/gk20a/gk20a.h2
-rw-r--r--drivers/gpu/nvgpu/gk20a/mm_gk20a.c10
-rw-r--r--drivers/gpu/nvgpu/gk20a/mm_gk20a.h6
-rw-r--r--drivers/gpu/nvgpu/vgpu/mm_vgpu.c3
-rw-r--r--drivers/gpu/nvgpu/vgpu/mm_vgpu.h2
8 files changed, 10 insertions, 19 deletions
diff --git a/drivers/gpu/nvgpu/common/linux/cde.c b/drivers/gpu/nvgpu/common/linux/cde.c
index f3895d5c..7c92246c 100644
--- a/drivers/gpu/nvgpu/common/linux/cde.c
+++ b/drivers/gpu/nvgpu/common/linux/cde.c
@@ -1306,7 +1306,7 @@ static int gk20a_cde_load(struct gk20a_cde_ctx *cde_ctx)
1306 } 1306 }
1307 1307
1308 /* bind the channel to the vm */ 1308 /* bind the channel to the vm */
1309 err = __gk20a_vm_bind_channel(g->mm.cde.vm, ch); 1309 err = g->ops.mm.vm_bind_channel(g->mm.cde.vm, ch);
1310 if (err) { 1310 if (err) {
1311 nvgpu_warn(g, "cde: could not bind vm"); 1311 nvgpu_warn(g, "cde: could not bind vm");
1312 goto err_commit_va; 1312 goto err_commit_va;
diff --git a/drivers/gpu/nvgpu/common/linux/ioctl_as.c b/drivers/gpu/nvgpu/common/linux/ioctl_as.c
index 7559499e..e09e099b 100644
--- a/drivers/gpu/nvgpu/common/linux/ioctl_as.c
+++ b/drivers/gpu/nvgpu/common/linux/ioctl_as.c
@@ -63,7 +63,7 @@ static int gk20a_as_ioctl_bind_channel(
63 } 63 }
64 64
65 /* this will set channel_gk20a->vm */ 65 /* this will set channel_gk20a->vm */
66 err = ch->g->ops.mm.vm_bind_channel(as_share, ch); 66 err = ch->g->ops.mm.vm_bind_channel(as_share->vm, ch);
67 67
68out: 68out:
69 gk20a_channel_put(ch); 69 gk20a_channel_put(ch);
diff --git a/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c b/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c
index 6da65abd..0280bbbb 100644
--- a/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c
@@ -449,7 +449,7 @@ u32 gk20a_ce_create_context(struct gk20a *g,
449 ce_ctx->ch->timeout.enabled = false; 449 ce_ctx->ch->timeout.enabled = false;
450 450
451 /* bind the channel to the vm */ 451 /* bind the channel to the vm */
452 err = __gk20a_vm_bind_channel(g->mm.ce.vm, ce_ctx->ch); 452 err = g->ops.mm.vm_bind_channel(g->mm.ce.vm, ce_ctx->ch);
453 if (err) { 453 if (err) {
454 nvgpu_err(g, "ce: could not bind vm"); 454 nvgpu_err(g, "ce: could not bind vm");
455 goto end; 455 goto end;
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index ba27f5d9..0a60d46a 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -855,7 +855,7 @@ struct gpu_ops {
855 int rw_flag, 855 int rw_flag,
856 bool sparse, 856 bool sparse,
857 struct vm_gk20a_mapping_batch *batch); 857 struct vm_gk20a_mapping_batch *batch);
858 int (*vm_bind_channel)(struct gk20a_as_share *as_share, 858 int (*vm_bind_channel)(struct vm_gk20a *vm,
859 struct channel_gk20a *ch); 859 struct channel_gk20a *ch);
860 int (*fb_flush)(struct gk20a *g); 860 int (*fb_flush)(struct gk20a *g);
861 void (*l2_invalidate)(struct gk20a *g); 861 void (*l2_invalidate)(struct gk20a *g);
diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
index 4ff6125b..14876296 100644
--- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (c) 2011-2017, NVIDIA CORPORATION. All rights reserved. 2 * Copyright (c) 2011-2018, NVIDIA CORPORATION. All rights reserved.
3 * 3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a 4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"), 5 * copy of this software and associated documentation files (the "Software"),
@@ -332,7 +332,7 @@ const struct gk20a_mmu_level gk20a_mm_levels_128k[] = {
332 {.update_entry = NULL} 332 {.update_entry = NULL}
333}; 333};
334 334
335int __gk20a_vm_bind_channel(struct vm_gk20a *vm, struct channel_gk20a *ch) 335int gk20a_vm_bind_channel(struct vm_gk20a *vm, struct channel_gk20a *ch)
336{ 336{
337 int err = 0; 337 int err = 0;
338 338
@@ -350,12 +350,6 @@ int __gk20a_vm_bind_channel(struct vm_gk20a *vm, struct channel_gk20a *ch)
350 return err; 350 return err;
351} 351}
352 352
353int gk20a_vm_bind_channel(struct gk20a_as_share *as_share,
354 struct channel_gk20a *ch)
355{
356 return __gk20a_vm_bind_channel(as_share->vm, ch);
357}
358
359void gk20a_mm_init_pdb(struct gk20a *g, struct nvgpu_mem *inst_block, 353void gk20a_mm_init_pdb(struct gk20a *g, struct nvgpu_mem *inst_block,
360 struct vm_gk20a *vm) 354 struct vm_gk20a *vm)
361{ 355{
diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h
index 14629611..55d74435 100644
--- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * GK20A memory management 2 * GK20A memory management
3 * 3 *
4 * Copyright (c) 2011-2017, NVIDIA CORPORATION. All rights reserved. 4 * Copyright (c) 2011-2018, NVIDIA CORPORATION. All rights reserved.
5 * 5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a 6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"), 7 * copy of this software and associated documentation files (the "Software"),
@@ -165,9 +165,7 @@ void gk20a_locked_gmmu_unmap(struct vm_gk20a *vm,
165struct nvgpu_as_alloc_space_args; 165struct nvgpu_as_alloc_space_args;
166struct nvgpu_as_free_space_args; 166struct nvgpu_as_free_space_args;
167int gk20a_vm_release_share(struct gk20a_as_share *as_share); 167int gk20a_vm_release_share(struct gk20a_as_share *as_share);
168int gk20a_vm_bind_channel(struct gk20a_as_share *as_share, 168int gk20a_vm_bind_channel(struct vm_gk20a *vm, struct channel_gk20a *ch);
169 struct channel_gk20a *ch);
170int __gk20a_vm_bind_channel(struct vm_gk20a *vm, struct channel_gk20a *ch);
171 169
172void pde_range_from_vaddr_range(struct vm_gk20a *vm, 170void pde_range_from_vaddr_range(struct vm_gk20a *vm,
173 u64 addr_lo, u64 addr_hi, 171 u64 addr_lo, u64 addr_hi,
diff --git a/drivers/gpu/nvgpu/vgpu/mm_vgpu.c b/drivers/gpu/nvgpu/vgpu/mm_vgpu.c
index cba77ecf..3e75cee3 100644
--- a/drivers/gpu/nvgpu/vgpu/mm_vgpu.c
+++ b/drivers/gpu/nvgpu/vgpu/mm_vgpu.c
@@ -177,10 +177,9 @@ u64 vgpu_bar1_map(struct gk20a *g, struct nvgpu_mem *mem)
177 return addr; 177 return addr;
178} 178}
179 179
180int vgpu_vm_bind_channel(struct gk20a_as_share *as_share, 180int vgpu_vm_bind_channel(struct vm_gk20a *vm,
181 struct channel_gk20a *ch) 181 struct channel_gk20a *ch)
182{ 182{
183 struct vm_gk20a *vm = as_share->vm;
184 struct tegra_vgpu_cmd_msg msg; 183 struct tegra_vgpu_cmd_msg msg;
185 struct tegra_vgpu_as_bind_share_params *p = &msg.params.as_bind_share; 184 struct tegra_vgpu_as_bind_share_params *p = &msg.params.as_bind_share;
186 int err; 185 int err;
diff --git a/drivers/gpu/nvgpu/vgpu/mm_vgpu.h b/drivers/gpu/nvgpu/vgpu/mm_vgpu.h
index 12265fc1..c019ca22 100644
--- a/drivers/gpu/nvgpu/vgpu/mm_vgpu.h
+++ b/drivers/gpu/nvgpu/vgpu/mm_vgpu.h
@@ -37,7 +37,7 @@ void vgpu_locked_gmmu_unmap(struct vm_gk20a *vm,
37 int rw_flag, 37 int rw_flag,
38 bool sparse, 38 bool sparse,
39 struct vm_gk20a_mapping_batch *batch); 39 struct vm_gk20a_mapping_batch *batch);
40int vgpu_vm_bind_channel(struct gk20a_as_share *as_share, 40int vgpu_vm_bind_channel(struct vm_gk20a *vm,
41 struct channel_gk20a *ch); 41 struct channel_gk20a *ch);
42int vgpu_mm_fb_flush(struct gk20a *g); 42int vgpu_mm_fb_flush(struct gk20a *g);
43void vgpu_mm_l2_invalidate(struct gk20a *g); 43void vgpu_mm_l2_invalidate(struct gk20a *g);