gpu: nvgpu: MISRA Rule 21.2 header guard fixes

MISRA rule 21.2 doesn't allow the use of macro names which start with
an underscore. These leading underscores are to be removed from the
macro names. This patch will fix such violations in nvgpu by
renaming them to follow the convention,'NVGPU_PARENT-DIR_HEADER-NAME'
when there is no keyword repetition between file name and directory
or 'NVGPU_HEADER-NAME' when there is repetition.

JIRA NVGPU-1028

Change-Id: I8a473c6c1a864f3893920d8e06e305095e523d2a
Signed-off-by: smadhavan <smadhavan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1809082
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Tested-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

20 files changed, 64 insertions, 65 deletions

diff --git a/drivers/gpu/nvgpu/boardobj/boardobj.h b/drivers/gpu/nvgpu/boardobj/boardobj.h
index b2ab990c..b1be9bd58 100644
--- a/drivers/gpu/nvgpu/boardobj/boardobj.h
+++ b/drivers/gpu/nvgpu/boardobj/boardobj.h
@@ -20,8 +20,8 @@
  * DEALINGS IN THE SOFTWARE.
 */
 
-#ifndef _BOARDOBJ_H_
-#define _BOARDOBJ_H_
+#ifndef NVGPU_BOARDOBJ_H
+#define NVGPU_BOARDOBJ_H
 
 #include <nvgpu/list.h>
 #include <nvgpu/pmuif/nvgpu_gpmu_cmdif.h>
@@ -101,4 +101,4 @@ boardobj_from_node(struct nvgpu_list_node *node)
                 ((uintptr_t)node - offsetof(struct boardobj, node));
 };
 
-#endif
+#endif /* NVGPU_BOARDOBJ_H */
diff --git a/drivers/gpu/nvgpu/boardobj/boardobjgrp.h b/drivers/gpu/nvgpu/boardobj/boardobjgrp.h
index 095ff4c9..e9df445f 100644
--- a/drivers/gpu/nvgpu/boardobj/boardobjgrp.h
+++ b/drivers/gpu/nvgpu/boardobj/boardobjgrp.h
@@ -20,8 +20,8 @@
  * DEALINGS IN THE SOFTWARE.
 */
 
-#ifndef _BOARDOBJGRP_H_
-#define _BOARDOBJGRP_H_
+#ifndef NVGPU_BOARDOBJGRP_H
+#define NVGPU_BOARDOBJGRP_H
 
 struct boardobjgrp;
 struct gk20a;
@@ -438,4 +438,4 @@ int is_boardobjgrp_pmucmd_id_valid_v0(struct gk20a *g,
 int is_boardobjgrp_pmucmd_id_valid_v1(struct gk20a *g,
         struct boardobjgrp *pboardobjgrp,
         struct boardobjgrp_pmu_cmd *cmd);
-#endif
+#endif /* NVGPU_BOARDOBJGRP_H */
diff --git a/drivers/gpu/nvgpu/boardobj/boardobjgrp_e255.h b/drivers/gpu/nvgpu/boardobj/boardobjgrp_e255.h
index 10cd95c6..bc405419 100644
--- a/drivers/gpu/nvgpu/boardobj/boardobjgrp_e255.h
+++ b/drivers/gpu/nvgpu/boardobj/boardobjgrp_e255.h
@@ -20,8 +20,8 @@
  * DEALINGS IN THE SOFTWARE.
  */
 
-#ifndef _BOARDOBJGRP_E255_H_
-#define _BOARDOBJGRP_E255_H_
+#ifndef NVGPU_BOARDOBJGRP_E255_H
+#define NVGPU_BOARDOBJGRP_E255_H
 
 #include "ctrl/ctrlboardobj.h"
 #include "boardobj.h"
@@ -48,4 +48,4 @@ int boardobjgrpconstruct_e255(struct gk20a *g,
 boardobjgrp_destruct boardobjgrpdestruct_e255;
 boardobjgrp_pmuhdrdatainit  boardobjgrp_pmuhdrdatainit_e255;
 
-#endif
+#endif /* NVGPU_BOARDOBJGRP_E255_H */
diff --git a/drivers/gpu/nvgpu/boardobj/boardobjgrp_e32.h b/drivers/gpu/nvgpu/boardobj/boardobjgrp_e32.h
index 900901bb..d4beb47e 100644
--- a/drivers/gpu/nvgpu/boardobj/boardobjgrp_e32.h
+++ b/drivers/gpu/nvgpu/boardobj/boardobjgrp_e32.h
@@ -20,8 +20,8 @@
  * DEALINGS IN THE SOFTWARE.
  */
 
-#ifndef _BOARDOBJGRP_E32_H_
-#define _BOARDOBJGRP_E32_H_
+#ifndef NVGPU_BOARDOBJGRP_E32_H
+#define NVGPU_BOARDOBJGRP_E32_H
 
 #include "ctrl/ctrlboardobj.h"
 #include "boardobj.h"
@@ -63,4 +63,4 @@ int boardobjgrpconstruct_e32(struct gk20a *g,
 boardobjgrp_destruct boardobjgrpdestruct_e32;
 boardobjgrp_pmuhdrdatainit  boardobjgrp_pmuhdrdatainit_e32;
 
-#endif
+#endif /* NVGPU_BOARDOBJGRP_E32_H */
diff --git a/drivers/gpu/nvgpu/boardobj/boardobjgrpmask.h b/drivers/gpu/nvgpu/boardobj/boardobjgrpmask.h
index c081284a..f4ed0af4 100644
--- a/drivers/gpu/nvgpu/boardobj/boardobjgrpmask.h
+++ b/drivers/gpu/nvgpu/boardobj/boardobjgrpmask.h
@@ -20,8 +20,8 @@
  * DEALINGS IN THE SOFTWARE.
  */
 
-#ifndef _BOARDOBJGRPMASK_H_
-#define _BOARDOBJGRPMASK_H_
+#ifndef NVGPU_BOARDOBJGRPMASK_H
+#define NVGPU_BOARDOBJGRPMASK_H
 
 #include "ctrl/ctrlboardobj.h"
 
@@ -116,4 +116,4 @@ bool boardobjgrpmask_issubset(struct boardobjgrpmask *op1,
         boardobjgrpmask_init(&(pmaske255)->super,                              \
                 CTRL_BOARDOBJGRP_E255_MAX_OBJECTS, (pextmask))
 
-#endif
+#endif /* NVGPU_BOARDOBJGRPMASK_H */
diff --git a/drivers/gpu/nvgpu/lpwr/lpwr.h b/drivers/gpu/nvgpu/lpwr/lpwr.h
index 98b9769e..c38ba629 100644
--- a/drivers/gpu/nvgpu/lpwr/lpwr.h
+++ b/drivers/gpu/nvgpu/lpwr/lpwr.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2016, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2016-2018, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -19,8 +19,8 @@
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  * DEALINGS IN THE SOFTWARE.
  */
-#ifndef _MSCG_H_
-#define _MSCG_H_
+#ifndef NVGPU_LPWR_H
+#define NVGPU_LPWR_H
 
 #define MAX_SWASR_MCLK_FREQ_WITHOUT_WR_TRAINING_MAXWELL_MHZ   540
 
@@ -98,4 +98,4 @@ u32 nvgpu_lpwr_is_mscg_supported(struct gk20a *g, u32 pstate_num);
 u32 nvgpu_lpwr_is_rppg_supported(struct gk20a *g, u32 pstate_num);
 u32 nvgpu_lpwr_post_init(struct gk20a *g);
 
-#endif
+#endif /* NVGPU_LPWR_H */
diff --git a/drivers/gpu/nvgpu/lpwr/rppg.h b/drivers/gpu/nvgpu/lpwr/rppg.h
index a9966cbf..d66600a0 100644
--- a/drivers/gpu/nvgpu/lpwr/rppg.h
+++ b/drivers/gpu/nvgpu/lpwr/rppg.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2016, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2016-2018, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -19,8 +19,8 @@
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  * DEALINGS IN THE SOFTWARE.
  */
-#ifndef _RPPG_H_
-#define _RPPG_H_
+#ifndef NVGPU_LPWR_RPPG_H
+#define NVGPU_LPWR_RPPG_H
 
 u32 init_rppg(struct gk20a *g);
-#endif
+#endif /* NVGPU_LPWR_RPPG_H */
diff --git a/drivers/gpu/nvgpu/perf/perf.h b/drivers/gpu/nvgpu/perf/perf.h
index 17a9b0e1..71c8086b 100644
--- a/drivers/gpu/nvgpu/perf/perf.h
+++ b/drivers/gpu/nvgpu/perf/perf.h
@@ -19,8 +19,8 @@
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  * DEALINGS IN THE SOFTWARE.
  */
-#ifndef _PERF_H_
-#define _PERF_H_
+#ifndef NVGPU_PERF_H
+#define NVGPU_PERF_H
 
 #include <nvgpu/pmuif/nvgpu_gpmu_cmdif.h>
 #include "vfe_equ.h"
@@ -82,4 +82,4 @@ struct perf_pmupstate {
 
 u32 perf_pmu_vfe_load(struct gk20a *g);
 
-#endif
+#endif /* NVGPU_PERF_H */
diff --git a/drivers/gpu/nvgpu/perf/vfe_equ.h b/drivers/gpu/nvgpu/perf/vfe_equ.h
index 486a48f8..98222ee5 100644
--- a/drivers/gpu/nvgpu/perf/vfe_equ.h
+++ b/drivers/gpu/nvgpu/perf/vfe_equ.h
@@ -21,8 +21,8 @@
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  * DEALINGS IN THE SOFTWARE.
  */
-#ifndef _VFE_EQU_H_
-#define _VFE_EQU_H_
+#ifndef NVGPU_PERF_VFE_EQU_H
+#define NVGPU_PERF_VFE_EQU_H
 
 #include "boardobj/boardobjgrp.h"
 #include "perf/vfe_var.h"
@@ -81,4 +81,4 @@ struct vfe_equ_quadratic {
         u32   coeffs[CTRL_PERF_VFE_EQU_QUADRATIC_COEFF_COUNT];
 };
 
-#endif
+#endif /* NVGPU_PERF_VFE_EQU_H */
diff --git a/drivers/gpu/nvgpu/perf/vfe_var.h b/drivers/gpu/nvgpu/perf/vfe_var.h
index 535600a7..98b7c40b 100644
--- a/drivers/gpu/nvgpu/perf/vfe_var.h
+++ b/drivers/gpu/nvgpu/perf/vfe_var.h
@@ -20,8 +20,8 @@
  * DEALINGS IN THE SOFTWARE.
  */
 
-#ifndef _VFE_VAR_H_
-#define _VFE_VAR_H_
+#ifndef NVGPU_PERF_VFE_VAR_H
+#define NVGPU_PERF_VFE_VAR_H
 
 #include "boardobj/boardobjgrp.h"
 #include <nvgpu/pmuif/nvgpu_gpmu_cmdif.h>
@@ -106,4 +106,4 @@ struct vfe_var_single_sensed_temp {
         int temp_default;
 };
 
-#endif
+#endif /* NVGPU_PERF_VFE_VAR_H */
diff --git a/drivers/gpu/nvgpu/pstate/pstate.h b/drivers/gpu/nvgpu/pstate/pstate.h
index 0860b46e..42b27eab 100644
--- a/drivers/gpu/nvgpu/pstate/pstate.h
+++ b/drivers/gpu/nvgpu/pstate/pstate.h
@@ -21,8 +21,8 @@
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  * DEALINGS IN THE SOFTWARE.
  */
-#ifndef __PSTATE_H__
-#define __PSTATE_H__
+#ifndef NVGPU_PSTATE_H
+#define NVGPU_PSTATE_H
 
 #include "clk/clk.h"
 
@@ -71,4 +71,4 @@ struct clk_set_info *pstate_get_clk_set_info(struct gk20a *g, u32 pstate_num,
                 enum nv_pmu_clk_clkwhich clkwhich);
 struct pstate *pstate_find(struct gk20a *g, u32 num);
 
-#endif /* __PSTATE_H__ */
+#endif /* NVGPU_PSTATE_H */
diff --git a/drivers/gpu/nvgpu/therm/thrm.h b/drivers/gpu/nvgpu/therm/thrm.h
index 5b5a5a57..d9d73b7f 100644
--- a/drivers/gpu/nvgpu/therm/thrm.h
+++ b/drivers/gpu/nvgpu/therm/thrm.h
@@ -1,7 +1,7 @@
 /*
  * general thermal table structures & definitions
  *
- * Copyright (c) 2016, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2016-2018, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -21,8 +21,8 @@
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  * DEALINGS IN THE SOFTWARE.
  */
-#ifndef _THRM_H_
-#define _THRM_H_
+#ifndef NVGPU_THERM_THRM_H
+#define NVGPU_THERM_THRM_H
 
 #include "thrmdev.h"
 #include "thrmchannel.h"
@@ -35,4 +35,4 @@ struct therm_pmupstate {
 u32 therm_domain_sw_setup(struct gk20a *g);
 u32 therm_domain_pmu_setup(struct gk20a *g);
 
-#endif
+#endif /* NVGPU_THERM_THRM_H */
diff --git a/drivers/gpu/nvgpu/therm/thrmchannel.h b/drivers/gpu/nvgpu/therm/thrmchannel.h
index a2045c26..89be673f 100644
--- a/drivers/gpu/nvgpu/therm/thrmchannel.h
+++ b/drivers/gpu/nvgpu/therm/thrmchannel.h
@@ -21,8 +21,8 @@
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  * DEALINGS IN THE SOFTWARE.
  */
-#ifndef _THRMCHANNEL_H_
-#define _THRMCHANNEL_H_
+#ifndef NVGPU_THERM_THRMCHANNEL_H
+#define NVGPU_THERM_THRMCHANNEL_H
 
 #include "boardobj/boardobj.h"
 #include "boardobj/boardobjgrp.h"
@@ -48,4 +48,4 @@ struct therm_channel_device {
 
 int therm_channel_sw_setup(struct gk20a *g);
 
-#endif
+#endif /* NVGPU_THERM_THRMCHANNEL_H */
diff --git a/drivers/gpu/nvgpu/therm/thrmdev.h b/drivers/gpu/nvgpu/therm/thrmdev.h
index df4c199a..151e96fb 100644
--- a/drivers/gpu/nvgpu/therm/thrmdev.h
+++ b/drivers/gpu/nvgpu/therm/thrmdev.h
@@ -21,8 +21,8 @@
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  * DEALINGS IN THE SOFTWARE.
  */
-#ifndef _THRMDEV_H_
-#define _THRMDEV_H_
+#ifndef NVGPU_THERM_THRMDEV_H
+#define NVGPU_THERM_THRMDEV_H
 
 #include "boardobj/boardobj.h"
 #include "boardobj/boardobjgrp.h"
@@ -55,4 +55,4 @@ struct therm_device_hbm2_combined {
 
 int therm_device_sw_setup(struct gk20a *g);
 
-#endif
+#endif /* NVGPU_THERM_THRMDEV_H */
diff --git a/drivers/gpu/nvgpu/therm/thrmpmu.h b/drivers/gpu/nvgpu/therm/thrmpmu.h
index 1341a055..42d5caae 100644
--- a/drivers/gpu/nvgpu/therm/thrmpmu.h
+++ b/drivers/gpu/nvgpu/therm/thrmpmu.h
@@ -21,11 +21,11 @@
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  * DEALINGS IN THE SOFTWARE.
  */
-#ifndef _THRMPMU_H_
-#define _THRMPMU_H_
+#ifndef NVGPU_THERM_THRMPMU_H
+#define NVGPU_THERM_THRMPMU_H
 
 int therm_send_pmgr_tables_to_pmu(struct gk20a *g);
 
 u32 therm_configure_therm_alert(struct gk20a *g);
 
-#endif
+#endif /* NVGPU_THERM_THRMPMU_H */
diff --git a/drivers/gpu/nvgpu/volt/volt.h b/drivers/gpu/nvgpu/volt/volt.h
index 482172bf..8b4895f9 100644
--- a/drivers/gpu/nvgpu/volt/volt.h
+++ b/drivers/gpu/nvgpu/volt/volt.h
@@ -1,5 +1,5 @@
 /*
-* Copyright (c) 2016, NVIDIA CORPORATION.  All rights reserved.
+* Copyright (c) 2016-2018, NVIDIA CORPORATION.  All rights reserved.
 *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -20,8 +20,8 @@
  * DEALINGS IN THE SOFTWARE.
 */
 
-#ifndef _VOLT_H_
-#define _VOLT_H_
+#ifndef NVGPU_VOLT_H
+#define NVGPU_VOLT_H
 
 #include "volt_rail.h"
 #include "volt_dev.h"
@@ -36,4 +36,4 @@ struct obj_volt {
         struct voltage_policy_metadata volt_policy_metadata;
 };
 
-#endif /* DRIVERS_GPU_NVGPU_VOLT_VOLT_H_ */
+#endif /* NVGPU_VOLT_H */
diff --git a/drivers/gpu/nvgpu/volt/volt_dev.h b/drivers/gpu/nvgpu/volt/volt_dev.h
index 98f3bce9..eb1868cb 100644
--- a/drivers/gpu/nvgpu/volt/volt_dev.h
+++ b/drivers/gpu/nvgpu/volt/volt_dev.h
@@ -20,9 +20,8 @@
  * DEALINGS IN THE SOFTWARE.
 */
 
-
-#ifndef _VOLTDEV_H_
-#define _VOLTDEV_H_
+#ifndef NVGPU_VOLT_DEV_H
+#define NVGPU_VOLT_DEV_H
 
 #include "boardobj/boardobj.h"
 #include "boardobj/boardobjgrp.h"
@@ -75,4 +74,4 @@ struct voltage_device_pwm_entry {
 u32 volt_dev_sw_setup(struct gk20a *g);
 int volt_dev_pmu_setup(struct gk20a *g);
 
-#endif /* _VOLTDEV_H_ */
+#endif /* NVGPU_VOLT_DEV_H */
diff --git a/drivers/gpu/nvgpu/volt/volt_pmu.h b/drivers/gpu/nvgpu/volt/volt_pmu.h
index fbdf7c1e..c9fb8bfc 100644
--- a/drivers/gpu/nvgpu/volt/volt_pmu.h
+++ b/drivers/gpu/nvgpu/volt/volt_pmu.h
@@ -20,8 +20,8 @@
  * DEALINGS IN THE SOFTWARE.
 */
 
-#ifndef _VOLT_PMU_H_
-#define _VOLT_PMU_H_
+#ifndef NVGPU_VOLT_PMU_H
+#define NVGPU_VOLT_PMU_H
 
 u32 volt_pmu_send_load_cmd_to_pmu(struct gk20a *g);
 u32 volt_set_voltage(struct gk20a *g, u32 logic_voltage_uv,
@@ -43,4 +43,4 @@ u32 nvgpu_volt_rail_get_voltage_gv10x(struct gk20a *g,
 u32 nvgpu_volt_send_load_cmd_to_pmu_gv10x(struct gk20a *g);
 
 
-#endif
+#endif /* NVGPU_VOLT_PMU_H */
diff --git a/drivers/gpu/nvgpu/volt/volt_policy.h b/drivers/gpu/nvgpu/volt/volt_policy.h
index af13e02f..06f5aa3b 100644
--- a/drivers/gpu/nvgpu/volt/volt_policy.h
+++ b/drivers/gpu/nvgpu/volt/volt_policy.h
@@ -20,8 +20,8 @@
  * DEALINGS IN THE SOFTWARE.
 */
 
-#ifndef _VOLT_POLICY_H_
-#define _VOLT_POLICY_H_
+#ifndef NVGPU_VOLT_POLICY_H
+#define NVGPU_VOLT_POLICY_H
 
 #define VOLT_POLICY_INDEX_IS_VALID(pvolt, policy_idx)   \
                 (boardobjgrp_idxisvalid(        \
@@ -77,4 +77,4 @@ struct voltage_policy_single_rail_multi_step {
 
 int volt_policy_sw_setup(struct gk20a *g);
 int volt_policy_pmu_setup(struct gk20a *g);
-#endif
+#endif /* NVGPU_VOLT_POLICY_H */
diff --git a/drivers/gpu/nvgpu/volt/volt_rail.h b/drivers/gpu/nvgpu/volt/volt_rail.h
index 6c667eed..522d635a 100644
--- a/drivers/gpu/nvgpu/volt/volt_rail.h
+++ b/drivers/gpu/nvgpu/volt/volt_rail.h
@@ -21,8 +21,8 @@
 */
 
 
-#ifndef _VOLT_RAIL_H_
-#define _VOLT_RAIL_H_
+#ifndef NVGPU_VOLT_RAIL_H
+#define NVGPU_VOLT_RAIL_H
 
 #include "boardobj/boardobj.h"
 #include "boardobj/boardobjgrp.h"
@@ -87,4 +87,4 @@ u8 volt_rail_volt_domain_convert_to_idx(struct gk20a *g, u8 volt_domain);
 
 int volt_rail_sw_setup(struct gk20a *g);
 int volt_rail_pmu_setup(struct gk20a *g);
-#endif
+#endif /* NVGPU_VOLT_RAIL_H */