Revert "gpu: nvgpu: Reorg fb HAL initialization"

Conflicts with gv100 changes

This reverts commit 63b74d4b768e0c96367d4983fdd8f1db1d317d01.

Change-Id: I5e6a1c93ff613daaa100dee436f4941af74f0ac4
Signed-off-by: Sunny He <suhe@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1537671
Reviewed-by: Shu Zhong <shuz@nvidia.com>
Tested-by: Shu Zhong <shuz@nvidia.com>

9 files changed, 60 insertions, 97 deletions

diff --git a/drivers/gpu/nvgpu/gm20b/fb_gm20b.c b/drivers/gpu/nvgpu/gm20b/fb_gm20b.c
index 31947ad0..47b4313b 100644
--- a/drivers/gpu/nvgpu/gm20b/fb_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/fb_gm20b.c
@@ -25,7 +25,7 @@
 
 #define VPR_INFO_FETCH_WAIT     (5)
 
-void fb_gm20b_init_fs_state(struct gk20a *g)
+static void fb_gm20b_init_fs_state(struct gk20a *g)
 {
         gk20a_dbg_info("initialize gm20b fb");
 
@@ -434,7 +434,7 @@ void gm20b_init_kind_attr(void)
         }
 }
 
-void gm20b_fb_set_mmu_page_size(struct gk20a *g)
+static void gm20b_fb_set_mmu_page_size(struct gk20a *g)
 {
         /* set large page size in fb */
         u32 fb_mmu_ctrl = gk20a_readl(g, fb_mmu_ctrl_r());
@@ -442,7 +442,7 @@ void gm20b_fb_set_mmu_page_size(struct gk20a *g)
         gk20a_writel(g, fb_mmu_ctrl_r(), fb_mmu_ctrl);
 }
 
-bool gm20b_fb_set_use_full_comp_tag_line(struct gk20a *g)
+static bool gm20b_fb_set_use_full_comp_tag_line(struct gk20a *g)
 {
         /* set large page size in fb */
         u32 fb_mmu_ctrl = gk20a_readl(g, fb_mmu_ctrl_r());
@@ -452,17 +452,17 @@ bool gm20b_fb_set_use_full_comp_tag_line(struct gk20a *g)
         return true;
 }
 
-unsigned int gm20b_fb_compression_page_size(struct gk20a *g)
+static unsigned int gm20b_fb_compression_page_size(struct gk20a *g)
 {
         return SZ_128K;
 }
 
-unsigned int gm20b_fb_compressible_page_size(struct gk20a *g)
+static unsigned int gm20b_fb_compressible_page_size(struct gk20a *g)
 {
         return SZ_64K;
 }
 
-void gm20b_fb_dump_vpr_wpr_info(struct gk20a *g)
+static void gm20b_fb_dump_vpr_wpr_info(struct gk20a *g)
 {
         u32 val;
 
@@ -511,7 +511,7 @@ static int gm20b_fb_vpr_info_fetch_wait(struct gk20a *g,
         return -ETIMEDOUT;
 }
 
-int gm20b_fb_vpr_info_fetch(struct gk20a *g)
+static int gm20b_fb_vpr_info_fetch(struct gk20a *g)
 {
         if (gm20b_fb_vpr_info_fetch_wait(g, VPR_INFO_FETCH_WAIT)) {
                 return -ETIME;
@@ -523,14 +523,14 @@ int gm20b_fb_vpr_info_fetch(struct gk20a *g)
         return gm20b_fb_vpr_info_fetch_wait(g, VPR_INFO_FETCH_WAIT);
 }
 
-bool gm20b_fb_debug_mode_enabled(struct gk20a *g)
+static bool gm20b_fb_debug_mode_enabled(struct gk20a *g)
 {
         u32 debug_ctrl = gk20a_readl(g, gr_gpcs_pri_mmu_debug_ctrl_r());
         return gr_gpcs_pri_mmu_debug_ctrl_debug_v(debug_ctrl) ==
                 gr_gpcs_pri_mmu_debug_ctrl_debug_enabled_v();
 }
 
-void gm20b_fb_set_debug_mode(struct gk20a *g, bool enable)
+static void gm20b_fb_set_debug_mode(struct gk20a *g, bool enable)
 {
         u32 reg_val, fb_debug_ctrl, gpc_debug_ctrl;
 
@@ -554,3 +554,21 @@ void gm20b_fb_set_debug_mode(struct gk20a *g, bool enable)
                         gr_gpcs_pri_mmu_debug_ctrl_debug_m(), gpc_debug_ctrl);
         gk20a_writel(g, gr_gpcs_pri_mmu_debug_ctrl_r(), reg_val);
 }
+
+void gm20b_init_fb(struct gpu_ops *gops)
+{
+        gops->fb.reset = fb_gk20a_reset;
+        gops->fb.init_hw = gk20a_fb_init_hw;
+        gops->fb.init_fs_state = fb_gm20b_init_fs_state;
+        gops->fb.set_mmu_page_size = gm20b_fb_set_mmu_page_size;
+        gops->fb.set_use_full_comp_tag_line = gm20b_fb_set_use_full_comp_tag_line;
+        gops->fb.compression_page_size = gm20b_fb_compression_page_size;
+        gops->fb.compressible_page_size = gm20b_fb_compressible_page_size;
+        gops->fb.vpr_info_fetch = gm20b_fb_vpr_info_fetch;
+        gops->fb.dump_vpr_wpr_info = gm20b_fb_dump_vpr_wpr_info;
+        gops->fb.is_debug_mode_enabled = gm20b_fb_debug_mode_enabled;
+        gops->fb.set_debug_mode = gm20b_fb_set_debug_mode;
+        gops->fb.tlb_invalidate = gk20a_fb_tlb_invalidate;
+        gm20b_init_uncompressed_kind_map();
+        gm20b_init_kind_attr();
+}
diff --git a/drivers/gpu/nvgpu/gm20b/fb_gm20b.h b/drivers/gpu/nvgpu/gm20b/fb_gm20b.h
index 42e86407..22b848d6 100644
--- a/drivers/gpu/nvgpu/gm20b/fb_gm20b.h
+++ b/drivers/gpu/nvgpu/gm20b/fb_gm20b.h
@@ -1,7 +1,7 @@
 /*
  * GM20B FB
  *
- * Copyright (c) 2014-2017, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2014, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -17,16 +17,7 @@
 #define _NVHOST_GM20B_FB
 struct gk20a;
 
-void fb_gm20b_init_fs_state(struct gk20a *g);
-void gm20b_fb_set_mmu_page_size(struct gk20a *g);
-bool gm20b_fb_set_use_full_comp_tag_line(struct gk20a *g);
-unsigned int gm20b_fb_compression_page_size(struct gk20a *g);
-unsigned int gm20b_fb_compressible_page_size(struct gk20a *g);
-void gm20b_fb_dump_vpr_wpr_info(struct gk20a *g);
-int gm20b_fb_vpr_info_fetch(struct gk20a *g);
-bool gm20b_fb_debug_mode_enabled(struct gk20a *g);
-void gm20b_fb_set_debug_mode(struct gk20a *g, bool enable);
-
+void gm20b_init_fb(struct gpu_ops *gops);
 void gm20b_init_uncompressed_kind_map(void);
 void gm20b_init_kind_attr(void);
 #endif
diff --git a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
index a540de64..7861e438 100644
--- a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
@@ -16,7 +16,6 @@
 #include "gk20a/gk20a.h"
 #include "gk20a/ce2_gk20a.h"
 #include "gk20a/dbg_gpu_gk20a.h"
-#include "gk20a/fb_gk20a.h"
 #include "gk20a/fifo_gk20a.h"
 #include "gk20a/therm_gk20a.h"
 #include "gk20a/css_gr_gk20a.h"
@@ -162,21 +161,6 @@ static const struct gpu_ops gm20b_ops = {
                 .isr_stall = gk20a_ce2_isr,
                 .isr_nonstall = gk20a_ce2_nonstall_isr,
         },
-        .fb = {
-                .reset = fb_gk20a_reset,
-                .init_hw = gk20a_fb_init_hw,
-                .init_fs_state = fb_gm20b_init_fs_state,
-                .set_mmu_page_size = gm20b_fb_set_mmu_page_size,
-                .set_use_full_comp_tag_line =
-                        gm20b_fb_set_use_full_comp_tag_line,
-                .compression_page_size = gm20b_fb_compression_page_size,
-                .compressible_page_size = gm20b_fb_compressible_page_size,
-                .vpr_info_fetch = gm20b_fb_vpr_info_fetch,
-                .dump_vpr_wpr_info = gm20b_fb_dump_vpr_wpr_info,
-                .is_debug_mode_enabled = gm20b_fb_debug_mode_enabled,
-                .set_debug_mode = gm20b_fb_set_debug_mode,
-                .tlb_invalidate = gk20a_fb_tlb_invalidate,
-        },
         .clock_gating = {
                 .slcg_bus_load_gating_prod =
                         gm20b_slcg_bus_load_gating_prod,
@@ -394,7 +378,6 @@ int gm20b_init_hal(struct gk20a *g)
 
         gops->ltc = gm20b_ops.ltc;
         gops->ce2 = gm20b_ops.ce2;
-        gops->fb = gm20b_ops.fb;
         gops->clock_gating = gm20b_ops.clock_gating;
         gops->fifo = gm20b_ops.fifo;
         gops->gr_ctx = gm20b_ops.gr_ctx;
@@ -462,12 +445,10 @@ int gm20b_init_hal(struct gk20a *g)
 #endif
         g->bootstrap_owner = LSF_BOOTSTRAP_OWNER_DEFAULT;
         gm20b_init_gr(g);
+        gm20b_init_fb(gops);
         gm20b_init_mm(gops);
         gm20b_init_pmu_ops(g);
 
-        gm20b_init_uncompressed_kind_map();
-        gm20b_init_kind_attr();
-
         g->name = "gm20b";
 
         c->twod_class = FERMI_TWOD_A;
diff --git a/drivers/gpu/nvgpu/gp106/fb_gp106.c b/drivers/gpu/nvgpu/gp106/fb_gp106.c
index 25055e79..5be7062d 100644
--- a/drivers/gpu/nvgpu/gp106/fb_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/fb_gp106.c
@@ -21,7 +21,7 @@
 #define HW_SCRUB_TIMEOUT_DEFAULT        100 /* usec */
 #define HW_SCRUB_TIMEOUT_MAX            2000000 /* usec */
 
-void gp106_fb_reset(struct gk20a *g)
+static void gp106_fb_reset(struct gk20a *g)
 {
         u32 val;
 
@@ -40,3 +40,11 @@ void gp106_fb_reset(struct gk20a *g)
         val &= ~fb_mmu_priv_level_mask_write_violation_m();
         gk20a_writel(g, fb_mmu_priv_level_mask_r(), val);
 }
+
+void gp106_init_fb(struct gpu_ops *gops)
+{
+        gp10b_init_fb(gops);
+
+        gops->fb.init_fs_state = NULL;
+        gops->fb.reset = gp106_fb_reset;
+}
diff --git a/drivers/gpu/nvgpu/gp106/fb_gp106.h b/drivers/gpu/nvgpu/gp106/fb_gp106.h
index 99a70d7b..87b371e1 100644
--- a/drivers/gpu/nvgpu/gp106/fb_gp106.h
+++ b/drivers/gpu/nvgpu/gp106/fb_gp106.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2016-2017, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2016, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -15,5 +15,5 @@
 #define FB_GP106_H
 struct gpu_ops;
 
-void gp106_fb_reset(struct gk20a *g);
+void gp106_init_fb(struct gpu_ops *gops);
 #endif
diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c
index 361a7b0f..4a891a82 100644
--- a/drivers/gpu/nvgpu/gp106/hal_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c
@@ -24,7 +24,6 @@
 #include "gk20a/flcn_gk20a.h"
 #include "gk20a/regops_gk20a.h"
 #include "gk20a/mc_gk20a.h"
-#include "gk20a/fb_gk20a.h"
 
 #include "gp10b/ltc_gp10b.h"
 #include "gp10b/gr_gp10b.h"
@@ -36,7 +35,6 @@
 #include "gp10b/cde_gp10b.h"
 #include "gp10b/priv_ring_gp10b.h"
 #include "gp10b/fifo_gp10b.h"
-#include "gp10b/fb_gp10b.h"
 
 #include "gp106/fifo_gp106.h"
 #include "gp106/regops_gp106.h"
@@ -45,7 +43,6 @@
 #include "gm20b/gr_gm20b.h"
 #include "gm20b/fifo_gm20b.h"
 #include "gm20b/pmu_gm20b.h"
-#include "gm20b/fb_gm20b.h"
 
 #include "gp106/clk_gp106.h"
 #include "gp106/clk_arb_gp106.h"
@@ -213,21 +210,6 @@ static const struct gpu_ops gp106_ops = {
                 .isr_stall = gp10b_ce_isr,
                 .isr_nonstall = gp10b_ce_nonstall_isr,
         },
-        .fb = {
-                .reset = gp106_fb_reset,
-                .init_hw = gk20a_fb_init_hw,
-                .init_fs_state = NULL,
-                .set_mmu_page_size = gm20b_fb_set_mmu_page_size,
-                .set_use_full_comp_tag_line =
-                        gm20b_fb_set_use_full_comp_tag_line,
-                .compression_page_size = gp10b_fb_compression_page_size,
-                .compressible_page_size = gp10b_fb_compressible_page_size,
-                .vpr_info_fetch = gm20b_fb_vpr_info_fetch,
-                .dump_vpr_wpr_info = gm20b_fb_dump_vpr_wpr_info,
-                .is_debug_mode_enabled = gm20b_fb_debug_mode_enabled,
-                .set_debug_mode = gm20b_fb_set_debug_mode,
-                .tlb_invalidate = gk20a_fb_tlb_invalidate,
-        },
         .clock_gating = {
                 .slcg_bus_load_gating_prod =
                         gp106_slcg_bus_load_gating_prod,
@@ -497,7 +479,6 @@ int gp106_init_hal(struct gk20a *g)
 
         gops->ltc = gp106_ops.ltc;
         gops->ce2 = gp106_ops.ce2;
-        gops->fb = gp106_ops.fb;
         gops->clock_gating = gp106_ops.clock_gating;
         gops->fifo = gp106_ops.fifo;
         gops->gr_ctx = gp106_ops.gr_ctx;
@@ -543,12 +524,10 @@ int gp106_init_hal(struct gk20a *g)
 
         g->bootstrap_owner = LSF_FALCON_ID_SEC2;
         gp106_init_gr(g);
+        gp106_init_fb(gops);
         gp106_init_mm(gops);
         gp106_init_pmu_ops(g);
 
-        gp10b_init_uncompressed_kind_map();
-        gp10b_init_kind_attr();
-
         g->name = "gp10x";
 
         c->twod_class = FERMI_TWOD_A;
diff --git a/drivers/gpu/nvgpu/gp10b/fb_gp10b.c b/drivers/gpu/nvgpu/gp10b/fb_gp10b.c
index 775dc5c9..8ba9ff8e 100644
--- a/drivers/gpu/nvgpu/gp10b/fb_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/fb_gp10b.c
@@ -20,7 +20,7 @@
 
 #include <nvgpu/hw/gp10b/hw_gmmu_gp10b.h>
 
-noinline_for_stack void gp10b_init_uncompressed_kind_map(void)
+static noinline_for_stack void gp10b_init_uncompressed_kind_map(void)
 {
         int i;
 
@@ -438,7 +438,7 @@ static noinline_for_stack bool gp10b_kind_zbc(u8 k)
                         k <= gmmu_pte_kind_c128_ms8_ms16_2cr_v());
 }
 
-void gp10b_init_kind_attr(void)
+static void gp10b_init_kind_attr(void)
 {
         u16 k;
 
@@ -456,12 +456,22 @@ void gp10b_init_kind_attr(void)
         }
 }
 
-unsigned int gp10b_fb_compression_page_size(struct gk20a *g)
+static unsigned int gp10b_fb_compression_page_size(struct gk20a *g)
 {
         return SZ_64K;
 }
 
-unsigned int gp10b_fb_compressible_page_size(struct gk20a *g)
+static unsigned int gp10b_fb_compressible_page_size(struct gk20a *g)
 {
         return SZ_4K;
 }
+
+void gp10b_init_fb(struct gpu_ops *gops)
+{
+        gm20b_init_fb(gops);
+        gops->fb.compression_page_size = gp10b_fb_compression_page_size;
+        gops->fb.compressible_page_size = gp10b_fb_compressible_page_size;
+
+        gp10b_init_uncompressed_kind_map();
+        gp10b_init_kind_attr();
+}
diff --git a/drivers/gpu/nvgpu/gp10b/fb_gp10b.h b/drivers/gpu/nvgpu/gp10b/fb_gp10b.h
index 626cf54d..76efd331 100644
--- a/drivers/gpu/nvgpu/gp10b/fb_gp10b.h
+++ b/drivers/gpu/nvgpu/gp10b/fb_gp10b.h
@@ -1,7 +1,7 @@
 /*
  * GP10B FB
  *
- * Copyright (c) 2014-2017, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2014, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -15,11 +15,7 @@
 
 #ifndef _NVGPU_GP10B_FB
 #define _NVGPU_GP10B_FB
-struct gk20a;
-
-noinline_for_stack void gp10b_init_uncompressed_kind_map(void);
-void gp10b_init_kind_attr(void);
-unsigned int gp10b_fb_compression_page_size(struct gk20a *g);
-unsigned int gp10b_fb_compressible_page_size(struct gk20a *g);
+struct gpu_ops;
 
+void gp10b_init_fb(struct gpu_ops *gops);
 #endif
diff --git a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
index b0871155..197c4fad 100644
--- a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
@@ -24,7 +24,6 @@
 #include "gk20a/flcn_gk20a.h"
 #include "gk20a/regops_gk20a.h"
 #include "gk20a/mc_gk20a.h"
-#include "gk20a/fb_gk20a.h"
 
 #include "gp10b/gr_gp10b.h"
 #include "gp10b/fecs_trace_gp10b.h"
@@ -48,7 +47,6 @@
 #include "gm20b/pmu_gm20b.h"
 #include "gm20b/clk_gm20b.h"
 #include "gm20b/fifo_gm20b.h"
-#include "gm20b/fb_gm20b.h"
 
 #include "gp10b.h"
 #include "hal_gp10b.h"
@@ -172,21 +170,6 @@ static const struct gpu_ops gp10b_ops = {
                 .isr_stall = gp10b_ce_isr,
                 .isr_nonstall = gp10b_ce_nonstall_isr,
         },
-        .fb = {
-                .reset = fb_gk20a_reset,
-                .init_hw = gk20a_fb_init_hw,
-                .init_fs_state = fb_gm20b_init_fs_state,
-                .set_mmu_page_size = gm20b_fb_set_mmu_page_size,
-                .set_use_full_comp_tag_line =
-                        gm20b_fb_set_use_full_comp_tag_line,
-                .compression_page_size = gp10b_fb_compression_page_size,
-                .compressible_page_size = gp10b_fb_compressible_page_size,
-                .vpr_info_fetch = gm20b_fb_vpr_info_fetch,
-                .dump_vpr_wpr_info = gm20b_fb_dump_vpr_wpr_info,
-                .is_debug_mode_enabled = gm20b_fb_debug_mode_enabled,
-                .set_debug_mode = gm20b_fb_set_debug_mode,
-                .tlb_invalidate = gk20a_fb_tlb_invalidate,
-        },
         .clock_gating = {
                 .slcg_bus_load_gating_prod =
                         gp10b_slcg_bus_load_gating_prod,
@@ -422,7 +405,6 @@ int gp10b_init_hal(struct gk20a *g)
 
         gops->ltc = gp10b_ops.ltc;
         gops->ce2 = gp10b_ops.ce2;
-        gops->fb = gp10b_ops.fb;
         gops->clock_gating = gp10b_ops.clock_gating;
         gops->fifo = gp10b_ops.fifo;
         gops->gr_ctx = gp10b_ops.gr_ctx;
@@ -489,12 +471,10 @@ int gp10b_init_hal(struct gk20a *g)
 
         g->bootstrap_owner = LSF_BOOTSTRAP_OWNER_DEFAULT;
         gp10b_init_gr(g);
+        gp10b_init_fb(gops);
         gp10b_init_mm(gops);
         gp10b_init_pmu_ops(g);
 
-        gp10b_init_uncompressed_kind_map();
-        gp10b_init_kind_attr();
-
         g->name = "gp10b";
 
         c->twod_class = FERMI_TWOD_A;