diff options
author | Sunny He <suhe@nvidia.com> | 2017-07-24 15:19:53 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-07-26 05:45:15 -0400 |
commit | 2b98e1308d49b9c941d8fa6fc87f67108d6d9370 (patch) | |
tree | 2f98fefd5068e05a04b11e6957fa7d165bbd22ac | |
parent | a5d6970df79ab712a7db76e7a02bceaa590ae1d9 (diff) |
gpu: nvgpu: gv11b: Remove privsecurity from gpu_ops
Replace privsecurity boolean flag in gpu_ops with entry in
common flag system.
The new common flag is NVGPU_SEC_PRIVSECURITY
Jira NVGPU-74
Change-Id: I4c11e3a89a76abe137cf61b69ad0fbcd665554b7
Signed-off-by: Sunny He <suhe@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1525714
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/gr_gv11b.c | 9 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/gr_gv11b.h | 4 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/hal_gv11b.c | 6 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/pmu_gv11b.c | 7 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/pmu_gv11b.h | 6 |
5 files changed, 20 insertions, 12 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c index 3450bf05..1ba0c523 100644 --- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c | |||
@@ -25,6 +25,7 @@ | |||
25 | #include <nvgpu/dma.h> | 25 | #include <nvgpu/dma.h> |
26 | #include <nvgpu/log.h> | 26 | #include <nvgpu/log.h> |
27 | #include <nvgpu/debug.h> | 27 | #include <nvgpu/debug.h> |
28 | #include <nvgpu/enabled.h> | ||
28 | 29 | ||
29 | #include "gk20a/gk20a.h" | 30 | #include "gk20a/gk20a.h" |
30 | #include "gk20a/gr_gk20a.h" | 31 | #include "gk20a/gr_gk20a.h" |
@@ -3574,7 +3575,7 @@ static void gr_gv11b_init_gpc_mmu(struct gk20a *g) | |||
3574 | 3575 | ||
3575 | nvgpu_log_info(g, "initialize gpc mmu"); | 3576 | nvgpu_log_info(g, "initialize gpc mmu"); |
3576 | 3577 | ||
3577 | if (!g->ops.privsecurity) { | 3578 | if (!nvgpu_is_enabled(g, NVGPU_SEC_PRIVSECURITY)) { |
3578 | /* Bypass MMU check for non-secure boot. For | 3579 | /* Bypass MMU check for non-secure boot. For |
3579 | * secure-boot,this register write has no-effect */ | 3580 | * secure-boot,this register write has no-effect */ |
3580 | gk20a_writel(g, fb_priv_mmu_phy_secure_r(), 0xffffffff); | 3581 | gk20a_writel(g, fb_priv_mmu_phy_secure_r(), 0xffffffff); |
@@ -3601,9 +3602,11 @@ static void gr_gv11b_init_gpc_mmu(struct gk20a *g) | |||
3601 | gk20a_readl(g, fb_mmu_debug_rd_r())); | 3602 | gk20a_readl(g, fb_mmu_debug_rd_r())); |
3602 | } | 3603 | } |
3603 | 3604 | ||
3604 | void gv11b_init_gr(struct gpu_ops *gops) | 3605 | void gv11b_init_gr(struct gk20a *g) |
3605 | { | 3606 | { |
3606 | gp10b_init_gr(gops); | 3607 | struct gpu_ops *gops = &g->ops; |
3608 | |||
3609 | gp10b_init_gr(g); | ||
3607 | gops->gr.init_preemption_state = NULL; | 3610 | gops->gr.init_preemption_state = NULL; |
3608 | gops->gr.init_fs_state = gr_gv11b_init_fs_state; | 3611 | gops->gr.init_fs_state = gr_gv11b_init_fs_state; |
3609 | gops->gr.detect_sm_arch = gr_gv11b_detect_sm_arch; | 3612 | gops->gr.detect_sm_arch = gr_gv11b_detect_sm_arch; |
diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.h b/drivers/gpu/nvgpu/gv11b/gr_gv11b.h index 0793dae5..69148554 100644 --- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.h +++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.h | |||
@@ -29,7 +29,7 @@ struct zbc_s_table { | |||
29 | u32 ref_cnt; | 29 | u32 ref_cnt; |
30 | }; | 30 | }; |
31 | 31 | ||
32 | struct gpu_ops; | 32 | struct gk20a; |
33 | 33 | ||
34 | enum { | 34 | enum { |
35 | VOLTA_CHANNEL_GPFIFO_A = 0xC36F, | 35 | VOLTA_CHANNEL_GPFIFO_A = 0xC36F, |
@@ -59,7 +59,7 @@ enum { | |||
59 | 59 | ||
60 | #define NVA297_SET_SHADER_EXCEPTIONS_ENABLE_FALSE 0 | 60 | #define NVA297_SET_SHADER_EXCEPTIONS_ENABLE_FALSE 0 |
61 | 61 | ||
62 | void gv11b_init_gr(struct gpu_ops *ops); | 62 | void gv11b_init_gr(struct gk20a *g); |
63 | int gr_gv11b_alloc_buffer(struct vm_gk20a *vm, size_t size, | 63 | int gr_gv11b_alloc_buffer(struct vm_gk20a *vm, size_t size, |
64 | struct nvgpu_mem *mem); | 64 | struct nvgpu_mem *mem); |
65 | /*zcull*/ | 65 | /*zcull*/ |
diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c index 2c20bd04..3ebeb205 100644 --- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c | |||
@@ -358,16 +358,16 @@ int gv11b_init_hal(struct gk20a *g) | |||
358 | gops->get_litter_value = gv11b_ops.get_litter_value; | 358 | gops->get_litter_value = gv11b_ops.get_litter_value; |
359 | 359 | ||
360 | /* boot in non-secure modes for time beeing */ | 360 | /* boot in non-secure modes for time beeing */ |
361 | gops->privsecurity = 0; | 361 | __nvgpu_set_enabled(g, NVGPU_SEC_PRIVSECURITY, false); |
362 | __nvgpu_set_enabled(g, NVGPU_SEC_SECUREGPCCS, false); | 362 | __nvgpu_set_enabled(g, NVGPU_SEC_SECUREGPCCS, false); |
363 | 363 | ||
364 | gv11b_init_gr(gops); | 364 | gv11b_init_gr(g); |
365 | gv11b_init_fecs_trace_ops(gops); | 365 | gv11b_init_fecs_trace_ops(gops); |
366 | gv11b_init_fb(gops); | 366 | gv11b_init_fb(gops); |
367 | gv11b_init_ce(gops); | 367 | gv11b_init_ce(gops); |
368 | gv11b_init_gr_ctx(gops); | 368 | gv11b_init_gr_ctx(gops); |
369 | gv11b_init_mm(gops); | 369 | gv11b_init_mm(gops); |
370 | gv11b_init_pmu_ops(gops); | 370 | gv11b_init_pmu_ops(g); |
371 | gv11b_init_regops(gops); | 371 | gv11b_init_regops(gops); |
372 | gv11b_init_therm_ops(gops); | 372 | gv11b_init_therm_ops(gops); |
373 | 373 | ||
diff --git a/drivers/gpu/nvgpu/gv11b/pmu_gv11b.c b/drivers/gpu/nvgpu/gv11b/pmu_gv11b.c index d20b9c1a..35719dff 100644 --- a/drivers/gpu/nvgpu/gv11b/pmu_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/pmu_gv11b.c | |||
@@ -20,6 +20,7 @@ | |||
20 | 20 | ||
21 | #include <nvgpu/pmu.h> | 21 | #include <nvgpu/pmu.h> |
22 | #include <nvgpu/falcon.h> | 22 | #include <nvgpu/falcon.h> |
23 | #include <nvgpu/enabled.h> | ||
23 | 24 | ||
24 | #include "gk20a/gk20a.h" | 25 | #include "gk20a/gk20a.h" |
25 | 26 | ||
@@ -234,9 +235,11 @@ static int gv11b_pg_set_subfeature_mask(struct gk20a *g, u32 pg_engine_id) | |||
234 | return 0; | 235 | return 0; |
235 | } | 236 | } |
236 | 237 | ||
237 | void gv11b_init_pmu_ops(struct gpu_ops *gops) | 238 | void gv11b_init_pmu_ops(struct gk20a *g) |
238 | { | 239 | { |
239 | gp10b_init_pmu_ops(gops); | 240 | struct gpu_ops *gops = &g->ops; |
241 | |||
242 | gp10b_init_pmu_ops(g); | ||
240 | gops->pmu.pmu_nsbootstrap = gv11b_pmu_bootstrap; | 243 | gops->pmu.pmu_nsbootstrap = gv11b_pmu_bootstrap; |
241 | gops->pmu.is_pmu_supported = gv11b_is_pmu_supported; | 244 | gops->pmu.is_pmu_supported = gv11b_is_pmu_supported; |
242 | gops->pmu.reset_engine = gp106_pmu_engine_reset; | 245 | gops->pmu.reset_engine = gp106_pmu_engine_reset; |
diff --git a/drivers/gpu/nvgpu/gv11b/pmu_gv11b.h b/drivers/gpu/nvgpu/gv11b/pmu_gv11b.h index c99923e7..ce10c4cb 100644 --- a/drivers/gpu/nvgpu/gv11b/pmu_gv11b.h +++ b/drivers/gpu/nvgpu/gv11b/pmu_gv11b.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * GV11B PMU | 2 | * GV11B PMU |
3 | * | 3 | * |
4 | * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify it | 6 | * This program is free software; you can redistribute it and/or modify it |
7 | * under the terms and conditions of the GNU General Public License, | 7 | * under the terms and conditions of the GNU General Public License, |
@@ -16,6 +16,8 @@ | |||
16 | #ifndef __PMU_GV11B_H_ | 16 | #ifndef __PMU_GV11B_H_ |
17 | #define __PMU_GV11B_H_ | 17 | #define __PMU_GV11B_H_ |
18 | 18 | ||
19 | void gv11b_init_pmu_ops(struct gpu_ops *gops); | 19 | struct gk20a; |
20 | |||
21 | void gv11b_init_pmu_ops(struct gk20a *g); | ||
20 | 22 | ||
21 | #endif /*__PMU_GV11B_H_*/ | 23 | #endif /*__PMU_GV11B_H_*/ |