diff options
author | Richard Zhao <rizhao@nvidia.com> | 2017-04-10 18:29:36 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-06-30 01:34:36 -0400 |
commit | 28093a374bef54b9b68fcb2f00ae7d0529e33a3f (patch) | |
tree | 208c7080f683a0231d5e3ebdf15b2740872e80ce | |
parent | ac292605b5d2c4c27c7d133601594b9692a32fed (diff) |
gpu: nvgpu: vgpu: add t19x support
- add commit_inst hal ops
- add t19x cmds to cmd big union
- add t19x vgpu driver and call t19x hal init
- get guest channel_base to calculate hw channel id
Jira VFND-3796
Change-Id: Ic2431233fd174afc2c84c4794e20552e6e88b1dc
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: https://git-master/r/1474715
GVS: Gerrit_Virtual_Submit
Reviewed-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
-rw-r--r-- | drivers/gpu/nvgpu/common/linux/module.c | 7 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/vgpu/fifo_vgpu.c | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/vgpu/gr_vgpu.c | 7 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/vgpu/gr_vgpu.h | 19 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/vgpu/vgpu.c | 28 | ||||
-rw-r--r-- | include/linux/tegra_vgpu.h | 8 |
6 files changed, 62 insertions, 9 deletions
diff --git a/drivers/gpu/nvgpu/common/linux/module.c b/drivers/gpu/nvgpu/common/linux/module.c index c6794e44..30a2fcd9 100644 --- a/drivers/gpu/nvgpu/common/linux/module.c +++ b/drivers/gpu/nvgpu/common/linux/module.c | |||
@@ -41,6 +41,9 @@ | |||
41 | #include "intr.h" | 41 | #include "intr.h" |
42 | #ifdef CONFIG_TEGRA_19x_GPU | 42 | #ifdef CONFIG_TEGRA_19x_GPU |
43 | #include "nvgpu_gpuid_t19x.h" | 43 | #include "nvgpu_gpuid_t19x.h" |
44 | #ifdef CONFIG_TEGRA_GR_VIRTUALIZATION | ||
45 | #include "vgpu/vgpu_t19x.h" | ||
46 | #endif | ||
44 | #endif | 47 | #endif |
45 | #include "os_linux.h" | 48 | #include "os_linux.h" |
46 | 49 | ||
@@ -242,6 +245,10 @@ static struct of_device_id tegra_gk20a_of_match[] = { | |||
242 | #ifdef CONFIG_TEGRA_19x_GPU | 245 | #ifdef CONFIG_TEGRA_19x_GPU |
243 | { .compatible = TEGRA_19x_GPU_COMPAT_TEGRA, | 246 | { .compatible = TEGRA_19x_GPU_COMPAT_TEGRA, |
244 | .data = &t19x_gpu_tegra_platform }, | 247 | .data = &t19x_gpu_tegra_platform }, |
248 | #ifdef CONFIG_TEGRA_GR_VIRTUALIZATION | ||
249 | { .compatible = TEGRA_19x_VGPU_COMPAT_TEGRA, | ||
250 | .data = &t19x_vgpu_tegra_platform }, | ||
251 | #endif | ||
245 | #endif | 252 | #endif |
246 | #ifdef CONFIG_TEGRA_GR_VIRTUALIZATION | 253 | #ifdef CONFIG_TEGRA_GR_VIRTUALIZATION |
247 | { .compatible = "nvidia,tegra124-gk20a-vgpu", | 254 | { .compatible = "nvidia,tegra124-gk20a-vgpu", |
diff --git a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c index 7029498d..520771a7 100644 --- a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c | |||
@@ -325,6 +325,8 @@ static int vgpu_init_fifo_setup_sw(struct gk20a *g) | |||
325 | f->deferred_reset_pending = false; | 325 | f->deferred_reset_pending = false; |
326 | nvgpu_mutex_init(&f->deferred_reset_mutex); | 326 | nvgpu_mutex_init(&f->deferred_reset_mutex); |
327 | 327 | ||
328 | f->channel_base = priv->constants.channel_base; | ||
329 | |||
328 | f->sw_ready = true; | 330 | f->sw_ready = true; |
329 | 331 | ||
330 | gk20a_dbg_fn("done"); | 332 | gk20a_dbg_fn("done"); |
diff --git a/drivers/gpu/nvgpu/vgpu/gr_vgpu.c b/drivers/gpu/nvgpu/vgpu/gr_vgpu.c index a001b54e..e3dfb874 100644 --- a/drivers/gpu/nvgpu/vgpu/gr_vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/gr_vgpu.c | |||
@@ -35,7 +35,7 @@ static void vgpu_gr_detect_sm_arch(struct gk20a *g) | |||
35 | priv->constants.sm_arch_warp_count; | 35 | priv->constants.sm_arch_warp_count; |
36 | } | 36 | } |
37 | 37 | ||
38 | static int vgpu_gr_commit_inst(struct channel_gk20a *c, u64 gpu_va) | 38 | int vgpu_gr_commit_inst(struct channel_gk20a *c, u64 gpu_va) |
39 | { | 39 | { |
40 | struct tegra_vgpu_cmd_msg msg; | 40 | struct tegra_vgpu_cmd_msg msg; |
41 | struct tegra_vgpu_ch_ctx_params *p = &msg.params.ch_ctx; | 41 | struct tegra_vgpu_ch_ctx_params *p = &msg.params.ch_ctx; |
@@ -422,6 +422,8 @@ static void vgpu_gr_free_channel_ctx(struct channel_gk20a *c) | |||
422 | { | 422 | { |
423 | gk20a_dbg_fn(""); | 423 | gk20a_dbg_fn(""); |
424 | 424 | ||
425 | if (c->g->ops.fifo.free_channel_ctx_header) | ||
426 | c->g->ops.fifo.free_channel_ctx_header(c); | ||
425 | vgpu_gr_unmap_global_ctx_buffers(c); | 427 | vgpu_gr_unmap_global_ctx_buffers(c); |
426 | vgpu_gr_free_channel_patch_ctx(c); | 428 | vgpu_gr_free_channel_patch_ctx(c); |
427 | vgpu_gr_free_channel_pm_ctx(c); | 429 | vgpu_gr_free_channel_pm_ctx(c); |
@@ -551,7 +553,7 @@ static int vgpu_gr_alloc_obj_ctx(struct channel_gk20a *c, | |||
551 | } | 553 | } |
552 | 554 | ||
553 | /* commit gr ctx buffer */ | 555 | /* commit gr ctx buffer */ |
554 | err = vgpu_gr_commit_inst(c, ch_ctx->gr_ctx->mem.gpu_va); | 556 | err = g->ops.gr.commit_inst(c, ch_ctx->gr_ctx->mem.gpu_va); |
555 | if (err) { | 557 | if (err) { |
556 | nvgpu_err(g, "fail to commit gr ctx buffer"); | 558 | nvgpu_err(g, "fail to commit gr ctx buffer"); |
557 | goto out; | 559 | goto out; |
@@ -1227,6 +1229,7 @@ void vgpu_init_gr_ops(struct gpu_ops *gops) | |||
1227 | gops->gr.clear_sm_error_state = vgpu_gr_clear_sm_error_state; | 1229 | gops->gr.clear_sm_error_state = vgpu_gr_clear_sm_error_state; |
1228 | gops->gr.suspend_contexts = vgpu_gr_suspend_contexts; | 1230 | gops->gr.suspend_contexts = vgpu_gr_suspend_contexts; |
1229 | gops->gr.resume_contexts = vgpu_gr_resume_contexts; | 1231 | gops->gr.resume_contexts = vgpu_gr_resume_contexts; |
1232 | gops->gr.commit_inst = vgpu_gr_commit_inst; | ||
1230 | gops->gr.dump_gr_regs = NULL; | 1233 | gops->gr.dump_gr_regs = NULL; |
1231 | gops->gr.set_boosted_ctx = NULL; | 1234 | gops->gr.set_boosted_ctx = NULL; |
1232 | gops->gr.update_boosted_ctx = NULL; | 1235 | gops->gr.update_boosted_ctx = NULL; |
diff --git a/drivers/gpu/nvgpu/vgpu/gr_vgpu.h b/drivers/gpu/nvgpu/vgpu/gr_vgpu.h new file mode 100644 index 00000000..fcce58a4 --- /dev/null +++ b/drivers/gpu/nvgpu/vgpu/gr_vgpu.h | |||
@@ -0,0 +1,19 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify it | ||
5 | * under the terms and conditions of the GNU General Public License, | ||
6 | * version 2, as published by the Free Software Foundation. | ||
7 | * | ||
8 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
11 | * more details. | ||
12 | */ | ||
13 | |||
14 | #ifndef _GR_VGPU_H_ | ||
15 | #define _GR_VGPU_H_ | ||
16 | |||
17 | int vgpu_gr_commit_inst(struct channel_gk20a *c, u64 gpu_va); | ||
18 | |||
19 | #endif | ||
diff --git a/drivers/gpu/nvgpu/vgpu/vgpu.c b/drivers/gpu/nvgpu/vgpu/vgpu.c index d94543a8..c4647e29 100644 --- a/drivers/gpu/nvgpu/vgpu/vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/vgpu.c | |||
@@ -24,6 +24,7 @@ | |||
24 | #include <nvgpu/enabled.h> | 24 | #include <nvgpu/enabled.h> |
25 | #include <nvgpu/debug.h> | 25 | #include <nvgpu/debug.h> |
26 | #include <nvgpu/bus.h> | 26 | #include <nvgpu/bus.h> |
27 | #include <nvgpu/soc.h> | ||
27 | 28 | ||
28 | #include "vgpu/vgpu.h" | 29 | #include "vgpu/vgpu.h" |
29 | #include "vgpu/fecs_trace_vgpu.h" | 30 | #include "vgpu/fecs_trace_vgpu.h" |
@@ -38,6 +39,11 @@ | |||
38 | #include "common/linux/module.h" | 39 | #include "common/linux/module.h" |
39 | #include "common/linux/os_linux.h" | 40 | #include "common/linux/os_linux.h" |
40 | 41 | ||
42 | #ifdef CONFIG_TEGRA_19x_GPU | ||
43 | #include <vgpu/vgpu_t19x.h> | ||
44 | #include <nvgpu_gpuid_t19x.h> | ||
45 | #endif | ||
46 | |||
41 | #include <nvgpu/hw/gk20a/hw_mc_gk20a.h> | 47 | #include <nvgpu/hw/gk20a/hw_mc_gk20a.h> |
42 | 48 | ||
43 | static inline int vgpu_comm_init(struct platform_device *pdev) | 49 | static inline int vgpu_comm_init(struct platform_device *pdev) |
@@ -268,14 +274,14 @@ static int vgpu_init_support(struct platform_device *pdev) | |||
268 | goto fail; | 274 | goto fail; |
269 | } | 275 | } |
270 | 276 | ||
271 | regs = devm_ioremap_resource(&pdev->dev, r); | ||
272 | if (IS_ERR(regs)) { | ||
273 | dev_err(dev_from_gk20a(g), "failed to remap gk20a regs\n"); | ||
274 | err = PTR_ERR(g->bar1); | ||
275 | goto fail; | ||
276 | } | ||
277 | |||
278 | if (r->name && !strcmp(r->name, "/vgpu")) { | 277 | if (r->name && !strcmp(r->name, "/vgpu")) { |
278 | regs = devm_ioremap_resource(&pdev->dev, r); | ||
279 | if (IS_ERR(regs)) { | ||
280 | dev_err(dev_from_gk20a(g), | ||
281 | "failed to remap gk20a regs\n"); | ||
282 | err = PTR_ERR(regs); | ||
283 | goto fail; | ||
284 | } | ||
279 | g->bar1 = regs; | 285 | g->bar1 = regs; |
280 | g->bar1_mem = r; | 286 | g->bar1_mem = r; |
281 | } | 287 | } |
@@ -458,6 +464,11 @@ static int vgpu_init_hal(struct gk20a *g) | |||
458 | gk20a_dbg_info("gp10b detected"); | 464 | gk20a_dbg_info("gp10b detected"); |
459 | err = vgpu_gp10b_init_hal(g); | 465 | err = vgpu_gp10b_init_hal(g); |
460 | break; | 466 | break; |
467 | #ifdef CONFIG_TEGRA_19x_GPU | ||
468 | case TEGRA_19x_GPUID: | ||
469 | err = vgpu_t19x_init_hal(g); | ||
470 | break; | ||
471 | #endif | ||
461 | default: | 472 | default: |
462 | nvgpu_err(g, "no support for %x", ver); | 473 | nvgpu_err(g, "no support for %x", ver); |
463 | err = -ENODEV; | 474 | err = -ENODEV; |
@@ -581,6 +592,9 @@ static int vgpu_pm_init(struct device *dev) | |||
581 | 592 | ||
582 | gk20a_dbg_fn(""); | 593 | gk20a_dbg_fn(""); |
583 | 594 | ||
595 | if (nvgpu_platform_is_simulation(g)) | ||
596 | return 0; | ||
597 | |||
584 | __pm_runtime_disable(dev, false); | 598 | __pm_runtime_disable(dev, false); |
585 | 599 | ||
586 | if (IS_ENABLED(CONFIG_GK20A_DEVFREQ)) | 600 | if (IS_ENABLED(CONFIG_GK20A_DEVFREQ)) |
diff --git a/include/linux/tegra_vgpu.h b/include/linux/tegra_vgpu.h index eb510438..3f73d357 100644 --- a/include/linux/tegra_vgpu.h +++ b/include/linux/tegra_vgpu.h | |||
@@ -21,6 +21,10 @@ | |||
21 | 21 | ||
22 | #include <nvgpu/types.h> | 22 | #include <nvgpu/types.h> |
23 | 23 | ||
24 | #ifdef CONFIG_TEGRA_19x_GPU | ||
25 | #include <linux/tegra_vgpu_t19x.h> | ||
26 | #endif | ||
27 | |||
24 | enum { | 28 | enum { |
25 | TEGRA_VGPU_MODULE_GPU = 0, | 29 | TEGRA_VGPU_MODULE_GPU = 0, |
26 | }; | 30 | }; |
@@ -454,6 +458,7 @@ struct tegra_vgpu_constants_params { | |||
454 | u8 force_preempt_mode; | 458 | u8 force_preempt_mode; |
455 | u32 default_timeslice_us; | 459 | u32 default_timeslice_us; |
456 | u32 preempt_ctx_size; | 460 | u32 preempt_ctx_size; |
461 | u32 channel_base; | ||
457 | }; | 462 | }; |
458 | 463 | ||
459 | struct tegra_vgpu_channel_cyclestats_snapshot_params { | 464 | struct tegra_vgpu_channel_cyclestats_snapshot_params { |
@@ -555,6 +560,9 @@ struct tegra_vgpu_cmd_msg { | |||
555 | struct tegra_vgpu_perfbuf_mgt_params perfbuf_management; | 560 | struct tegra_vgpu_perfbuf_mgt_params perfbuf_management; |
556 | struct tegra_vgpu_get_timestamps_zipper_params get_timestamps_zipper; | 561 | struct tegra_vgpu_get_timestamps_zipper_params get_timestamps_zipper; |
557 | struct tegra_vgpu_get_gpu_freq_table_params get_gpu_freq_table; | 562 | struct tegra_vgpu_get_gpu_freq_table_params get_gpu_freq_table; |
563 | #ifdef CONFIG_TEGRA_19x_GPU | ||
564 | union tegra_vgpu_t19x_params t19x; | ||
565 | #endif | ||
558 | char padding[192]; | 566 | char padding[192]; |
559 | } params; | 567 | } params; |
560 | }; | 568 | }; |