gpu: nvgpu: gk20a: Use new delay APIs

Use platform agnostic delay functions instead of Linux kernel APIs.
This allows removing dependency to Linux header linux/delay.h. At the
same time remove #include lines for other unused Linux headers.

JIRA NVGPU-16

Change-Id: I46b9ccb80e0b67efb86ec85676e5a55ff835c0ec
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1460113
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>

17 files changed, 58 insertions, 103 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c b/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c
index 5b27953e..523ba4f6 100644
--- a/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c
@@ -17,12 +17,6 @@
  * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  */
 
-/*TODO: remove uncecessary */
-#include <linux/delay.h>
-#include <linux/scatterlist.h>
-#include <trace/events/gk20a.h>
-#include <linux/dma-mapping.h>
-#include <linux/nvhost.h>
 #include <linux/debugfs.h>
 
 #include <nvgpu/kmem.h>
diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
index 8510c543..3cfb9914 100644
--- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
@@ -16,8 +16,6 @@
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  */
 
-#include <linux/list.h>
-#include <linux/delay.h>
 #include <linux/kthread.h>
 #include <trace/events/gk20a.h>
 #include <linux/dma-buf.h>
@@ -301,7 +299,7 @@ int gk20a_wait_channel_idle(struct channel_gk20a *ch)
                 if (channel_idle)
                         break;
 
-                usleep_range(1000, 3000);
+                nvgpu_usleep_range(1000, 3000);
         } while (!nvgpu_timeout_expired(&timeout));
 
         if (!channel_idle) {
diff --git a/drivers/gpu/nvgpu/gk20a/clk_gk20a.c b/drivers/gpu/nvgpu/gk20a/clk_gk20a.c
index 45af68ea..b69f74b2 100644
--- a/drivers/gpu/nvgpu/gk20a/clk_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/clk_gk20a.c
@@ -17,7 +17,6 @@
  */
 
 #include <linux/clk.h>
-#include <linux/delay.h>        /* for mdelay */
 #include <linux/module.h>
 #include <linux/debugfs.h>
 #include <linux/clk/tegra.h>
@@ -26,6 +25,7 @@
 
 #include <nvgpu/log.h>
 #include <nvgpu/soc.h>
+#include <nvgpu/timers.h>
 #include <nvgpu/bug.h>
 
 #include <nvgpu/hw/gk20a/hw_trim_gk20a.h>
@@ -223,7 +223,7 @@ static int clk_slide_gpc_pll(struct gk20a *g, u32 n)
         coeff = gk20a_readl(g, trim_sys_gpcpll_coeff_r());
         coeff = set_field(coeff, trim_sys_gpcpll_coeff_ndiv_m(),
                         trim_sys_gpcpll_coeff_ndiv_f(n));
-        udelay(1);
+        nvgpu_udelay(1);
         gk20a_writel(g, trim_sys_gpcpll_coeff_r(), coeff);
 
         /* dynamic ramp to new ndiv */
@@ -231,11 +231,11 @@ static int clk_slide_gpc_pll(struct gk20a *g, u32 n)
         data = set_field(data,
                         trim_sys_gpcpll_ndiv_slowdown_en_dynramp_m(),
                         trim_sys_gpcpll_ndiv_slowdown_en_dynramp_yes_f());
-        udelay(1);
+        nvgpu_udelay(1);
         gk20a_writel(g, trim_sys_gpcpll_ndiv_slowdown_r(), data);
 
         do {
-                udelay(1);
+                nvgpu_udelay(1);
                 ramp_timeout--;
                 data = gk20a_readl(
                         g, trim_gpc_bcast_gpcpll_ndiv_slowdown_debug_r());
@@ -304,7 +304,7 @@ static int clk_program_gpc_pll(struct gk20a *g, struct clk_gk20a *clk,
         data = gk20a_readl(g, trim_sys_sel_vco_r());
         data = set_field(data, trim_sys_sel_vco_gpc2clk_out_m(),
                 trim_sys_sel_vco_gpc2clk_out_bypass_f());
-        udelay(2);
+        nvgpu_udelay(2);
         gk20a_writel(g, trim_sys_sel_vco_r(), data);
 
         /* get out from IDDQ */
@@ -314,7 +314,7 @@ static int clk_program_gpc_pll(struct gk20a *g, struct clk_gk20a *clk,
                                 trim_sys_gpcpll_cfg_iddq_power_on_v());
                 gk20a_writel(g, trim_sys_gpcpll_cfg_r(), cfg);
                 gk20a_readl(g, trim_sys_gpcpll_cfg_r());
-                udelay(gpc_pll_params.iddq_exit_delay);
+                nvgpu_udelay(gpc_pll_params.iddq_exit_delay);
         }
 
         /* disable PLL before changing coefficients */
@@ -353,7 +353,7 @@ static int clk_program_gpc_pll(struct gk20a *g, struct clk_gk20a *clk,
                 cfg = gk20a_readl(g, trim_sys_gpcpll_cfg_r());
                 if (cfg & trim_sys_gpcpll_cfg_pll_lock_true_f())
                         goto pll_locked;
-                udelay(2);
+                nvgpu_udelay(2);
         } while (--timeout > 0);
 
         /* PLL is messed up. What can we do here? */
@@ -372,7 +372,7 @@ pll_locked:
         data = gk20a_readl(g, trim_sys_gpc2clk_out_r());
         data = set_field(data, trim_sys_gpc2clk_out_vcodiv_m(),
                 trim_sys_gpc2clk_out_vcodiv_by1_f());
-        udelay(2);
+        nvgpu_udelay(2);
         gk20a_writel(g, trim_sys_gpc2clk_out_r(), data);
 
         /* slide up to target NDIV */
@@ -791,10 +791,10 @@ static int monitor_get(void *data, u64 *val)
         /* It should take about 8us to finish 100 cycle of 12MHz.
            But longer than 100us delay is required here. */
         gk20a_readl(g, trim_gpc_clk_cntr_ncgpcclk_cfg_r(0));
-        udelay(2000);
+        nvgpu_udelay(2000);
 
         count1 = gk20a_readl(g, trim_gpc_clk_cntr_ncgpcclk_cnt_r(0));
-        udelay(100);
+        nvgpu_udelay(100);
         count2 = gk20a_readl(g, trim_gpc_clk_cntr_ncgpcclk_cnt_r(0));
         freq *= trim_gpc_clk_cntr_ncgpcclk_cnt_value_v(count2);
         do_div(freq, ncycle);
diff --git a/drivers/gpu/nvgpu/gk20a/ctxsw_trace_gk20a.c b/drivers/gpu/nvgpu/gk20a/ctxsw_trace_gk20a.c
index f60a4b0e..5b1dff17 100644
--- a/drivers/gpu/nvgpu/gk20a/ctxsw_trace_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/ctxsw_trace_gk20a.c
@@ -14,12 +14,10 @@
 #include <asm/barrier.h>
 #include <linux/kthread.h>
 #include <linux/circ_buf.h>
-#include <linux/delay.h>
 #include <linux/wait.h>
 #include <linux/ktime.h>
 #include <linux/hashtable.h>
 #include <linux/debugfs.h>
-#include <linux/log2.h>
 #include <linux/uaccess.h>
 #include <linux/poll.h>
 #include <trace/events/gk20a.h>
diff --git a/drivers/gpu/nvgpu/gk20a/fb_gk20a.c b/drivers/gpu/nvgpu/gk20a/fb_gk20a.c
index b3c52852..214014ce 100644
--- a/drivers/gpu/nvgpu/gk20a/fb_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/fb_gk20a.c
@@ -14,12 +14,13 @@
  */
 
 #include <trace/events/gk20a.h>
-#include <linux/delay.h>
 
 #include "gk20a.h"
 #include "kind_gk20a.h"
 #include "fb_gk20a.h"
 
+#include <nvgpu/timers.h>
+
 #include <nvgpu/hw/gk20a/hw_mc_gk20a.h>
 #include <nvgpu/hw/gk20a/hw_fb_gk20a.h>
 
@@ -124,7 +125,7 @@ void gk20a_fb_tlb_invalidate(struct gk20a *g, struct nvgpu_mem *pdb)
                 data = gk20a_readl(g, fb_mmu_ctrl_r());
                 if (fb_mmu_ctrl_pri_fifo_space_v(data) != 0)
                         break;
-                udelay(2);
+                nvgpu_udelay(2);
         } while (!nvgpu_timeout_expired_msg(&timeout,
                                          "wait mmu fifo space"));
 
@@ -148,7 +149,7 @@ void gk20a_fb_tlb_invalidate(struct gk20a *g, struct nvgpu_mem *pdb)
                 if (fb_mmu_ctrl_pri_fifo_empty_v(data) !=
                         fb_mmu_ctrl_pri_fifo_empty_false_f())
                         break;
-                udelay(2);
+                nvgpu_udelay(2);
         } while (!nvgpu_timeout_expired_msg(&timeout,
                                          "wait mmu invalidate"));
 
diff --git a/drivers/gpu/nvgpu/gk20a/fecs_trace_gk20a.c b/drivers/gpu/nvgpu/gk20a/fecs_trace_gk20a.c
index 3e21dea4..316dcda4 100644
--- a/drivers/gpu/nvgpu/gk20a/fecs_trace_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/fecs_trace_gk20a.c
@@ -14,13 +14,8 @@
 #include <asm/barrier.h>
 #include <linux/kthread.h>
 #include <linux/circ_buf.h>
-#include <linux/delay.h>
-#include <linux/wait.h>
-#include <linux/ktime.h>
 #include <linux/hashtable.h>
 #include <linux/debugfs.h>
-#include <linux/log2.h>
-#include <uapi/linux/nvgpu.h>
 
 #include <nvgpu/kmem.h>
 #include <nvgpu/dma.h>
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
index 4e08ffea..c296be5b 100644
--- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
@@ -17,10 +17,7 @@
  * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  */
 
-#include <linux/delay.h>
-#include <linux/scatterlist.h>
 #include <trace/events/gk20a.h>
-#include <linux/dma-mapping.h>
 #ifdef CONFIG_TEGRA_GK20A_NVHOST
 #include <linux/nvhost.h>
 #endif
@@ -1735,7 +1732,7 @@ static void gk20a_fifo_trigger_mmu_fault(struct gk20a *g,
                                 fifo_intr_0_mmu_fault_pending_f())
                         break;
 
-                usleep_range(delay, delay * 2);
+                nvgpu_usleep_range(delay, delay * 2);
                 delay = min_t(u32, delay << 1, GR_IDLE_CHECK_MAX);
         } while (!nvgpu_timeout_expired_msg(&timeout, "mmu fault timeout"));
 
@@ -2533,7 +2530,7 @@ int gk20a_fifo_is_preempt_pending(struct gk20a *g, u32 id,
                         break;
                 }
 
-                usleep_range(delay, delay * 2);
+                nvgpu_usleep_range(delay, delay * 2);
                 delay = min_t(u32, delay << 1, GR_IDLE_CHECK_MAX);
         } while (!nvgpu_timeout_expired_msg(&timeout, "preempt timeout"));
 
@@ -2901,7 +2898,7 @@ static int gk20a_fifo_runlist_wait_pending(struct gk20a *g, u32 runlist_id)
                         break;
                 }
 
-                usleep_range(delay, delay * 2);
+                nvgpu_usleep_range(delay, delay * 2);
                 delay = min_t(u32, delay << 1, GR_IDLE_CHECK_MAX);
         } while (!nvgpu_timeout_expired(&timeout));
 
@@ -3348,7 +3345,7 @@ int gk20a_fifo_wait_engine_idle(struct gk20a *g)
                                 break;
                         }
 
-                        usleep_range(delay, delay * 2);
+                        nvgpu_usleep_range(delay, delay * 2);
                         delay = min_t(unsigned long,
                                         delay << 1, GR_IDLE_CHECK_MAX);
                 } while (!nvgpu_timeout_expired(&timeout));
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.c b/drivers/gpu/nvgpu/gk20a/gk20a.c
index 339656c7..a50dfa0e 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.c
@@ -17,9 +17,7 @@
  */
 
 #include <linux/module.h>
-#include <linux/dma-mapping.h>
 #include <linux/string.h>
-#include <linux/delay.h>
 #include <linux/interrupt.h>
 #include <linux/irq.h>
 #include <linux/export.h>
@@ -30,7 +28,6 @@
 #include <linux/thermal.h>
 #include <asm/cacheflush.h>
 #include <linux/debugfs.h>
-#include <nvgpu/lock.h>
 #include <linux/clk/tegra.h>
 #include <linux/kthread.h>
 #include <linux/platform/tegra/common.h>
@@ -1181,7 +1178,7 @@ int gk20a_wait_for_idle(struct device *dev)
 
         while ((atomic_read(&g->usage_count) != target_usage_count)
                         && (wait_length-- >= 0))
-                msleep(20);
+                nvgpu_msleep(20);
 
         if (wait_length < 0) {
                 pr_warn("%s: Timed out waiting for idle (%d)!\n",
@@ -1336,7 +1333,7 @@ int __gk20a_do_idle(struct device *dev, bool force_reset)
 
         /* check and wait until GPU is idle (with a timeout) */
         do {
-                msleep(1);
+                nvgpu_msleep(1);
                 ref_cnt = atomic_read(&dev->power.usage_count);
         } while (ref_cnt != target_ref_cnt && !nvgpu_timeout_expired(&timeout));
 
@@ -1362,11 +1359,11 @@ int __gk20a_do_idle(struct device *dev, bool force_reset)
                 pm_runtime_put_sync(dev);
 
                 /* add sufficient delay to allow GPU to rail gate */
-                msleep(platform->railgate_delay);
+                nvgpu_msleep(platform->railgate_delay);
 
                 /* check in loop if GPU is railgated or not */
                 do {
-                        msleep(1);
+                        nvgpu_msleep(1);
                         is_railgated = platform->is_railgated(dev);
                 } while (!is_railgated && !nvgpu_timeout_expired(&timeout));
 
@@ -1397,7 +1394,7 @@ int __gk20a_do_idle(struct device *dev, bool force_reset)
                 /* railgate GPU */
                 platform->railgate(dev);
 
-                udelay(10);
+                nvgpu_udelay(10);
 
                 g->forced_reset = true;
                 return 0;
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
index d211242c..a4419885 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
@@ -17,14 +17,7 @@
  * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  */
 
-#include <linux/delay.h>        /* for udelay */
-#include <linux/mm.h>           /* for totalram_pages */
-#include <linux/scatterlist.h>
-#include <linux/debugfs.h>
-#include <uapi/linux/nvgpu.h>
-#include <linux/dma-mapping.h>
 #include <linux/firmware.h>
-#include <linux/nvhost.h>
 #include <trace/events/gk20a.h>
 
 #include <nvgpu/dma.h>
@@ -370,7 +363,7 @@ int gr_gk20a_wait_idle(struct gk20a *g, unsigned long duration_ms,
                         return 0;
                 }
 
-                usleep_range(delay, delay * 2);
+                nvgpu_usleep_range(delay, delay * 2);
                 delay = min_t(u32, delay << 1, GR_IDLE_CHECK_MAX);
 
         } while (!nvgpu_timeout_expired(&timeout));
@@ -406,7 +399,7 @@ int gr_gk20a_wait_fe_idle(struct gk20a *g, unsigned long duration_ms,
                         return 0;
                 }
 
-                usleep_range(delay, delay * 2);
+                nvgpu_usleep_range(delay, delay * 2);
                 delay = min_t(u32, delay << 1, GR_IDLE_CHECK_MAX);
         } while (!nvgpu_timeout_expired(&timeout));
 
@@ -507,10 +500,10 @@ int gr_gk20a_ctx_wait_ucode(struct gk20a *g, u32 mailbox_id,
                 }
 
                 if (sleepduringwait) {
-                        usleep_range(delay, delay * 2);
+                        nvgpu_usleep_range(delay, delay * 2);
                         delay = min_t(u32, delay << 1, GR_IDLE_CHECK_MAX);
                 } else
-                        udelay(delay);
+                        nvgpu_udelay(delay);
         }
 
         if (check == WAIT_UCODE_TIMEOUT) {
@@ -1613,7 +1606,7 @@ static int gr_gk20a_init_golden_ctx_image(struct gk20a *g,
                         u32 req = gr_fe_pwr_mode_req_v(gk20a_readl(g, gr_fe_pwr_mode_r()));
                         if (req == gr_fe_pwr_mode_req_done_v())
                                 break;
-                        udelay(FE_PWR_MODE_TIMEOUT_DEFAULT);
+                        nvgpu_udelay(FE_PWR_MODE_TIMEOUT_DEFAULT);
                 } while (!nvgpu_timeout_expired_msg(&timeout,
                                                     "timeout forcing FE on"));
         }
@@ -1630,7 +1623,7 @@ static int gr_gk20a_init_golden_ctx_image(struct gk20a *g,
                         gr_fecs_ctxsw_reset_ctl_gpc_context_reset_enabled_f() |
                         gr_fecs_ctxsw_reset_ctl_be_context_reset_enabled_f());
         gk20a_readl(g, gr_fecs_ctxsw_reset_ctl_r());
-        udelay(10);
+        nvgpu_udelay(10);
 
         gk20a_writel(g, gr_fecs_ctxsw_reset_ctl_r(),
                         gr_fecs_ctxsw_reset_ctl_sys_halt_disabled_f() |
@@ -1643,7 +1636,7 @@ static int gr_gk20a_init_golden_ctx_image(struct gk20a *g,
                         gr_fecs_ctxsw_reset_ctl_gpc_context_reset_disabled_f() |
                         gr_fecs_ctxsw_reset_ctl_be_context_reset_disabled_f());
         gk20a_readl(g, gr_fecs_ctxsw_reset_ctl_r());
-        udelay(10);
+        nvgpu_udelay(10);
 
         if (!platform->is_fmodel) {
                 struct nvgpu_timeout timeout;
@@ -1657,7 +1650,7 @@ static int gr_gk20a_init_golden_ctx_image(struct gk20a *g,
                         u32 req = gr_fe_pwr_mode_req_v(gk20a_readl(g, gr_fe_pwr_mode_r()));
                         if (req == gr_fe_pwr_mode_req_done_v())
                                 break;
-                        udelay(FE_PWR_MODE_TIMEOUT_DEFAULT);
+                        nvgpu_udelay(FE_PWR_MODE_TIMEOUT_DEFAULT);
                 } while (!nvgpu_timeout_expired_msg(&timeout,
                                                     "timeout setting FE power to auto"));
         }
@@ -2369,7 +2362,7 @@ void gr_gk20a_load_falcon_bind_instblk(struct gk20a *g)
 
         while ((gk20a_readl(g, gr_fecs_ctxsw_status_1_r()) &
                         gr_fecs_ctxsw_status_1_arb_busy_m()) && retries) {
-                udelay(FECS_ARB_CMD_TIMEOUT_DEFAULT);
+                nvgpu_udelay(FECS_ARB_CMD_TIMEOUT_DEFAULT);
                 retries--;
         }
         if (!retries) {
@@ -2400,7 +2393,7 @@ void gr_gk20a_load_falcon_bind_instblk(struct gk20a *g)
         retries = FECS_ARB_CMD_TIMEOUT_MAX / FECS_ARB_CMD_TIMEOUT_DEFAULT;
         val = gk20a_readl(g, gr_fecs_arb_ctx_cmd_r());
         while (gr_fecs_arb_ctx_cmd_cmd_v(val) && retries) {
-                udelay(FECS_ARB_CMD_TIMEOUT_DEFAULT);
+                nvgpu_udelay(FECS_ARB_CMD_TIMEOUT_DEFAULT);
                 retries--;
                 val = gk20a_readl(g, gr_fecs_arb_ctx_cmd_r());
         }
@@ -2417,7 +2410,7 @@ void gr_gk20a_load_falcon_bind_instblk(struct gk20a *g)
         retries = FECS_ARB_CMD_TIMEOUT_MAX / FECS_ARB_CMD_TIMEOUT_DEFAULT;
         val = (gk20a_readl(g, gr_fecs_arb_ctx_cmd_r()));
         while (gr_fecs_arb_ctx_cmd_cmd_v(val) && retries) {
-                udelay(FECS_ARB_CMD_TIMEOUT_DEFAULT);
+                nvgpu_udelay(FECS_ARB_CMD_TIMEOUT_DEFAULT);
                 retries--;
                 val = gk20a_readl(g, gr_fecs_arb_ctx_cmd_r());
         }
@@ -5021,7 +5014,7 @@ static int gr_gk20a_wait_mem_scrubbing(struct gk20a *g)
                         return 0;
                 }
 
-                udelay(CTXSW_MEM_SCRUBBING_TIMEOUT_DEFAULT);
+                nvgpu_udelay(CTXSW_MEM_SCRUBBING_TIMEOUT_DEFAULT);
         } while (!nvgpu_timeout_expired(&timeout));
 
         nvgpu_err(g, "Falcon mem scrubbing timeout");
@@ -8663,7 +8656,7 @@ int gk20a_gr_wait_for_sm_lock_down(struct gk20a *g, u32 gpc, u32 tpc,
                         return -EFAULT;
                 }
 
-                usleep_range(delay, delay * 2);
+                nvgpu_usleep_range(delay, delay * 2);
                 delay = min_t(u32, delay << 1, GR_IDLE_CHECK_MAX);
         } while (!nvgpu_timeout_expired(&timeout));
 
diff --git a/drivers/gpu/nvgpu/gk20a/ltc_common.c b/drivers/gpu/nvgpu/gk20a/ltc_common.c
index 03b12740..6162d420 100644
--- a/drivers/gpu/nvgpu/gk20a/ltc_common.c
+++ b/drivers/gpu/nvgpu/gk20a/ltc_common.c
@@ -18,9 +18,6 @@
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  */
 
-#include <linux/dma-mapping.h>
-#include <linux/delay.h>
-
 #include <nvgpu/dma.h>
 
 #include "gk20a.h"
diff --git a/drivers/gpu/nvgpu/gk20a/ltc_gk20a.c b/drivers/gpu/nvgpu/gk20a/ltc_gk20a.c
index 9da9dd6b..d8d9226c 100644
--- a/drivers/gpu/nvgpu/gk20a/ltc_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/ltc_gk20a.c
@@ -155,7 +155,7 @@ static int gk20a_ltc_cbc_ctrl(struct gk20a *g, enum gk20a_cbc_op op,
                                 val = gk20a_readl(g, ctrl1);
                                 if (!(val & hw_op))
                                         break;
-                                udelay(5);
+                                nvgpu_udelay(5);
 
                         } while (!nvgpu_timeout_expired(&timeout));
 
diff --git a/drivers/gpu/nvgpu/gk20a/mc_gk20a.c b/drivers/gpu/nvgpu/gk20a/mc_gk20a.c
index 32a6532f..ca7189cc 100644
--- a/drivers/gpu/nvgpu/gk20a/mc_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/mc_gk20a.c
@@ -13,12 +13,12 @@
  * more details.
  */
 
-#include <linux/delay.h>
 #include <trace/events/gk20a.h>
 
 #include "gk20a.h"
 #include "mc_gk20a.h"
 
+#include <nvgpu/timers.h>
 #include <nvgpu/atomic.h>
 
 #include <nvgpu/hw/gk20a/hw_mc_gk20a.h>
@@ -276,16 +276,16 @@ void gk20a_mc_enable(struct gk20a *g, u32 units)
         gk20a_readl(g, mc_enable_r());
         nvgpu_spinlock_release(&g->mc_enable_lock);
 
-        udelay(20);
+        nvgpu_udelay(20);
 }
 
 void gk20a_mc_reset(struct gk20a *g, u32 units)
 {
         g->ops.mc.disable(g, units);
         if (units & gk20a_fifo_get_all_ce_engine_reset_mask(g))
-                udelay(500);
+                nvgpu_udelay(500);
         else
-                udelay(20);
+                nvgpu_udelay(20);
         g->ops.mc.enable(g, units);
 }
 
diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
index 84171ae9..e16b77b7 100644
--- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
@@ -16,12 +16,8 @@
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  */
 
-#include <linux/delay.h>
-#include <linux/highmem.h>
 #include <linux/log2.h>
-#include <linux/nvhost.h>
 #include <linux/scatterlist.h>
-#include <linux/nvmap.h>
 #include <linux/dma-buf.h>
 #include <linux/dma-mapping.h>
 #include <linux/dma-attrs.h>
@@ -1231,7 +1227,7 @@ static void gk20a_vm_unmap_user(struct vm_gk20a *vm, u64 offset,
                 do {
                         if (atomic_read(&mapped_buffer->ref.refcount) == 1)
                                 break;
-                        udelay(5);
+                        nvgpu_udelay(5);
                 } while (!nvgpu_timeout_expired_msg(&timeout,
                                             "sync-unmap failed on 0x%llx"));
 
@@ -1383,8 +1379,6 @@ static struct mapped_buffer_node *find_mapped_buffer_less_than_locked(
         return mapped_buffer_from_rbtree_node(node);
 }
 
-#define BFR_ATTRS (sizeof(nvmap_bfr_param)/sizeof(nvmap_bfr_param[0]))
-
 struct buffer_attrs {
         struct sg_table *sgt;
         u64 size;
@@ -4403,7 +4397,7 @@ int gk20a_mm_fb_flush(struct gk20a *g)
                     flush_fb_flush_pending_v(data) ==
                         flush_fb_flush_pending_busy_v()) {
                                 gk20a_dbg_info("fb_flush 0x%x", data);
-                                udelay(5);
+                                nvgpu_udelay(5);
                 } else
                         break;
         } while (!nvgpu_timeout_expired(&timeout));
@@ -4446,7 +4440,7 @@ static void gk20a_mm_l2_invalidate_locked(struct gk20a *g)
                         flush_l2_system_invalidate_pending_busy_v()) {
                                 gk20a_dbg_info("l2_system_invalidate 0x%x",
                                                 data);
-                                udelay(5);
+                                nvgpu_udelay(5);
                 } else
                         break;
         } while (!nvgpu_timeout_expired(&timeout));
@@ -4500,7 +4494,7 @@ void gk20a_mm_l2_flush(struct gk20a *g, bool invalidate)
                     flush_l2_flush_dirty_pending_v(data) ==
                         flush_l2_flush_dirty_pending_busy_v()) {
                                 gk20a_dbg_info("l2_flush_dirty 0x%x", data);
-                                udelay(5);
+                                nvgpu_udelay(5);
                 } else
                         break;
         } while (!nvgpu_timeout_expired_msg(&timeout,
@@ -4545,7 +4539,7 @@ void gk20a_mm_cbc_clean(struct gk20a *g)
                     flush_l2_clean_comptags_pending_v(data) ==
                         flush_l2_clean_comptags_pending_busy_v()) {
                                 gk20a_dbg_info("l2_clean_comptags 0x%x", data);
-                                udelay(5);
+                                nvgpu_udelay(5);
                 } else
                         break;
         } while (!nvgpu_timeout_expired_msg(&timeout,
diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c
index 3625b679..cb9e1ba1 100644
--- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c
@@ -16,11 +16,9 @@
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  */
 
-#include <linux/delay.h>        /* for mdelay */
 #include <linux/firmware.h>
 #include <linux/module.h>
 #include <linux/debugfs.h>
-#include <linux/dma-mapping.h>
 #include <linux/uaccess.h>
 
 #include <nvgpu/nvgpu_common.h>
@@ -2326,7 +2324,7 @@ int pmu_idle(struct pmu_gk20a *pmu)
                                             idle_stat))
                         return -EBUSY;
 
-                usleep_range(100, 200);
+                nvgpu_usleep_range(100, 200);
         } while (1);
 
         gk20a_dbg_fn("done");
@@ -2424,7 +2422,7 @@ int pmu_enable_hw(struct pmu_gk20a *pmu, bool enable)
                                 gk20a_dbg_fn("done");
                                 return 0;
                         }
-                        udelay(PMU_MEM_SCRUBBING_TIMEOUT_DEFAULT);
+                        nvgpu_udelay(PMU_MEM_SCRUBBING_TIMEOUT_DEFAULT);
                 } while (!nvgpu_timeout_expired(&timeout));
 
                 g->ops.mc.disable(g, mc_enable_pwr_enabled_f());
@@ -2785,7 +2783,7 @@ int pmu_mutex_acquire(struct pmu_gk20a *pmu, u32 id, u32 *token)
                         nvgpu_warn(g,
                                 "fail to generate mutex token: val 0x%08x",
                                 owner);
-                        usleep_range(20, 40);
+                        nvgpu_usleep_range(20, 40);
                         continue;
                 }
 
@@ -2812,7 +2810,7 @@ int pmu_mutex_acquire(struct pmu_gk20a *pmu, u32 id, u32 *token)
                                 pwr_pmu_mutex_id_release_value_f(owner));
                         gk20a_writel(g, pwr_pmu_mutex_id_release_r(), data);
 
-                        usleep_range(20, 40);
+                        nvgpu_usleep_range(20, 40);
                         continue;
                 }
         } while (max_retry-- > 0);
@@ -3448,7 +3446,7 @@ static void pmu_setup_hw_enable_elpg(struct gk20a *g)
                 gk20a_pmu_enable_elpg(g);
         }
 
-        udelay(50);
+        nvgpu_udelay(50);
 
         /* Enable AELPG */
         if (g->aelpg_enabled) {
@@ -4335,7 +4333,7 @@ int pmu_wait_message_cond(struct pmu_gk20a *pmu, u32 timeout_ms,
                 if (gk20a_readl(g, pwr_falcon_irqstat_r()) & servicedpmuint)
                         gk20a_pmu_isr(g);
 
-                usleep_range(delay, delay * 2);
+                nvgpu_usleep_range(delay, delay * 2);
                 delay = min_t(u32, delay << 1, GR_IDLE_CHECK_MAX);
         } while (!nvgpu_timeout_expired(&timeout));
 
@@ -4689,7 +4687,7 @@ static int pmu_write_cmd(struct pmu_gk20a *pmu, struct pmu_cmd *cmd,
         do {
                 err = pmu_queue_open_write(pmu, queue, cmd->hdr.size);
                 if (err == -EAGAIN && !nvgpu_timeout_expired(&timeout))
-                        usleep_range(1000, 2000);
+                        nvgpu_usleep_range(1000, 2000);
                 else
                         break;
         } while (1);
diff --git a/drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.c b/drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.c
index 08198776..07cdc9e5 100644
--- a/drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.c
@@ -16,11 +16,10 @@
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  */
 
-#include <linux/delay.h>        /* for mdelay */
-
 #include "gk20a.h"
 
 #include <nvgpu/log.h>
+#include <nvgpu/timers.h>
 
 #include <nvgpu/hw/gk20a/hw_mc_gk20a.h>
 #include <nvgpu/hw/gk20a/hw_pri_ringmaster_gk20a.h>
@@ -62,7 +61,7 @@ static void gk20a_reset_priv_ring(struct gk20a *g)
 
         gk20a_writel(g, pri_ringmaster_global_ctl_r(),
                         pri_ringmaster_global_ctl_ring_reset_asserted_f());
-        udelay(20);
+        nvgpu_udelay(20);
         gk20a_writel(g, pri_ringmaster_global_ctl_r(),
                         pri_ringmaster_global_ctl_ring_reset_deasserted_f());
 
@@ -119,7 +118,7 @@ void gk20a_priv_ring_isr(struct gk20a *g)
         do {
                 cmd = pri_ringmaster_command_cmd_v(
                         gk20a_readl(g, pri_ringmaster_command_r()));
-                usleep_range(20, 40);
+                nvgpu_usleep_range(20, 40);
         } while (cmd != pri_ringmaster_command_cmd_no_cmd_v() && --retry);
 
         if (retry <= 0)
diff --git a/drivers/gpu/nvgpu/gk20a/sched_gk20a.c b/drivers/gpu/nvgpu/gk20a/sched_gk20a.c
index cd5df5bf..ff038b62 100644
--- a/drivers/gpu/nvgpu/gk20a/sched_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/sched_gk20a.c
@@ -12,14 +12,8 @@
  */
 
 #include <asm/barrier.h>
-#include <linux/kthread.h>
-#include <linux/circ_buf.h>
-#include <linux/delay.h>
 #include <linux/wait.h>
-#include <linux/ktime.h>
-#include <linux/hashtable.h>
 #include <linux/debugfs.h>
-#include <linux/log2.h>
 #include <linux/uaccess.h>
 #include <linux/poll.h>
 #include <uapi/linux/nvgpu.h>
diff --git a/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c b/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c
index d8e184ef..17882e72 100644
--- a/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c
@@ -150,7 +150,7 @@ int gm20b_ltc_cbc_ctrl(struct gk20a *g, enum gk20a_cbc_op op,
                                 val = gk20a_readl(g, ctrl1);
                                 if (!(val & hw_op))
                                         break;
-                                udelay(5);
+                                nvgpu_udelay(5);
                         } while (!nvgpu_timeout_expired(&timeout));
 
                         if (nvgpu_timeout_peek_expired(&timeout)) {