gpu: nvgpu: Use correct aperture for perf inst_block

The perf inst block was being treated as vidmem (LFB - local
framebuffer) always, regardless of the type of nvgpu_mem used
for the instance block. On dGPUs this was fine becasue we
always allocate instance blocks from vidmem. Inst blocks are
allocated with nvgpu_dma_alloc() which chooses vidmem if
vidmem is present, otherwise falls back to sysmem.

When the above fall back logic was deleted this caused inst
blocks to always be allocated in sysmem, even for dGPUs. This
isn't a problem in an of itself but the logic for the perf
instance block bind operation assumed a VIDMEM inst_block.

Thus this patch uses the nvgpu_aperture_mask() function to
correctly program the required aperture target for the perf's
inst block bind operation.

JIRA NVGPU-990

Change-Id: If6f09a743ee2ad47a6dbfa28cb7c61f1461fd8a7
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1796388
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

2 files changed, 11 insertions, 4 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/css_gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/css_gr_gk20a.c
index 14ae17ea..4aeeec1c 100644
--- a/drivers/gpu/nvgpu/gk20a/css_gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/css_gr_gk20a.c
@@ -130,6 +130,7 @@ int css_hw_enable_snapshot(struct channel_gk20a *ch,
                                 struct gk20a_cs_snapshot_client *cs_client)
 {
         struct gk20a *g = ch->g;
+        struct mm_gk20a *mm = &g->mm;
         struct gr_gk20a *gr = &g->gr;
         struct gk20a_cs_snapshot *data = gr->cs_data;
         u32 snapshot_size = cs_client->snapshot_size;
@@ -185,8 +186,11 @@ int css_hw_enable_snapshot(struct channel_gk20a *ch,
          * should be written last */
         gk20a_writel(g, perf_pmasys_mem_block_r(),
                         perf_pmasys_mem_block_base_f(inst_pa_page) |
-                        perf_pmasys_mem_block_valid_true_f() |
-                        perf_pmasys_mem_block_target_lfb_f());
+                        nvgpu_aperture_mask(g, &mm->hwpm.inst_block,
+                                perf_pmasys_mem_block_target_sys_ncoh_f(),
+                                perf_pmasys_mem_block_target_sys_coh_f(),
+                                perf_pmasys_mem_block_target_lfb_f()) |
+                        perf_pmasys_mem_block_valid_true_f());
 
         nvgpu_log_info(g, "cyclestats: buffer for hardware snapshots enabled\n");
 
diff --git a/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c b/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c
index 65bf2976..8307081e 100644
--- a/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c
@@ -385,8 +385,11 @@ int gk20a_perfbuf_enable_locked(struct gk20a *g, u64 offset, u32 size)
          * should be written last */
         gk20a_writel(g, perf_pmasys_mem_block_r(),
                         perf_pmasys_mem_block_base_f(inst_pa_page) |
-                        perf_pmasys_mem_block_valid_true_f() |
-                        perf_pmasys_mem_block_target_lfb_f());
+                        nvgpu_aperture_mask(g, &mm->perfbuf.inst_block,
+                                perf_pmasys_mem_block_target_sys_ncoh_f(),
+                                perf_pmasys_mem_block_target_sys_coh_f(),
+                                perf_pmasys_mem_block_target_lfb_f()) |
+                        perf_pmasys_mem_block_valid_true_f());
 
         gk20a_idle(g);
         return 0;