gpu: nvgpu: add HAL for regops

Bug 1500195

Change-Id: I5545d1a95a58e7daa5a74cc20f3fc6828774fc42
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/488507
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 files changed, 147 insertions, 32 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index de234972..fc97fcb9 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -298,6 +298,24 @@ struct gpu_ops {
                 int (*suspend_clk_support)(struct gk20a *g);
         } clk;
         bool privsecurity;
+        struct {
+                const struct regop_offset_range* (
+                                *get_global_whitelist_ranges)(void);
+                int (*get_global_whitelist_ranges_count)(void);
+                const struct regop_offset_range* (
+                                *get_context_whitelist_ranges)(void);
+                int (*get_context_whitelist_ranges_count)(void);
+                const u32* (*get_runcontrol_whitelist)(void);
+                int (*get_runcontrol_whitelist_count)(void);
+                const struct regop_offset_range* (
+                                *get_runcontrol_whitelist_ranges)(void);
+                int (*get_runcontrol_whitelist_ranges_count)(void);
+                const u32* (*get_qctl_whitelist)(void);
+                int (*get_qctl_whitelist_count)(void);
+                const struct regop_offset_range* (
+                                *get_qctl_whitelist_ranges)(void);
+                int (*get_qctl_whitelist_ranges_count)(void);
+        } regops;
 };
 
 struct gk20a {
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
index c1789427..cbad1292 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
@@ -5080,7 +5080,7 @@ static inline bool is_valid_cyclestats_bar0_offset_gk20a(struct gk20a *g,
 
         /* whitelist check */
         valid = valid &&
-                is_bar0_global_offset_whitelisted_gk20a(offset);
+                is_bar0_global_offset_whitelisted_gk20a(g, offset);
         /* resource size check in case there was a problem
          * with allocating the assumed size of bar0 */
         valid = valid &&
diff --git a/drivers/gpu/nvgpu/gk20a/hal_gk20a.c b/drivers/gpu/nvgpu/gk20a/hal_gk20a.c
index 1b8157f1..218491ea 100644
--- a/drivers/gpu/nvgpu/gk20a/hal_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/hal_gk20a.c
@@ -25,6 +25,7 @@
 #include "mm_gk20a.h"
 #include "pmu_gk20a.h"
 #include "clk_gk20a.h"
+#include "regops_gk20a.h"
 
 struct gpu_ops gk20a_ops = {
         .clock_gating = {
@@ -53,6 +54,7 @@ int gk20a_init_hal(struct gpu_ops *gops)
         gk20a_init_mm(gops);
         gk20a_init_pmu_ops(gops);
         gk20a_init_clk_ops(gops);
+        gk20a_init_regops(gops);
         gops->name = "gk20a";
 
         return 0;
diff --git a/drivers/gpu/nvgpu/gk20a/regops_gk20a.c b/drivers/gpu/nvgpu/gk20a/regops_gk20a.c
index 4a115fb1..87a95afe 100644
--- a/drivers/gpu/nvgpu/gk20a/regops_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/regops_gk20a.c
@@ -29,11 +29,6 @@
 
 
 
-struct regop_offset_range {
-        u32 base:24;
-        u32 count:8;
-};
-
 static int regop_bsearch_range_cmp(const void *pkey, const void *pelem)
 {
         u32 key = *(u32 *)pkey;
@@ -551,31 +546,32 @@ static int validate_reg_op_info(struct dbg_session_gk20a *dbg_s,
 static bool check_whitelists(struct dbg_session_gk20a *dbg_s,
                           struct nvhost_dbg_gpu_reg_op *op, u32 offset)
 {
+        struct gk20a *g = dbg_s->g;
         bool valid = false;
 
         if (op->type == REGOP(TYPE_GLOBAL)) {
                 /* search global list */
                 valid = !!bsearch(&offset,
-                                  gk20a_global_whitelist_ranges,
-                                  gk20a_global_whitelist_ranges_count,
-                                  sizeof(*gk20a_global_whitelist_ranges),
-                                  regop_bsearch_range_cmp);
+                        g->ops.regops.get_global_whitelist_ranges(),
+                        g->ops.regops.get_global_whitelist_ranges_count(),
+                        sizeof(*g->ops.regops.get_global_whitelist_ranges()),
+                        regop_bsearch_range_cmp);
 
                 /* if debug session and channel is bound search context list */
                 if ((!valid) && (!dbg_s->is_profiler && dbg_s->ch)) {
                         /* binary search context list */
                         valid = !!bsearch(&offset,
-                                          gk20a_context_whitelist_ranges,
-                                          gk20a_context_whitelist_ranges_count,
-                                          sizeof(*gk20a_context_whitelist_ranges),
-                                          regop_bsearch_range_cmp);
+                        g->ops.regops.get_context_whitelist_ranges(),
+                        g->ops.regops.get_context_whitelist_ranges_count(),
+                        sizeof(*g->ops.regops.get_context_whitelist_ranges()),
+                        regop_bsearch_range_cmp);
                 }
 
                 /* if debug session and channel is bound search runcontrol list */
                 if ((!valid) && (!dbg_s->is_profiler && dbg_s->ch)) {
                         valid = linear_search(offset,
-                                              gk20a_runcontrol_whitelist,
-                                              gk20a_runcontrol_whitelist_count);
+                                g->ops.regops.get_runcontrol_whitelist(),
+                                g->ops.regops.get_runcontrol_whitelist_count());
                 }
         } else if (op->type == REGOP(TYPE_GR_CTX)) {
                 /* it's a context-relative op */
@@ -587,22 +583,22 @@ static bool check_whitelists(struct dbg_session_gk20a *dbg_s,
 
                 /* binary search context list */
                 valid = !!bsearch(&offset,
-                                  gk20a_context_whitelist_ranges,
-                                  gk20a_context_whitelist_ranges_count,
-                                  sizeof(*gk20a_context_whitelist_ranges),
-                                  regop_bsearch_range_cmp);
+                        g->ops.regops.get_context_whitelist_ranges(),
+                        g->ops.regops.get_context_whitelist_ranges_count(),
+                        sizeof(*g->ops.regops.get_context_whitelist_ranges()),
+                        regop_bsearch_range_cmp);
 
                 /* if debug session and channel is bound search runcontrol list */
                 if ((!valid) && (!dbg_s->is_profiler && dbg_s->ch)) {
                         valid = linear_search(offset,
-                                              gk20a_runcontrol_whitelist,
-                                              gk20a_runcontrol_whitelist_count);
+                                g->ops.regops.get_runcontrol_whitelist(),
+                                g->ops.regops.get_runcontrol_whitelist_count());
                 }
 
         } else if (op->type == REGOP(TYPE_GR_CTX_QUAD)) {
                 valid = linear_search(offset,
-                                      gk20a_qctl_whitelist,
-                                      gk20a_qctl_whitelist_count);
+                                g->ops.regops.get_qctl_whitelist(),
+                                g->ops.regops.get_qctl_whitelist_count());
         }
 
         return valid;
@@ -692,13 +688,105 @@ static bool validate_reg_ops(struct dbg_session_gk20a *dbg_s,
 }
 
 /* exported for tools like cyclestats, etc */
-bool is_bar0_global_offset_whitelisted_gk20a(u32 offset)
+bool is_bar0_global_offset_whitelisted_gk20a(struct gk20a *g, u32 offset)
 {
-
         bool valid = !!bsearch(&offset,
-                               gk20a_global_whitelist_ranges,
-                               gk20a_global_whitelist_ranges_count,
-                               sizeof(*gk20a_global_whitelist_ranges),
-                               regop_bsearch_range_cmp);
+                        g->ops.regops.get_global_whitelist_ranges(),
+                        g->ops.regops.get_global_whitelist_ranges_count(),
+                        sizeof(*g->ops.regops.get_global_whitelist_ranges()),
+                        regop_bsearch_range_cmp);
         return valid;
 }
+
+const struct regop_offset_range *gk20a_get_global_whitelist_ranges(void)
+{
+        return gk20a_global_whitelist_ranges;
+}
+
+int gk20a_get_global_whitelist_ranges_count(void)
+{
+        return gk20a_global_whitelist_ranges_count;
+}
+
+const struct regop_offset_range *gk20a_get_context_whitelist_ranges(void)
+{
+        return gk20a_context_whitelist_ranges;
+}
+
+int gk20a_get_context_whitelist_ranges_count(void)
+{
+        return gk20a_context_whitelist_ranges_count;
+}
+
+const u32 *gk20a_get_runcontrol_whitelist(void)
+{
+        return gk20a_runcontrol_whitelist;
+}
+
+int gk20a_get_runcontrol_whitelist_count(void)
+{
+        return gk20a_runcontrol_whitelist_count;
+}
+
+const struct regop_offset_range *gk20a_get_runcontrol_whitelist_ranges(void)
+{
+        return gk20a_runcontrol_whitelist_ranges;
+}
+
+int gk20a_get_runcontrol_whitelist_ranges_count(void)
+{
+        return gk20a_runcontrol_whitelist_ranges_count;
+}
+
+const u32 *gk20a_get_qctl_whitelist(void)
+{
+        return gk20a_qctl_whitelist;
+}
+
+int gk20a_get_qctl_whitelist_count(void)
+{
+        return gk20a_qctl_whitelist_count;
+}
+
+const struct regop_offset_range *gk20a_get_qctl_whitelist_ranges(void)
+{
+        return gk20a_qctl_whitelist_ranges;
+}
+
+int gk20a_get_qctl_whitelist_ranges_count(void)
+{
+        return gk20a_qctl_whitelist_ranges_count;
+}
+
+void gk20a_init_regops(struct gpu_ops *gops)
+{
+        gops->regops.get_global_whitelist_ranges =
+                gk20a_get_global_whitelist_ranges;
+        gops->regops.get_global_whitelist_ranges_count =
+                gk20a_get_global_whitelist_ranges_count;
+
+        gops->regops.get_context_whitelist_ranges =
+                gk20a_get_context_whitelist_ranges;
+        gops->regops.get_context_whitelist_ranges_count =
+                gk20a_get_context_whitelist_ranges_count;
+
+        gops->regops.get_runcontrol_whitelist =
+                gk20a_get_runcontrol_whitelist;
+        gops->regops.get_runcontrol_whitelist_count =
+                gk20a_get_runcontrol_whitelist_count;
+
+        gops->regops.get_runcontrol_whitelist_ranges =
+                gk20a_get_runcontrol_whitelist_ranges;
+        gops->regops.get_runcontrol_whitelist_ranges_count =
+                gk20a_get_runcontrol_whitelist_ranges_count;
+
+        gops->regops.get_qctl_whitelist =
+                gk20a_get_qctl_whitelist;
+        gops->regops.get_qctl_whitelist_count =
+                gk20a_get_qctl_whitelist_count;
+
+        gops->regops.get_qctl_whitelist_ranges =
+                gk20a_get_qctl_whitelist_ranges;
+        gops->regops.get_qctl_whitelist_ranges_count =
+                gk20a_get_qctl_whitelist_ranges_count;
+}
diff --git a/drivers/gpu/nvgpu/gk20a/regops_gk20a.h b/drivers/gpu/nvgpu/gk20a/regops_gk20a.h
index 23b4865b..808e8bbe 100644
--- a/drivers/gpu/nvgpu/gk20a/regops_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/regops_gk20a.h
@@ -19,6 +19,13 @@
 #ifndef __REGOPS_GK20A_H_
 #define __REGOPS_GK20A_H_
 
+#include <linux/nvhost_dbg_gpu_ioctl.h>
+
+struct regop_offset_range {
+        u32 base:24;
+        u32 count:8;
+};
+
 int exec_regops_gk20a(struct dbg_session_gk20a *dbg_s,
                       struct nvhost_dbg_gpu_reg_op *ops,
                       u64 num_ops);
@@ -26,7 +33,6 @@ int exec_regops_gk20a(struct dbg_session_gk20a *dbg_s,
 /* turn seriously unwieldy names -> something shorter */
 #define REGOP(x) NVHOST_DBG_GPU_REG_OP_##x
 
-
 static inline bool reg_op_is_gr_ctx(u8 type)
 {
         return  type == REGOP(TYPE_GR_CTX) ||
@@ -42,6 +48,7 @@ static inline bool reg_op_is_read(u8 op)
                 op == REGOP(READ_64) ;
 }
 
-bool is_bar0_global_offset_whitelisted_gk20a(u32 offset);
+bool is_bar0_global_offset_whitelisted_gk20a(struct gk20a *g, u32 offset);
 
+void gk20a_init_regops(struct gpu_ops *gops);
 #endif /* __REGOPS_GK20A_H_ */