summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorKonsta Holtta <kholtta@nvidia.com>2018-01-23 04:26:32 -0500
committerDavid Pu <dpu@nvidia.com>2018-01-23 12:31:56 -0500
commit1b75e7277af2986bf175c31b94dcf942dca746f2 (patch)
tree6a35da65c72af3bb18e034a0c92efbcc048b2c9a
parent013158221a4c8dee8a75956c77e377b8df4fa372 (diff)
Revert "gpu: nvgpu: gv11b: enable devfreq"
This reverts commit 968d8cd3e543b951714d9a86373bd721d08c8482. Bug 2049965 Bug 2039013 Bug 200377508 Change-Id: I813947417740f8d3a0c9bea82784df1dd4a5f1ac Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1644224 Reviewed-by: David Pu <dpu@nvidia.com> Tested-by: David Pu <dpu@nvidia.com>
-rw-r--r--drivers/gpu/nvgpu/common/linux/platform_gp10b_tegra.c14
-rw-r--r--drivers/gpu/nvgpu/common/linux/platform_gv11b_tegra.c30
-rw-r--r--drivers/gpu/nvgpu/gp10b/platform_gp10b.h9
3 files changed, 10 insertions, 43 deletions
diff --git a/drivers/gpu/nvgpu/common/linux/platform_gp10b_tegra.c b/drivers/gpu/nvgpu/common/linux/platform_gp10b_tegra.c
index b6593d7a..8a964caf 100644
--- a/drivers/gpu/nvgpu/common/linux/platform_gp10b_tegra.c
+++ b/drivers/gpu/nvgpu/common/linux/platform_gp10b_tegra.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * GP10B Tegra Platform Interface 2 * GP10B Tegra Platform Interface
3 * 3 *
4 * Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved. 4 * Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved.
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify it 6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License, 7 * under the terms and conditions of the GNU General Public License,
@@ -150,7 +150,7 @@ static int gp10b_tegra_probe(struct device *dev)
150 return 0; 150 return 0;
151} 151}
152 152
153int gp10b_tegra_late_probe(struct device *dev) 153static int gp10b_tegra_late_probe(struct device *dev)
154{ 154{
155 /* Cause early VPR resize */ 155 /* Cause early VPR resize */
156 gk20a_tegra_secure_page_alloc(dev); 156 gk20a_tegra_secure_page_alloc(dev);
@@ -262,7 +262,7 @@ int gp10b_tegra_reset_deassert(struct device *dev)
262 return ret; 262 return ret;
263} 263}
264 264
265void gp10b_tegra_prescale(struct device *dev) 265static void gp10b_tegra_prescale(struct device *dev)
266{ 266{
267 struct gk20a *g = get_gk20a(dev); 267 struct gk20a *g = get_gk20a(dev);
268 u32 avg = 0; 268 u32 avg = 0;
@@ -274,7 +274,7 @@ void gp10b_tegra_prescale(struct device *dev)
274 gk20a_dbg_fn("done"); 274 gk20a_dbg_fn("done");
275} 275}
276 276
277void gp10b_tegra_postscale(struct device *pdev, 277static void gp10b_tegra_postscale(struct device *pdev,
278 unsigned long freq) 278 unsigned long freq)
279{ 279{
280 struct gk20a_platform *platform = gk20a_get_platform(pdev); 280 struct gk20a_platform *platform = gk20a_get_platform(pdev);
@@ -283,7 +283,7 @@ void gp10b_tegra_postscale(struct device *pdev,
283 unsigned long emc_rate; 283 unsigned long emc_rate;
284 284
285 gk20a_dbg_fn(""); 285 gk20a_dbg_fn("");
286 if (profile && !platform->is_railgated(pdev)) { 286 if (profile && !gp10b_tegra_is_railgated(pdev)) {
287 unsigned long emc_scale; 287 unsigned long emc_scale;
288 288
289 if (freq <= gp10b_freq_table[0]) 289 if (freq <= gp10b_freq_table[0])
@@ -303,7 +303,7 @@ void gp10b_tegra_postscale(struct device *pdev,
303 gk20a_dbg_fn("done"); 303 gk20a_dbg_fn("done");
304} 304}
305 305
306long gp10b_round_clk_rate(struct device *dev, unsigned long rate) 306static long gp10b_round_clk_rate(struct device *dev, unsigned long rate)
307{ 307{
308 struct gk20a *g = get_gk20a(dev); 308 struct gk20a *g = get_gk20a(dev);
309 struct gk20a_scale_profile *profile = g->scale_profile; 309 struct gk20a_scale_profile *profile = g->scale_profile;
@@ -318,7 +318,7 @@ long gp10b_round_clk_rate(struct device *dev, unsigned long rate)
318 return freq_table[max_states - 1]; 318 return freq_table[max_states - 1];
319} 319}
320 320
321int gp10b_clk_get_freqs(struct device *dev, 321static int gp10b_clk_get_freqs(struct device *dev,
322 unsigned long **freqs, int *num_freqs) 322 unsigned long **freqs, int *num_freqs)
323{ 323{
324 struct gk20a_platform *platform = gk20a_get_platform(dev); 324 struct gk20a_platform *platform = gk20a_get_platform(dev);
diff --git a/drivers/gpu/nvgpu/common/linux/platform_gv11b_tegra.c b/drivers/gpu/nvgpu/common/linux/platform_gv11b_tegra.c
index aad94cd2..3bd01b2b 100644
--- a/drivers/gpu/nvgpu/common/linux/platform_gv11b_tegra.c
+++ b/drivers/gpu/nvgpu/common/linux/platform_gv11b_tegra.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * GV11B Tegra Platform Interface 2 * GV11B Tegra Platform Interface
3 * 3 *
4 * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. 4 * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved.
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify it 6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License, 7 * under the terms and conditions of the GNU General Public License,
@@ -23,7 +23,6 @@
23#include <linux/reset.h> 23#include <linux/reset.h>
24#include <linux/hashtable.h> 24#include <linux/hashtable.h>
25#include <linux/clk.h> 25#include <linux/clk.h>
26#include <linux/platform/tegra/emc_bwmgr.h>
27 26
28#include <nvgpu/nvhost.h> 27#include <nvgpu/nvhost.h>
29 28
@@ -35,7 +34,6 @@
35#include "gk20a/gk20a.h" 34#include "gk20a/gk20a.h"
36#include "platform_gk20a.h" 35#include "platform_gk20a.h"
37#include "clk.h" 36#include "clk.h"
38#include "scale.h"
39 37
40#include "gp10b/platform_gp10b.h" 38#include "gp10b/platform_gp10b.h"
41#include "platform_gp10b_tegra.h" 39#include "platform_gp10b_tegra.h"
@@ -130,16 +128,9 @@ static int gv11b_tegra_railgate(struct device *dev)
130{ 128{
131#ifdef TEGRA194_POWER_DOMAIN_GPU 129#ifdef TEGRA194_POWER_DOMAIN_GPU
132 struct gk20a_platform *platform = gk20a_get_platform(dev); 130 struct gk20a_platform *platform = gk20a_get_platform(dev);
133 struct gk20a_scale_profile *profile = platform->g->scale_profile;
134 struct gk20a *g = get_gk20a(dev); 131 struct gk20a *g = get_gk20a(dev);
135 int i; 132 int i;
136 133
137 /* remove emc frequency floor */
138 if (profile)
139 tegra_bwmgr_set_emc(
140 (struct tegra_bwmgr_client *)profile->private_data,
141 0, TEGRA_BWMGR_SET_EMC_FLOOR);
142
143 if (tegra_bpmp_running()) { 134 if (tegra_bpmp_running()) {
144 nvgpu_log(g, gpu_dbg_info, "bpmp running"); 135 nvgpu_log(g, gpu_dbg_info, "bpmp running");
145 if (!tegra_powergate_is_powered(TEGRA194_POWER_DOMAIN_GPU)) { 136 if (!tegra_powergate_is_powered(TEGRA194_POWER_DOMAIN_GPU)) {
@@ -166,7 +157,6 @@ static int gv11b_tegra_unrailgate(struct device *dev)
166#ifdef TEGRA194_POWER_DOMAIN_GPU 157#ifdef TEGRA194_POWER_DOMAIN_GPU
167 struct gk20a_platform *platform = gk20a_get_platform(dev); 158 struct gk20a_platform *platform = gk20a_get_platform(dev);
168 struct gk20a *g = get_gk20a(dev); 159 struct gk20a *g = get_gk20a(dev);
169 struct gk20a_scale_profile *profile = platform->g->scale_profile;
170 int i; 160 int i;
171 161
172 if (tegra_bpmp_running()) { 162 if (tegra_bpmp_running()) {
@@ -185,13 +175,6 @@ static int gv11b_tegra_unrailgate(struct device *dev)
185 } else { 175 } else {
186 nvgpu_log(g, gpu_dbg_info, "bpmp not running"); 176 nvgpu_log(g, gpu_dbg_info, "bpmp not running");
187 } 177 }
188
189 /* to start with set emc frequency floor to max rate*/
190 if (profile)
191 tegra_bwmgr_set_emc(
192 (struct tegra_bwmgr_client *)profile->private_data,
193 tegra_bwmgr_get_max_emc_rate(),
194 TEGRA_BWMGR_SET_EMC_FLOOR);
195#endif 178#endif
196 return ret; 179 return ret;
197} 180}
@@ -215,7 +198,6 @@ struct gk20a_platform gv11b_tegra_platform = {
215 .ch_wdt_timeout_ms = 5000, 198 .ch_wdt_timeout_ms = 5000,
216 199
217 .probe = gv11b_tegra_probe, 200 .probe = gv11b_tegra_probe,
218 .late_probe = gp10b_tegra_late_probe,
219 .remove = gv11b_tegra_remove, 201 .remove = gv11b_tegra_remove,
220 202
221 .enable_slcg = false, 203 .enable_slcg = false,
@@ -235,16 +217,6 @@ struct gk20a_platform gv11b_tegra_platform = {
235 .busy = gk20a_tegra_busy, 217 .busy = gk20a_tegra_busy,
236 .idle = gk20a_tegra_idle, 218 .idle = gk20a_tegra_idle,
237 219
238 .clk_round_rate = gp10b_round_clk_rate,
239 .get_clk_freqs = gp10b_clk_get_freqs,
240
241 /* frequency scaling configuration */
242 .prescale = gp10b_tegra_prescale,
243 .postscale = gp10b_tegra_postscale,
244 .devfreq_governor = "nvhost_podgov",
245
246 .qos_notify = gk20a_scale_qos_notify,
247
248 .dump_platform_dependencies = gk20a_tegra_debug_dump, 220 .dump_platform_dependencies = gk20a_tegra_debug_dump,
249 221
250 .soc_name = "tegra19x", 222 .soc_name = "tegra19x",
diff --git a/drivers/gpu/nvgpu/gp10b/platform_gp10b.h b/drivers/gpu/nvgpu/gp10b/platform_gp10b.h
index 35fb5bb5..0791c2fe 100644
--- a/drivers/gpu/nvgpu/gp10b/platform_gp10b.h
+++ b/drivers/gpu/nvgpu/gp10b/platform_gp10b.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * GP10B Platform (SoC) Interface 2 * GP10B Platform (SoC) Interface
3 * 3 *
4 * Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved. 4 * Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved.
5 * 5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a 6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"), 7 * copy of this software and associated documentation files (the "Software"),
@@ -30,10 +30,5 @@ struct device;
30int gp10b_tegra_get_clocks(struct device *dev); 30int gp10b_tegra_get_clocks(struct device *dev);
31int gp10b_tegra_reset_assert(struct device *dev); 31int gp10b_tegra_reset_assert(struct device *dev);
32int gp10b_tegra_reset_deassert(struct device *dev); 32int gp10b_tegra_reset_deassert(struct device *dev);
33long gp10b_round_clk_rate(struct device *dev, unsigned long rate); 33
34int gp10b_clk_get_freqs(struct device *dev,
35 unsigned long **freqs, int *num_freqs);
36void gp10b_tegra_prescale(struct device *dev);
37void gp10b_tegra_postscale(struct device *pdev, unsigned long freq);
38int gp10b_tegra_late_probe(struct device *dev);
39#endif 34#endif