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authorThomas Fleury <tfleury@nvidia.com>2017-10-23 18:52:00 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-11-06 16:40:59 -0500
commit13093eff52d0ef9071bb09cade01ea064c99468d (patch)
tree3fb71377826a4280fbfdee74957fbae06417bcf9
parent8bdce5337ee5f4d1e1f6d4c7b2dc0abe4a532893 (diff)
gpu: nvgpu: add g cross reference in boardobjgrp
Added a pointer to GPU context in boardobjgrp, and updated constructors. It will be useful to free allocated DMA resources. JIRA EVLR-1959 Bug 200352099 Change-Id: I006e4f970c9a2525dabdfd6ad417be64e36b7b68 Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1586551 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
-rw-r--r--drivers/gpu/nvgpu/boardobj/boardobjgrp.c15
-rw-r--r--drivers/gpu/nvgpu/boardobj/boardobjgrp.h6
-rw-r--r--drivers/gpu/nvgpu/boardobj/boardobjgrp_e255.c5
-rw-r--r--drivers/gpu/nvgpu/boardobj/boardobjgrp_e255.h2
-rw-r--r--drivers/gpu/nvgpu/boardobj/boardobjgrp_e32.c5
-rw-r--r--drivers/gpu/nvgpu/boardobj/boardobjgrp_e32.h2
-rw-r--r--drivers/gpu/nvgpu/clk/clk_domain.c2
-rw-r--r--drivers/gpu/nvgpu/clk/clk_fll.c2
-rw-r--r--drivers/gpu/nvgpu/clk/clk_freq_controller.c2
-rw-r--r--drivers/gpu/nvgpu/clk/clk_prog.c2
-rw-r--r--drivers/gpu/nvgpu/clk/clk_vf_point.c2
-rw-r--r--drivers/gpu/nvgpu/clk/clk_vin.c2
-rw-r--r--drivers/gpu/nvgpu/perf/vfe_equ.c2
-rw-r--r--drivers/gpu/nvgpu/perf/vfe_var.c2
-rw-r--r--drivers/gpu/nvgpu/pmgr/pwrdev.c2
-rw-r--r--drivers/gpu/nvgpu/pmgr/pwrmonitor.c6
-rw-r--r--drivers/gpu/nvgpu/pmgr/pwrpolicy.c12
-rw-r--r--drivers/gpu/nvgpu/pstate/pstate.c2
-rw-r--r--drivers/gpu/nvgpu/therm/thrmchannel.c3
-rw-r--r--drivers/gpu/nvgpu/therm/thrmdev.c3
-rw-r--r--drivers/gpu/nvgpu/volt/volt_dev.c4
-rw-r--r--drivers/gpu/nvgpu/volt/volt_policy.c2
-rw-r--r--drivers/gpu/nvgpu/volt/volt_rail.c4
23 files changed, 50 insertions, 39 deletions
diff --git a/drivers/gpu/nvgpu/boardobj/boardobjgrp.c b/drivers/gpu/nvgpu/boardobj/boardobjgrp.c
index e03dbe8d..66c87e08 100644
--- a/drivers/gpu/nvgpu/boardobj/boardobjgrp.c
+++ b/drivers/gpu/nvgpu/boardobj/boardobjgrp.c
@@ -44,7 +44,7 @@ struct boardobjgrp_pmucmdhandler_params {
44 u32 success; 44 u32 success;
45}; 45};
46 46
47u32 boardobjgrp_construct_super(struct boardobjgrp *pboardobjgrp) 47u32 boardobjgrp_construct_super(struct gk20a *g, struct boardobjgrp *pboardobjgrp)
48{ 48{
49 gk20a_dbg_info(""); 49 gk20a_dbg_info("");
50 50
@@ -57,6 +57,7 @@ u32 boardobjgrp_construct_super(struct boardobjgrp *pboardobjgrp)
57 if (pboardobjgrp->mask == NULL) 57 if (pboardobjgrp->mask == NULL)
58 return -EINVAL; 58 return -EINVAL;
59 59
60 pboardobjgrp->g = g;
60 pboardobjgrp->objmask = 0; 61 pboardobjgrp->objmask = 0;
61 62
62 pboardobjgrp->classid = 0; 63 pboardobjgrp->classid = 0;
@@ -104,6 +105,7 @@ u32 boardobjgrp_destruct_impl(struct boardobjgrp *pboardobjgrp)
104u32 boardobjgrp_destruct_super(struct boardobjgrp *pboardobjgrp) 105u32 boardobjgrp_destruct_super(struct boardobjgrp *pboardobjgrp)
105{ 106{
106 struct boardobj *pboardobj; 107 struct boardobj *pboardobj;
108 struct gk20a *g = pboardobjgrp->g;
107 u32 status = 0; 109 u32 status = 0;
108 u32 stat; 110 u32 stat;
109 u8 index; 111 u8 index;
@@ -134,11 +136,11 @@ u32 boardobjgrp_destruct_super(struct boardobjgrp *pboardobjgrp)
134 } 136 }
135 137
136 /* Destroy the PMU CMD data */ 138 /* Destroy the PMU CMD data */
137 stat = boardobjgrp_pmucmd_destroy_impl(&pboardobjgrp->pmu.set); 139 stat = boardobjgrp_pmucmd_destroy_impl(g, &pboardobjgrp->pmu.set);
138 if (status == 0) 140 if (status == 0)
139 status = stat; 141 status = stat;
140 142
141 stat = boardobjgrp_pmucmd_destroy_impl(&pboardobjgrp->pmu.getstatus); 143 stat = boardobjgrp_pmucmd_destroy_impl(g, &pboardobjgrp->pmu.getstatus);
142 if (status == 0) 144 if (status == 0)
143 status = stat; 145 status = stat;
144 146
@@ -163,9 +165,12 @@ u32 boardobjgrp_pmucmd_construct_impl(struct gk20a *g, struct boardobjgrp
163 return 0; 165 return 0;
164} 166}
165 167
166 168u32 boardobjgrp_pmucmd_destroy_impl(struct gk20a *g,
167u32 boardobjgrp_pmucmd_destroy_impl(struct boardobjgrp_pmu_cmd *cmd) 169 struct boardobjgrp_pmu_cmd *cmd)
168{ 170{
171 struct nvgpu_mem *mem = &cmd->surf.sysmem_desc;
172
173 nvgpu_pmu_surface_free(g, mem);
169 return 0; 174 return 0;
170} 175}
171 176
diff --git a/drivers/gpu/nvgpu/boardobj/boardobjgrp.h b/drivers/gpu/nvgpu/boardobj/boardobjgrp.h
index c7840e02..14d7c1bb 100644
--- a/drivers/gpu/nvgpu/boardobj/boardobjgrp.h
+++ b/drivers/gpu/nvgpu/boardobj/boardobjgrp.h
@@ -153,7 +153,8 @@ typedef u32 boardobjgrp_pmucmd_construct(struct gk20a *g,
153/* 153/*
154* Destroys BOARDOBJGRP PMU SW state. CMD. 154* Destroys BOARDOBJGRP PMU SW state. CMD.
155*/ 155*/
156typedef u32 boardobjgrp_pmucmd_destroy(struct boardobjgrp_pmu_cmd *cmd); 156typedef u32 boardobjgrp_pmucmd_destroy(struct gk20a *g,
157 struct boardobjgrp_pmu_cmd *cmd);
157 158
158/* 159/*
159* init handler for the BOARDOBJGRP PMU CMD. Allocates and maps the 160* init handler for the BOARDOBJGRP PMU CMD. Allocates and maps the
@@ -171,6 +172,7 @@ typedef u32 boardobjgrp_pmucmd_pmuinithandle(struct gk20a *g,
171* device group or device-type. 172* device group or device-type.
172*/ 173*/
173struct boardobjgrp { 174struct boardobjgrp {
175 struct gk20a *g;
174 u32 objmask; 176 u32 objmask;
175 bool bconstructed; 177 bool bconstructed;
176 u8 type; 178 u8 type;
@@ -336,7 +338,7 @@ do { \
336 338
337/* ------------------------ Function Prototypes ----------------------------- */ 339/* ------------------------ Function Prototypes ----------------------------- */
338/* Constructor and destructor */ 340/* Constructor and destructor */
339u32 boardobjgrp_construct_super(struct boardobjgrp *pboardobjgrp); 341u32 boardobjgrp_construct_super(struct gk20a *g, struct boardobjgrp *pboardobjgrp);
340boardobjgrp_destruct boardobjgrp_destruct_impl; 342boardobjgrp_destruct boardobjgrp_destruct_impl;
341boardobjgrp_destruct boardobjgrp_destruct_super; 343boardobjgrp_destruct boardobjgrp_destruct_super;
342 344
diff --git a/drivers/gpu/nvgpu/boardobj/boardobjgrp_e255.c b/drivers/gpu/nvgpu/boardobj/boardobjgrp_e255.c
index 787f205b..a6223e9a 100644
--- a/drivers/gpu/nvgpu/boardobj/boardobjgrp_e255.c
+++ b/drivers/gpu/nvgpu/boardobj/boardobjgrp_e255.c
@@ -27,7 +27,8 @@
27#include "boardobjgrp.h" 27#include "boardobjgrp.h"
28#include "boardobjgrpmask.h" 28#include "boardobjgrpmask.h"
29 29
30u32 boardobjgrpconstruct_e255(struct boardobjgrp_e255 *pboardobjgrp_e255) 30u32 boardobjgrpconstruct_e255(struct gk20a *g,
31 struct boardobjgrp_e255 *pboardobjgrp_e255)
31{ 32{
32 u32 status = 0; 33 u32 status = 0;
33 u8 objslots; 34 u8 objslots;
@@ -44,7 +45,7 @@ u32 boardobjgrpconstruct_e255(struct boardobjgrp_e255 *pboardobjgrp_e255)
44 pboardobjgrp_e255->super.objslots = objslots; 45 pboardobjgrp_e255->super.objslots = objslots;
45 pboardobjgrp_e255->super.mask = &(pboardobjgrp_e255->mask.super); 46 pboardobjgrp_e255->super.mask = &(pboardobjgrp_e255->mask.super);
46 47
47 status = boardobjgrp_construct_super(&pboardobjgrp_e255->super); 48 status = boardobjgrp_construct_super(g, &pboardobjgrp_e255->super);
48 if (status) 49 if (status)
49 goto boardobjgrpconstruct_e255_exit; 50 goto boardobjgrpconstruct_e255_exit;
50 51
diff --git a/drivers/gpu/nvgpu/boardobj/boardobjgrp_e255.h b/drivers/gpu/nvgpu/boardobj/boardobjgrp_e255.h
index fa33d557..76aa902a 100644
--- a/drivers/gpu/nvgpu/boardobj/boardobjgrp_e255.h
+++ b/drivers/gpu/nvgpu/boardobj/boardobjgrp_e255.h
@@ -43,7 +43,7 @@ struct boardobjgrp_e255 {
43 boardobjgrp_pmudatainit_super(g, pboardpbjgrp, pboardobjgrppmu) 43 boardobjgrp_pmudatainit_super(g, pboardpbjgrp, pboardobjgrppmu)
44 44
45/* Constructor and destructor */ 45/* Constructor and destructor */
46u32 boardobjgrpconstruct_e255(struct boardobjgrp_e255 *pboardobjgrp); 46u32 boardobjgrpconstruct_e255(struct gk20a *g, struct boardobjgrp_e255 *pboardobjgrp);
47boardobjgrp_destruct boardobjgrpdestruct_e255; 47boardobjgrp_destruct boardobjgrpdestruct_e255;
48boardobjgrp_pmuhdrdatainit boardobjgrp_pmuhdrdatainit_e255; 48boardobjgrp_pmuhdrdatainit boardobjgrp_pmuhdrdatainit_e255;
49 49
diff --git a/drivers/gpu/nvgpu/boardobj/boardobjgrp_e32.c b/drivers/gpu/nvgpu/boardobj/boardobjgrp_e32.c
index 0a34d563..53380e95 100644
--- a/drivers/gpu/nvgpu/boardobj/boardobjgrp_e32.c
+++ b/drivers/gpu/nvgpu/boardobj/boardobjgrp_e32.c
@@ -28,7 +28,8 @@
28#include "boardobjgrpmask.h" 28#include "boardobjgrpmask.h"
29 29
30 30
31u32 boardobjgrpconstruct_e32(struct boardobjgrp_e32 *pboardobjgrp_e32) 31u32 boardobjgrpconstruct_e32(struct gk20a *g,
32 struct boardobjgrp_e32 *pboardobjgrp_e32)
32{ 33{
33 u32 status; 34 u32 status;
34 u8 objslots; 35 u8 objslots;
@@ -45,7 +46,7 @@ u32 boardobjgrpconstruct_e32(struct boardobjgrp_e32 *pboardobjgrp_e32)
45 pboardobjgrp_e32->super.objslots = objslots; 46 pboardobjgrp_e32->super.objslots = objslots;
46 pboardobjgrp_e32->super.mask = &(pboardobjgrp_e32->mask.super); 47 pboardobjgrp_e32->super.mask = &(pboardobjgrp_e32->mask.super);
47 48
48 status = boardobjgrp_construct_super(&pboardobjgrp_e32->super); 49 status = boardobjgrp_construct_super(g, &pboardobjgrp_e32->super);
49 if (status) 50 if (status)
50 goto boardobjgrpconstruct_e32_exit; 51 goto boardobjgrpconstruct_e32_exit;
51 52
diff --git a/drivers/gpu/nvgpu/boardobj/boardobjgrp_e32.h b/drivers/gpu/nvgpu/boardobj/boardobjgrp_e32.h
index 674d351a..97c737a5 100644
--- a/drivers/gpu/nvgpu/boardobj/boardobjgrp_e32.h
+++ b/drivers/gpu/nvgpu/boardobj/boardobjgrp_e32.h
@@ -58,7 +58,7 @@ struct boardobjgrp_e32 {
58 boardobjgrp_pmudatainit_super(g, pboardpbjgrp, pboardobjgrppmu) 58 boardobjgrp_pmudatainit_super(g, pboardpbjgrp, pboardobjgrppmu)
59 59
60/* Constructor and destructor */ 60/* Constructor and destructor */
61u32 boardobjgrpconstruct_e32(struct boardobjgrp_e32 *pboardobjgrp); 61u32 boardobjgrpconstruct_e32(struct gk20a *g, struct boardobjgrp_e32 *pboardobjgrp);
62boardobjgrp_destruct boardobjgrpdestruct_e32; 62boardobjgrp_destruct boardobjgrpdestruct_e32;
63boardobjgrp_pmuhdrdatainit boardobjgrp_pmuhdrdatainit_e32; 63boardobjgrp_pmuhdrdatainit boardobjgrp_pmuhdrdatainit_e32;
64 64
diff --git a/drivers/gpu/nvgpu/clk/clk_domain.c b/drivers/gpu/nvgpu/clk/clk_domain.c
index 5527351e..dbbf4d4a 100644
--- a/drivers/gpu/nvgpu/clk/clk_domain.c
+++ b/drivers/gpu/nvgpu/clk/clk_domain.c
@@ -149,7 +149,7 @@ u32 clk_domain_sw_setup(struct gk20a *g)
149 149
150 gk20a_dbg_info(""); 150 gk20a_dbg_info("");
151 151
152 status = boardobjgrpconstruct_e32(&g->clk_pmu.clk_domainobjs.super); 152 status = boardobjgrpconstruct_e32(g, &g->clk_pmu.clk_domainobjs.super);
153 if (status) { 153 if (status) {
154 nvgpu_err(g, 154 nvgpu_err(g,
155 "error creating boardobjgrp for clk domain, status - 0x%x", 155 "error creating boardobjgrp for clk domain, status - 0x%x",
diff --git a/drivers/gpu/nvgpu/clk/clk_fll.c b/drivers/gpu/nvgpu/clk/clk_fll.c
index d06cac42..2f05448f 100644
--- a/drivers/gpu/nvgpu/clk/clk_fll.c
+++ b/drivers/gpu/nvgpu/clk/clk_fll.c
@@ -124,7 +124,7 @@ u32 clk_fll_sw_setup(struct gk20a *g)
124 124
125 gk20a_dbg_info(""); 125 gk20a_dbg_info("");
126 126
127 status = boardobjgrpconstruct_e32(&g->clk_pmu.avfs_fllobjs.super); 127 status = boardobjgrpconstruct_e32(g, &g->clk_pmu.avfs_fllobjs.super);
128 if (status) { 128 if (status) {
129 nvgpu_err(g, 129 nvgpu_err(g,
130 "error creating boardobjgrp for fll, status - 0x%x", status); 130 "error creating boardobjgrp for fll, status - 0x%x", status);
diff --git a/drivers/gpu/nvgpu/clk/clk_freq_controller.c b/drivers/gpu/nvgpu/clk/clk_freq_controller.c
index e7859198..f5c1e929 100644
--- a/drivers/gpu/nvgpu/clk/clk_freq_controller.c
+++ b/drivers/gpu/nvgpu/clk/clk_freq_controller.c
@@ -398,7 +398,7 @@ u32 clk_freq_controller_sw_setup(struct gk20a *g)
398 gk20a_dbg_info(""); 398 gk20a_dbg_info("");
399 399
400 pclk_freq_controllers = &g->clk_pmu.clk_freq_controllers; 400 pclk_freq_controllers = &g->clk_pmu.clk_freq_controllers;
401 status = boardobjgrpconstruct_e32(&pclk_freq_controllers->super); 401 status = boardobjgrpconstruct_e32(g, &pclk_freq_controllers->super);
402 if (status) { 402 if (status) {
403 nvgpu_err(g, 403 nvgpu_err(g,
404 "error creating boardobjgrp for clk FCT, status - 0x%x", 404 "error creating boardobjgrp for clk FCT, status - 0x%x",
diff --git a/drivers/gpu/nvgpu/clk/clk_prog.c b/drivers/gpu/nvgpu/clk/clk_prog.c
index 6df172aa..6b5315b4 100644
--- a/drivers/gpu/nvgpu/clk/clk_prog.c
+++ b/drivers/gpu/nvgpu/clk/clk_prog.c
@@ -93,7 +93,7 @@ u32 clk_prog_sw_setup(struct gk20a *g)
93 93
94 gk20a_dbg_info(""); 94 gk20a_dbg_info("");
95 95
96 status = boardobjgrpconstruct_e255(&g->clk_pmu.clk_progobjs.super); 96 status = boardobjgrpconstruct_e255(g, &g->clk_pmu.clk_progobjs.super);
97 if (status) { 97 if (status) {
98 nvgpu_err(g, 98 nvgpu_err(g,
99 "error creating boardobjgrp for clk prog, status - 0x%x", 99 "error creating boardobjgrp for clk prog, status - 0x%x",
diff --git a/drivers/gpu/nvgpu/clk/clk_vf_point.c b/drivers/gpu/nvgpu/clk/clk_vf_point.c
index c109d9f1..49327698 100644
--- a/drivers/gpu/nvgpu/clk/clk_vf_point.c
+++ b/drivers/gpu/nvgpu/clk/clk_vf_point.c
@@ -97,7 +97,7 @@ u32 clk_vf_point_sw_setup(struct gk20a *g)
97 97
98 gk20a_dbg_info(""); 98 gk20a_dbg_info("");
99 99
100 status = boardobjgrpconstruct_e255(&g->clk_pmu.clk_vf_pointobjs.super); 100 status = boardobjgrpconstruct_e255(g, &g->clk_pmu.clk_vf_pointobjs.super);
101 if (status) { 101 if (status) {
102 nvgpu_err(g, 102 nvgpu_err(g,
103 "error creating boardobjgrp for clk vfpoint, status - 0x%x", 103 "error creating boardobjgrp for clk vfpoint, status - 0x%x",
diff --git a/drivers/gpu/nvgpu/clk/clk_vin.c b/drivers/gpu/nvgpu/clk/clk_vin.c
index b529fe72..17e1c15a 100644
--- a/drivers/gpu/nvgpu/clk/clk_vin.c
+++ b/drivers/gpu/nvgpu/clk/clk_vin.c
@@ -257,7 +257,7 @@ u32 clk_vin_sw_setup(struct gk20a *g)
257 257
258 gk20a_dbg_info(""); 258 gk20a_dbg_info("");
259 259
260 status = boardobjgrpconstruct_e32(&g->clk_pmu.avfs_vinobjs.super); 260 status = boardobjgrpconstruct_e32(g, &g->clk_pmu.avfs_vinobjs.super);
261 if (status) { 261 if (status) {
262 nvgpu_err(g, 262 nvgpu_err(g,
263 "error creating boardobjgrp for clk vin, statu - 0x%x", 263 "error creating boardobjgrp for clk vin, statu - 0x%x",
diff --git a/drivers/gpu/nvgpu/perf/vfe_equ.c b/drivers/gpu/nvgpu/perf/vfe_equ.c
index c712c0aa..2493061e 100644
--- a/drivers/gpu/nvgpu/perf/vfe_equ.c
+++ b/drivers/gpu/nvgpu/perf/vfe_equ.c
@@ -79,7 +79,7 @@ u32 vfe_equ_sw_setup(struct gk20a *g)
79 79
80 gk20a_dbg_info(""); 80 gk20a_dbg_info("");
81 81
82 status = boardobjgrpconstruct_e255(&g->perf_pmu.vfe_equobjs.super); 82 status = boardobjgrpconstruct_e255(g, &g->perf_pmu.vfe_equobjs.super);
83 if (status) { 83 if (status) {
84 nvgpu_err(g, 84 nvgpu_err(g,
85 "error creating boardobjgrp for clk domain, status - 0x%x", 85 "error creating boardobjgrp for clk domain, status - 0x%x",
diff --git a/drivers/gpu/nvgpu/perf/vfe_var.c b/drivers/gpu/nvgpu/perf/vfe_var.c
index a8275331..c46747c9 100644
--- a/drivers/gpu/nvgpu/perf/vfe_var.c
+++ b/drivers/gpu/nvgpu/perf/vfe_var.c
@@ -106,7 +106,7 @@ u32 vfe_var_sw_setup(struct gk20a *g)
106 106
107 gk20a_dbg_info(""); 107 gk20a_dbg_info("");
108 108
109 status = boardobjgrpconstruct_e32(&g->perf_pmu.vfe_varobjs.super); 109 status = boardobjgrpconstruct_e32(g, &g->perf_pmu.vfe_varobjs.super);
110 if (status) { 110 if (status) {
111 nvgpu_err(g, 111 nvgpu_err(g,
112 "error creating boardobjgrp for clk domain, status - 0x%x", 112 "error creating boardobjgrp for clk domain, status - 0x%x",
diff --git a/drivers/gpu/nvgpu/pmgr/pwrdev.c b/drivers/gpu/nvgpu/pmgr/pwrdev.c
index 97b236e1..7f4ab716 100644
--- a/drivers/gpu/nvgpu/pmgr/pwrdev.c
+++ b/drivers/gpu/nvgpu/pmgr/pwrdev.c
@@ -291,7 +291,7 @@ u32 pmgr_device_sw_setup(struct gk20a *g)
291 struct pwr_devices *ppwrdeviceobjs; 291 struct pwr_devices *ppwrdeviceobjs;
292 292
293 /* Construct the Super Class and override the Interfaces */ 293 /* Construct the Super Class and override the Interfaces */
294 status = boardobjgrpconstruct_e32(&g->pmgr_pmu.pmgr_deviceobjs.super); 294 status = boardobjgrpconstruct_e32(g, &g->pmgr_pmu.pmgr_deviceobjs.super);
295 if (status) { 295 if (status) {
296 nvgpu_err(g, 296 nvgpu_err(g,
297 "error creating boardobjgrp for pmgr devices, status - 0x%x", 297 "error creating boardobjgrp for pmgr devices, status - 0x%x",
diff --git a/drivers/gpu/nvgpu/pmgr/pwrmonitor.c b/drivers/gpu/nvgpu/pmgr/pwrmonitor.c
index 211766eb..00c930a6 100644
--- a/drivers/gpu/nvgpu/pmgr/pwrmonitor.c
+++ b/drivers/gpu/nvgpu/pmgr/pwrmonitor.c
@@ -305,8 +305,8 @@ u32 pmgr_monitor_sw_setup(struct gk20a *g)
305 u8 indx = 0; 305 u8 indx = 0;
306 306
307 /* Construct the Super Class and override the Interfaces */ 307 /* Construct the Super Class and override the Interfaces */
308 status = boardobjgrpconstruct_e32( 308 status = boardobjgrpconstruct_e32(g,
309 &g->pmgr_pmu.pmgr_monitorobjs.pwr_channels); 309 &g->pmgr_pmu.pmgr_monitorobjs.pwr_channels);
310 if (status) { 310 if (status) {
311 nvgpu_err(g, 311 nvgpu_err(g,
312 "error creating boardobjgrp for pmgr channel, status - 0x%x", 312 "error creating boardobjgrp for pmgr channel, status - 0x%x",
@@ -320,7 +320,7 @@ u32 pmgr_monitor_sw_setup(struct gk20a *g)
320 pboardobjgrp->pmudatainstget = _pwr_channel_pmudata_instget; 320 pboardobjgrp->pmudatainstget = _pwr_channel_pmudata_instget;
321 321
322 /* Construct the Super Class and override the Interfaces */ 322 /* Construct the Super Class and override the Interfaces */
323 status = boardobjgrpconstruct_e32( 323 status = boardobjgrpconstruct_e32(g,
324 &g->pmgr_pmu.pmgr_monitorobjs.pwr_ch_rels); 324 &g->pmgr_pmu.pmgr_monitorobjs.pwr_ch_rels);
325 if (status) { 325 if (status) {
326 nvgpu_err(g, 326 nvgpu_err(g,
diff --git a/drivers/gpu/nvgpu/pmgr/pwrpolicy.c b/drivers/gpu/nvgpu/pmgr/pwrpolicy.c
index 5eade2e0..420eda4f 100644
--- a/drivers/gpu/nvgpu/pmgr/pwrpolicy.c
+++ b/drivers/gpu/nvgpu/pmgr/pwrpolicy.c
@@ -718,8 +718,8 @@ u32 pmgr_policy_sw_setup(struct gk20a *g)
718 u8 indx = 0; 718 u8 indx = 0;
719 719
720 /* Construct the Super Class and override the Interfaces */ 720 /* Construct the Super Class and override the Interfaces */
721 status = boardobjgrpconstruct_e32( 721 status = boardobjgrpconstruct_e32(g,
722 &g->pmgr_pmu.pmgr_policyobjs.pwr_policies); 722 &g->pmgr_pmu.pmgr_policyobjs.pwr_policies);
723 if (status) { 723 if (status) {
724 nvgpu_err(g, 724 nvgpu_err(g,
725 "error creating boardobjgrp for pmgr policy, status - 0x%x", 725 "error creating boardobjgrp for pmgr policy, status - 0x%x",
@@ -727,8 +727,8 @@ u32 pmgr_policy_sw_setup(struct gk20a *g)
727 goto done; 727 goto done;
728 } 728 }
729 729
730 status = boardobjgrpconstruct_e32( 730 status = boardobjgrpconstruct_e32(g,
731 &g->pmgr_pmu.pmgr_policyobjs.pwr_policy_rels); 731 &g->pmgr_pmu.pmgr_policyobjs.pwr_policy_rels);
732 if (status) { 732 if (status) {
733 nvgpu_err(g, 733 nvgpu_err(g,
734 "error creating boardobjgrp for pmgr policy rels, status - 0x%x", 734 "error creating boardobjgrp for pmgr policy rels, status - 0x%x",
@@ -736,8 +736,8 @@ u32 pmgr_policy_sw_setup(struct gk20a *g)
736 goto done; 736 goto done;
737 } 737 }
738 738
739 status = boardobjgrpconstruct_e32( 739 status = boardobjgrpconstruct_e32(g,
740 &g->pmgr_pmu.pmgr_policyobjs.pwr_violations); 740 &g->pmgr_pmu.pmgr_policyobjs.pwr_violations);
741 if (status) { 741 if (status) {
742 nvgpu_err(g, 742 nvgpu_err(g,
743 "error creating boardobjgrp for pmgr violations, status - 0x%x", 743 "error creating boardobjgrp for pmgr violations, status - 0x%x",
diff --git a/drivers/gpu/nvgpu/pstate/pstate.c b/drivers/gpu/nvgpu/pstate/pstate.c
index 937756d3..e164cc83 100644
--- a/drivers/gpu/nvgpu/pstate/pstate.c
+++ b/drivers/gpu/nvgpu/pstate/pstate.c
@@ -363,7 +363,7 @@ static int pstate_sw_setup(struct gk20a *g)
363 if (err) 363 if (err)
364 return err; 364 return err;
365 365
366 err = boardobjgrpconstruct_e32(&g->perf_pmu.pstatesobjs.super); 366 err = boardobjgrpconstruct_e32(g, &g->perf_pmu.pstatesobjs.super);
367 if (err) { 367 if (err) {
368 nvgpu_err(g, 368 nvgpu_err(g,
369 "error creating boardobjgrp for pstates, err=%d", 369 "error creating boardobjgrp for pstates, err=%d",
diff --git a/drivers/gpu/nvgpu/therm/thrmchannel.c b/drivers/gpu/nvgpu/therm/thrmchannel.c
index dd2f7cb3..f8be8430 100644
--- a/drivers/gpu/nvgpu/therm/thrmchannel.c
+++ b/drivers/gpu/nvgpu/therm/thrmchannel.c
@@ -217,7 +217,8 @@ u32 therm_channel_sw_setup(struct gk20a *g)
217 struct therm_channels *pthermchannelobjs; 217 struct therm_channels *pthermchannelobjs;
218 218
219 /* Construct the Super Class and override the Interfaces */ 219 /* Construct the Super Class and override the Interfaces */
220 status = boardobjgrpconstruct_e32(&g->therm_pmu.therm_channelobjs.super); 220 status = boardobjgrpconstruct_e32(g,
221 &g->therm_pmu.therm_channelobjs.super);
221 if (status) { 222 if (status) {
222 nvgpu_err(g, 223 nvgpu_err(g,
223 "error creating boardobjgrp for therm devices, status - 0x%x", 224 "error creating boardobjgrp for therm devices, status - 0x%x",
diff --git a/drivers/gpu/nvgpu/therm/thrmdev.c b/drivers/gpu/nvgpu/therm/thrmdev.c
index 5c416e50..1aff119c 100644
--- a/drivers/gpu/nvgpu/therm/thrmdev.c
+++ b/drivers/gpu/nvgpu/therm/thrmdev.c
@@ -164,7 +164,8 @@ u32 therm_device_sw_setup(struct gk20a *g)
164 struct therm_devices *pthermdeviceobjs; 164 struct therm_devices *pthermdeviceobjs;
165 165
166 /* Construct the Super Class and override the Interfaces */ 166 /* Construct the Super Class and override the Interfaces */
167 status = boardobjgrpconstruct_e32(&g->therm_pmu.therm_deviceobjs.super); 167 status = boardobjgrpconstruct_e32(g,
168 &g->therm_pmu.therm_deviceobjs.super);
168 if (status) { 169 if (status) {
169 nvgpu_err(g, 170 nvgpu_err(g,
170 "error creating boardobjgrp for therm devices, status - 0x%x", 171 "error creating boardobjgrp for therm devices, status - 0x%x",
diff --git a/drivers/gpu/nvgpu/volt/volt_dev.c b/drivers/gpu/nvgpu/volt/volt_dev.c
index 56045868..6ad658b8 100644
--- a/drivers/gpu/nvgpu/volt/volt_dev.c
+++ b/drivers/gpu/nvgpu/volt/volt_dev.c
@@ -527,8 +527,8 @@ u32 volt_dev_sw_setup(struct gk20a *g)
527 527
528 gk20a_dbg_info(""); 528 gk20a_dbg_info("");
529 529
530 status = boardobjgrpconstruct_e32(&g->perf_pmu.volt.volt_dev_metadata. 530 status = boardobjgrpconstruct_e32(g,
531 volt_devices); 531 &g->perf_pmu.volt.volt_dev_metadata.volt_devices);
532 if (status) { 532 if (status) {
533 nvgpu_err(g, 533 nvgpu_err(g,
534 "error creating boardobjgrp for volt rail, status - 0x%x", 534 "error creating boardobjgrp for volt rail, status - 0x%x",
diff --git a/drivers/gpu/nvgpu/volt/volt_policy.c b/drivers/gpu/nvgpu/volt/volt_policy.c
index 92bce87e..1e34b54f 100644
--- a/drivers/gpu/nvgpu/volt/volt_policy.c
+++ b/drivers/gpu/nvgpu/volt/volt_policy.c
@@ -312,7 +312,7 @@ u32 volt_policy_sw_setup(struct gk20a *g)
312 312
313 gk20a_dbg_info(""); 313 gk20a_dbg_info("");
314 314
315 status = boardobjgrpconstruct_e32( 315 status = boardobjgrpconstruct_e32(g,
316 &g->perf_pmu.volt.volt_policy_metadata.volt_policies); 316 &g->perf_pmu.volt.volt_policy_metadata.volt_policies);
317 if (status) { 317 if (status) {
318 nvgpu_err(g, 318 nvgpu_err(g,
diff --git a/drivers/gpu/nvgpu/volt/volt_rail.c b/drivers/gpu/nvgpu/volt/volt_rail.c
index ef9ad19d..f78fc315 100644
--- a/drivers/gpu/nvgpu/volt/volt_rail.c
+++ b/drivers/gpu/nvgpu/volt/volt_rail.c
@@ -375,8 +375,8 @@ u32 volt_rail_sw_setup(struct gk20a *g)
375 375
376 gk20a_dbg_info(""); 376 gk20a_dbg_info("");
377 377
378 status = boardobjgrpconstruct_e32(&g->perf_pmu.volt.volt_rail_metadata. 378 status = boardobjgrpconstruct_e32(g,
379 volt_rails); 379 &g->perf_pmu.volt.volt_rail_metadata.volt_rails);
380 if (status) { 380 if (status) {
381 nvgpu_err(g, 381 nvgpu_err(g,
382 "error creating boardobjgrp for volt rail, status - 0x%x", 382 "error creating boardobjgrp for volt rail, status - 0x%x",