gpu: nvgpu: move clk_arb to linux specific

- Clock arbiter has lot of linux dependent code
so moved clk_arb.c to common/linux folder &
clk_arb.h to include/nvgpu/clk_arb.h, this move
helps to unblock QNX.
- QNX must implement functions present
under clk_arb.h as needed.

JIRA NVGPU-33

Change-Id: I38369fafda9c2cb9ba2175b3e530e40d0c746601
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1582473
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

7 files changed, 33 insertions, 24 deletions

diff --git a/drivers/gpu/nvgpu/Makefile.nvgpu b/drivers/gpu/nvgpu/Makefile.nvgpu
index e689aa7f..1217fead 100644
--- a/drivers/gpu/nvgpu/Makefile.nvgpu
+++ b/drivers/gpu/nvgpu/Makefile.nvgpu
@@ -221,7 +221,7 @@ nvgpu-y += \
         clk/clk_domain.o \
         clk/clk_prog.o \
         clk/clk_vf_point.o \
-        clk/clk_arb.o \
+        common/linux/clk_arb.o \
         clk/clk_freq_controller.o \
         perf/vfe_var.o \
         perf/vfe_equ.o \
diff --git a/drivers/gpu/nvgpu/clk/clk_arb.c b/drivers/gpu/nvgpu/common/linux/clk_arb.c
index 937d47db..ff26f567 100644
--- a/drivers/gpu/nvgpu/clk/clk_arb.c
+++ b/drivers/gpu/nvgpu/common/linux/clk_arb.c
@@ -41,9 +41,13 @@
 #include <nvgpu/log.h>
 #include <nvgpu/barrier.h>
 #include <nvgpu/cond.h>
+#include <nvgpu/clk_arb.h>
 
 #include "gk20a/gk20a.h"
-#include "clk/clk_arb.h"
+#include "clk/clk.h"
+#include "pstate/pstate.h"
+#include "lpwr/lpwr.h"
+#include "volt/volt.h"
 
 #ifdef CONFIG_DEBUG_FS
 #include "common/linux/os_linux.h"
@@ -499,7 +503,8 @@ void nvgpu_clk_arb_cleanup_arbiter(struct gk20a *g)
                 nvgpu_kfree(g, arb->mclk_f_points);
 
                 for (index = 0; index < 2; index++) {
-                        nvgpu_kfree(g, arb->vf_table_pool[index].gpc2clk_points);
+                        nvgpu_kfree(g,
+                                arb->vf_table_pool[index].gpc2clk_points);
                         nvgpu_kfree(g, arb->vf_table_pool[index].mclk_points);
                 }
                 nvgpu_mutex_destroy(&g->clk_arb->pstate_lock);
@@ -590,7 +595,8 @@ int nvgpu_clk_arb_init_session(struct gk20a *g,
         session->zombie = false;
         session->target_pool[0].pstate = CTRL_PERF_PSTATE_P8;
         /* make sure that the initialization of the pool is visible
-         * before the update */
+         * before the update
+         */
         nvgpu_smp_wmb();
         session->target = &session->target_pool[0];
 
@@ -893,6 +899,7 @@ static int nvgpu_clk_arb_update_vf_table(struct nvgpu_clk_arb *arb)
         for (i = 0, j = 0; i < table->gpc2clk_num_points; i++) {
 
                 u16 alt_gpc2clk = table->gpc2clk_points[i].gpc_mhz;
+
                 gpc2clk_voltuv = gpc2clk_voltuv_sram = 0;
 
                 /* Check sysclk */
@@ -918,9 +925,9 @@ static int nvgpu_clk_arb_update_vf_table(struct nvgpu_clk_arb *arb)
 
                                         alt_gpc2clk = alt_gpc2clk <
                                                 table->gpc2clk_points[j].
-                                                                gpc_mhz ?
+                                                        gpc_mhz ?
                                                 table->gpc2clk_points[j].
-                                                                        gpc_mhz:
+                                                        gpc_mhz :
                                                 alt_gpc2clk;
                                         break;
                                 }
@@ -954,9 +961,9 @@ static int nvgpu_clk_arb_update_vf_table(struct nvgpu_clk_arb *arb)
 
                                         alt_gpc2clk = alt_gpc2clk <
                                                 table->gpc2clk_points[j].
-                                                                gpc_mhz ?
+                                                        gpc_mhz ?
                                                 table->gpc2clk_points[j].
-                                                                        gpc_mhz:
+                                                        gpc_mhz :
                                                 alt_gpc2clk;
                                         break;
                                 }
@@ -1010,6 +1017,7 @@ exit_vf_table:
 void nvgpu_clk_arb_schedule_vf_table_update(struct gk20a *g)
 {
         struct nvgpu_clk_arb *arb = g->clk_arb;
+
         if (arb->vf_table_work_queue)
                 queue_work(arb->vf_table_work_queue, &arb->vf_table_fn_work);
 }
@@ -1138,7 +1146,7 @@ static void nvgpu_clk_arb_run_arbiter_cb(struct work_struct *work)
         if (gpc2clk_target > arb->gpc2clk_max)
                 gpc2clk_target = arb->gpc2clk_max;
 
-        mclk_target = (mclk_target > 0) ? mclk_target:
+        mclk_target = (mclk_target > 0) ? mclk_target :
                         arb->mclk_default_mhz;
 
         if (mclk_target < arb->mclk_min)
@@ -1438,7 +1446,8 @@ static u32 nvgpu_clk_arb_notify(struct nvgpu_clk_dev *dev,
 
                 poll_mask |= (POLLIN | POLLPRI);
                 /* On next run do not report global alarms that were already
-                 * reported, but report SHUTDOWN always */
+                 * reported, but report SHUTDOWN always
+                 */
                 dev->alarms_reported = new_alarms_reported & ~LOCAL_ALARM_MASK &
                                                         ~EVENT(ALARM_GPU_LOST);
         }
@@ -1753,15 +1762,15 @@ int nvgpu_clk_arb_get_arbiter_actual_mhz(struct gk20a *g,
 int nvgpu_clk_arb_get_arbiter_effective_mhz(struct gk20a *g,
                 u32 api_domain, u16 *freq_mhz)
 {
-        switch(api_domain) {
+        switch (api_domain) {
         case NVGPU_GPU_CLK_DOMAIN_MCLK:
                 *freq_mhz = g->ops.clk.measure_freq(g, CTRL_CLK_DOMAIN_MCLK) /
                         1000000ULL;
                 return 0;
 
         case NVGPU_GPU_CLK_DOMAIN_GPCCLK:
-                *freq_mhz = g->ops.clk.measure_freq(g, CTRL_CLK_DOMAIN_GPC2CLK) /
-                        2000000ULL;
+                *freq_mhz = g->ops.clk.measure_freq(g,
+                        CTRL_CLK_DOMAIN_GPC2CLK) / 2000000ULL;
                 return 0;
 
         default:
@@ -1774,7 +1783,7 @@ int nvgpu_clk_arb_get_arbiter_clk_range(struct gk20a *g, u32 api_domain,
 {
         int ret;
 
-        switch(api_domain) {
+        switch (api_domain) {
         case NVGPU_GPU_CLK_DOMAIN_MCLK:
                 ret = g->ops.clk_arb.get_arbiter_clk_range(g,
                                 CTRL_CLK_DOMAIN_MCLK, min_mhz, max_mhz);
@@ -1812,7 +1821,7 @@ bool nvgpu_clk_arb_is_valid_domain(struct gk20a *g, u32 api_domain)
 {
         u32 clk_domains = g->ops.clk_arb.get_arbiter_clk_domains(g);
 
-        switch(api_domain) {
+        switch (api_domain) {
         case NVGPU_GPU_CLK_DOMAIN_MCLK:
                 return ((clk_domains & CTRL_CLK_DOMAIN_MCLK) != 0);
 
@@ -1903,7 +1912,7 @@ recalculate_vf_point:
 
                         if ((table->gpc2clk_points[index].gpc_mhz >=
                                                         gpc2clk_target) &&
-                                        (pstate != VF_POINT_INVALID_PSTATE)){
+                                        (pstate != VF_POINT_INVALID_PSTATE)) {
                                 gpc2clk_target =
                                         table->gpc2clk_points[index].gpc_mhz;
                                 *sys2clk =
@@ -1972,7 +1981,8 @@ find_exit:
 }
 
 /* This function is inherently unsafe to call while arbiter is running
- * arbiter must be blocked before calling this function */
+ * arbiter must be blocked before calling this function
+ */
 int nvgpu_clk_arb_get_current_pstate(struct gk20a *g)
 {
         return NV_ACCESS_ONCE(g->clk_arb->actual->pstate);
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index 4f3b34b8..13d534c4 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -58,6 +58,7 @@ struct nvgpu_warpstate;
 #include <nvgpu/atomic.h>
 #include <nvgpu/barrier.h>
 #include <nvgpu/rwsem.h>
+#include <nvgpu/clk_arb.h>
 
 #include "clk_gk20a.h"
 #include "ce2_gk20a.h"
@@ -70,7 +71,6 @@ struct nvgpu_warpstate;
 #include "therm_gk20a.h"
 #ifdef CONFIG_ARCH_TEGRA_18x_SOC
 #include "clk/clk.h"
-#include "clk/clk_arb.h"
 #include "perf/perf.h"
 #include "pmgr/pmgr.h"
 #include "therm/thrm.h"
diff --git a/drivers/gpu/nvgpu/gp106/clk_arb_gp106.c b/drivers/gpu/nvgpu/gp106/clk_arb_gp106.c
index 00f5a61b..ae6cd327 100644
--- a/drivers/gpu/nvgpu/gp106/clk_arb_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/clk_arb_gp106.c
@@ -22,7 +22,6 @@
 
 #include "gk20a/gk20a.h"
 
-#include "clk/clk_arb.h"
 #include "clk_arb_gp106.h"
 
 u32 gp106_get_arbiter_clk_domains(struct gk20a *g)
diff --git a/drivers/gpu/nvgpu/gp106/clk_gp106.c b/drivers/gpu/nvgpu/gp106/clk_gp106.c
index 4b941433..b8a1ba3d 100644
--- a/drivers/gpu/nvgpu/gp106/clk_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/clk_gp106.c
@@ -32,7 +32,6 @@
 #include "common/linux/os_linux.h"
 
 #include "clk_gp106.h"
-#include "clk/clk_arb.h"
 
 #include "gp106/mclk_gp106.h"
 
diff --git a/drivers/gpu/nvgpu/clk/clk_arb.h b/drivers/gpu/nvgpu/include/nvgpu/clk_arb.h
index 8545e01b..09f0b0d3 100644
--- a/drivers/gpu/nvgpu/clk/clk_arb.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/clk_arb.h
@@ -20,8 +20,10 @@
  * DEALINGS IN THE SOFTWARE.
  */
 
-#ifndef _CLK_ARB_H_
-#define _CLK_ARB_H_
+#ifndef __NVGPU_CLK_ARB_H__
+#define __NVGPU_CLK_ARB_H__
+
+#include <nvgpu/types.h>
 
 struct gk20a;
 struct nvgpu_clk_session;
@@ -76,5 +78,5 @@ int nvgpu_clk_arb_get_current_pstate(struct gk20a *g);
 void nvgpu_clk_arb_pstate_change_lock(struct gk20a *g, bool lock);
 
 void nvgpu_clk_arb_schedule_alarm(struct gk20a *g, u32 alarm);
-#endif /* _CLK_ARB_H_ */
+#endif /* __NVGPU_CLK_ARB_H__ */
 
diff --git a/drivers/gpu/nvgpu/perf/perf.c b/drivers/gpu/nvgpu/perf/perf.c
index bf5140d3..7dd435e5 100644
--- a/drivers/gpu/nvgpu/perf/perf.c
+++ b/drivers/gpu/nvgpu/perf/perf.c
@@ -25,7 +25,6 @@
 
 #include "gk20a/gk20a.h"
 #include "perf.h"
-#include "clk/clk_arb.h"
 
 struct perfrpc_pmucmdhandler_params {
         struct nv_pmu_perf_rpc *prpccall;