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authorSami Kiminki <skiminki@nvidia.com>2015-08-17 14:05:19 -0400
committerTerje Bergstrom <tbergstrom@nvidia.com>2015-08-19 11:03:24 -0400
commit08f37cba39d846bc635098c4adae0c4a5629161a (patch)
tree2e6542081574210e869ca878a921a4c4a0e10013
parenta88e58cc9d2c4b9f852716240b3cabc9449d8679 (diff)
gpu: nvgpu: Prepare for per-GPU CDE program numbers
Add gpu_ops for CDE, and add get_program_numbers function pointer for determining horizontal and vertical CDE swizzler programs. This allows different GPUs to have their own specific requirements for choosing the CDE firmware programs. Bug 1604102 Change-Id: Ib37c13abb017c8eb1c32adc8cbc6b5984488222e Signed-off-by: Sami Kiminki <skiminki@nvidia.com> Reviewed-on: http://git-master/r/784899 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
-rw-r--r--drivers/gpu/nvgpu/Makefile3
-rw-r--r--drivers/gpu/nvgpu/gk20a/cde_gk20a.c36
-rw-r--r--drivers/gpu/nvgpu/gk20a/gk20a.h5
-rw-r--r--drivers/gpu/nvgpu/gm20b/cde_gm20b.c53
-rw-r--r--drivers/gpu/nvgpu/gm20b/cde_gm20b.h23
-rw-r--r--drivers/gpu/nvgpu/gm20b/hal_gm20b.c2
6 files changed, 99 insertions, 23 deletions
diff --git a/drivers/gpu/nvgpu/Makefile b/drivers/gpu/nvgpu/Makefile
index ee2096d9..ee2117b9 100644
--- a/drivers/gpu/nvgpu/Makefile
+++ b/drivers/gpu/nvgpu/Makefile
@@ -61,7 +61,8 @@ nvgpu-y := \
61 gm20b/mm_gm20b.o \ 61 gm20b/mm_gm20b.o \
62 gm20b/regops_gm20b.o \ 62 gm20b/regops_gm20b.o \
63 gm20b/mc_gm20b.o \ 63 gm20b/mc_gm20b.o \
64 gm20b/debug_gm20b.o 64 gm20b/debug_gm20b.o \
65 gm20b/cde_gm20b.o
65 66
66nvgpu-$(CONFIG_TEGRA_GK20A) += gk20a/platform_gk20a_tegra.o 67nvgpu-$(CONFIG_TEGRA_GK20A) += gk20a/platform_gk20a_tegra.o
67nvgpu-$(CONFIG_SYNC) += gk20a/sync_gk20a.o 68nvgpu-$(CONFIG_SYNC) += gk20a/sync_gk20a.o
diff --git a/drivers/gpu/nvgpu/gk20a/cde_gk20a.c b/drivers/gpu/nvgpu/gk20a/cde_gk20a.c
index dc7e8be3..84b39b2d 100644
--- a/drivers/gpu/nvgpu/gk20a/cde_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/cde_gk20a.c
@@ -1259,17 +1259,6 @@ enum cde_launch_patch_id {
1259 PATCH_V_QMD_REGISTER_COUNT_ID = 1056, 1259 PATCH_V_QMD_REGISTER_COUNT_ID = 1056,
1260}; 1260};
1261 1261
1262enum programs {
1263 PROG_HPASS = 0,
1264 PROG_VPASS_LARGE = 1,
1265 PROG_VPASS_SMALL = 2,
1266 PROG_HPASS_DEBUG = 3,
1267 PROG_VPASS_LARGE_DEBUG = 4,
1268 PROG_VPASS_SMALL_DEBUG = 5,
1269 PROG_PASSTHROUGH = 6,
1270 NUM_PROGRAMS = 7
1271};
1272
1273/* maximum number of WRITE_PATCHes in the below function */ 1262/* maximum number of WRITE_PATCHes in the below function */
1274#define MAX_CDE_LAUNCH_PATCHES 32 1263#define MAX_CDE_LAUNCH_PATCHES 32
1275 1264
@@ -1301,17 +1290,20 @@ static int gk20a_buffer_convert_gpu_to_cde_v1(
1301 const int xblocks = (xtiles + 1) >> 1; 1290 const int xblocks = (xtiles + 1) >> 1;
1302 const int voffset = compbits_voffset - compbits_hoffset; 1291 const int voffset = compbits_voffset - compbits_hoffset;
1303 1292
1304 int hprog = PROG_HPASS; 1293 int hprog = -1;
1305 int vprog = (block_height_log2 >= 2) ? 1294 int vprog = -1;
1306 PROG_VPASS_LARGE : PROG_VPASS_SMALL; 1295
1307 if (g->cde_app.shader_parameter == 1) { 1296 if (g->ops.cde.get_program_numbers)
1308 hprog = PROG_PASSTHROUGH; 1297 g->ops.cde.get_program_numbers(g, block_height_log2,
1309 vprog = PROG_PASSTHROUGH; 1298 &hprog, &vprog);
1310 } else if (g->cde_app.shader_parameter == 2) { 1299 else {
1311 hprog = PROG_HPASS_DEBUG; 1300 gk20a_warn(&g->dev->dev, "cde: chip not supported");
1312 vprog = (block_height_log2 >= 2) ? 1301 return -ENOSYS;
1313 PROG_VPASS_LARGE_DEBUG : 1302 }
1314 PROG_VPASS_SMALL_DEBUG; 1303
1304 if (hprog < 0 || vprog < 0) {
1305 gk20a_warn(&g->dev->dev, "cde: could not determine programs");
1306 return -ENOSYS;
1315 } 1307 }
1316 1308
1317 if (xtiles > 8192 / 8 || ytiles > 8192 / 8) 1309 if (xtiles > 8192 / 8 || ytiles > 8192 / 8)
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index 25712a64..5caef6fe 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -432,6 +432,11 @@ struct gpu_ops {
432 void (*show_dump)(struct gk20a *g, 432 void (*show_dump)(struct gk20a *g,
433 struct gk20a_debug_output *o); 433 struct gk20a_debug_output *o);
434 } debug; 434 } debug;
435 struct {
436 void (*get_program_numbers)(struct gk20a *g,
437 u32 block_height_log2,
438 int *hprog, int *vprog);
439 } cde;
435}; 440};
436 441
437struct gk20a { 442struct gk20a {
diff --git a/drivers/gpu/nvgpu/gm20b/cde_gm20b.c b/drivers/gpu/nvgpu/gm20b/cde_gm20b.c
new file mode 100644
index 00000000..d23ba8c5
--- /dev/null
+++ b/drivers/gpu/nvgpu/gm20b/cde_gm20b.c
@@ -0,0 +1,53 @@
1/*
2 * GM20B CDE
3 *
4 * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 */
15
16#include "gk20a/gk20a.h"
17#include "cde_gm20b.h"
18
19enum programs {
20 PROG_HPASS = 0,
21 PROG_VPASS_LARGE = 1,
22 PROG_VPASS_SMALL = 2,
23 PROG_HPASS_DEBUG = 3,
24 PROG_VPASS_LARGE_DEBUG = 4,
25 PROG_VPASS_SMALL_DEBUG = 5,
26 PROG_PASSTHROUGH = 6,
27};
28
29static void gm20b_cde_get_program_numbers(struct gk20a *g,
30 u32 block_height_log2,
31 int *hprog_out, int *vprog_out)
32{
33 int hprog = PROG_HPASS;
34 int vprog = (block_height_log2 >= 2) ?
35 PROG_VPASS_LARGE : PROG_VPASS_SMALL;
36 if (g->cde_app.shader_parameter == 1) {
37 hprog = PROG_PASSTHROUGH;
38 vprog = PROG_PASSTHROUGH;
39 } else if (g->cde_app.shader_parameter == 2) {
40 hprog = PROG_HPASS_DEBUG;
41 vprog = (block_height_log2 >= 2) ?
42 PROG_VPASS_LARGE_DEBUG :
43 PROG_VPASS_SMALL_DEBUG;
44 }
45
46 *hprog_out = hprog;
47 *vprog_out = vprog;
48}
49
50void gm20b_init_cde_ops(struct gpu_ops *gops)
51{
52 gops->cde.get_program_numbers = gm20b_cde_get_program_numbers;
53}
diff --git a/drivers/gpu/nvgpu/gm20b/cde_gm20b.h b/drivers/gpu/nvgpu/gm20b/cde_gm20b.h
new file mode 100644
index 00000000..66e303f5
--- /dev/null
+++ b/drivers/gpu/nvgpu/gm20b/cde_gm20b.h
@@ -0,0 +1,23 @@
1/*
2 * GM20B CDE
3 *
4 * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 */
15
16#ifndef _NVHOST_GM20B_CDE
17#define _NVHOST_GM20B_CDE
18
19struct gpu_ops;
20
21void gm20b_init_cde_ops(struct gpu_ops *gops);
22
23#endif
diff --git a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
index 1ab65836..e32f8943 100644
--- a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
@@ -32,6 +32,7 @@
32#include <linux/tegra-fuse.h> 32#include <linux/tegra-fuse.h>
33#include "regops_gm20b.h" 33#include "regops_gm20b.h"
34#include "debug_gm20b.h" 34#include "debug_gm20b.h"
35#include "cde_gm20b.h"
35 36
36#define FUSE_OPT_PRIV_SEC_DIS_0 0x264 37#define FUSE_OPT_PRIV_SEC_DIS_0 0x264
37#define PRIV_SECURITY_DISABLE 0x01 38#define PRIV_SECURITY_DISABLE 0x01
@@ -133,6 +134,7 @@ int gm20b_init_hal(struct gk20a *g)
133 gm20b_init_clk_ops(gops); 134 gm20b_init_clk_ops(gops);
134 gm20b_init_regops(gops); 135 gm20b_init_regops(gops);
135 gm20b_init_debug_ops(gops); 136 gm20b_init_debug_ops(gops);
137 gm20b_init_cde_ops(gops);
136 gops->name = "gm20b"; 138 gops->name = "gm20b";
137 139
138 c->twod_class = FERMI_TWOD_A; 140 c->twod_class = FERMI_TWOD_A;