diff options
author | Mahantesh Kumbar <mkumbar@nvidia.com> | 2016-11-14 00:57:38 -0500 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-01-17 11:15:12 -0500 |
commit | efe0758081f25b39d5bb8b097fc0ae64d0e47c3f (patch) | |
tree | f99d333adfb8db97524508d2b81beec1164e9fde | |
parent | 157ff622f3156a68281a5d1c0eb97bc8ad3a5b3b (diff) |
gpu: nvgpu: fix pmu->mscg_stat optimization issue
- with help of WRITE_ONCE() & ACCESS_ONCE()
make sure variable pmu->mscg_stat read/write goes through
without optimization
- Added WRITE_ONCE() define for kernel-3.18 version & below
to support backward compatibility
issue: inconsistencies on getting MSCG to trigger consistently in P5
due to a lack of memory barrier around and volatile accesses to the
variable pmu->mscg_stat
JIRA DNVGPU-71
Change-Id: I04d30493d42c52710304dbdfb9cb4a1e9a76f2c0
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1252524
(cherry picked from commit 8af7fc68e7ab06a856ba4ef4e44de7336682361b)
Reviewed-on: http://git-master/r/1271614
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.h | 4 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a_sysfs.c | 12 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/pmu_gk20a.c | 8 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/lpwr/lpwr.c | 16 |
4 files changed, 29 insertions, 11 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 5e2344cf..692f054f 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h | |||
@@ -64,6 +64,10 @@ struct acr_desc; | |||
64 | #endif | 64 | #endif |
65 | #include "gm206/bios_gm206.h" | 65 | #include "gm206/bios_gm206.h" |
66 | 66 | ||
67 | #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 18, 0) | ||
68 | #define WRITE_ONCE(x, val) \ | ||
69 | x = val | ||
70 | #endif | ||
67 | 71 | ||
68 | /* PTIMER_REF_FREQ_HZ corresponds to a period of 32 nanoseconds. | 72 | /* PTIMER_REF_FREQ_HZ corresponds to a period of 32 nanoseconds. |
69 | 32 ns is the resolution of ptimer. */ | 73 | 32 ns is the resolution of ptimer. */ |
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a_sysfs.c b/drivers/gpu/nvgpu/gk20a/gk20a_sysfs.c index 9bf6acec..6611b120 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a_sysfs.c +++ b/drivers/gpu/nvgpu/gk20a/gk20a_sysfs.c | |||
@@ -511,15 +511,21 @@ static ssize_t mscg_enable_store(struct device *dev, | |||
511 | g->mscg_enabled = true; | 511 | g->mscg_enabled = true; |
512 | if (g->ops.pmu.pmu_is_lpwr_feature_supported(g, | 512 | if (g->ops.pmu.pmu_is_lpwr_feature_supported(g, |
513 | PMU_PG_LPWR_FEATURE_MSCG)) { | 513 | PMU_PG_LPWR_FEATURE_MSCG)) { |
514 | if (!pmu->mscg_stat) | 514 | if (!ACCESS_ONCE(pmu->mscg_stat)) { |
515 | pmu->mscg_stat = PMU_MSCG_ENABLED; | 515 | WRITE_ONCE(pmu->mscg_stat, |
516 | PMU_MSCG_ENABLED); | ||
517 | /* make status visible */ | ||
518 | smp_mb(); | ||
519 | } | ||
516 | } | 520 | } |
517 | |||
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-04 01:51:12 -0400 |