diff options
author | Vinod G <vinodg@nvidia.com> | 2018-05-17 17:43:51 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-05-21 16:55:00 -0400 |
commit | dffeea5deb9754686e60eafec5194b7bf7bb4e77 (patch) | |
tree | 20c413a02da8da02ef45335941b142ea790dd2eb | |
parent | bd7489886c0198fb65f939e73ab5e067f09c51b4 (diff) |
gpu: nvgpu: Code updates for MISRA violations
As part of the MISRA fixes, moving all the
gating_reglist files to common/clock_gating dir,
the new directory structure suggested to follow.
Removed unused gating_reglist files for gk20a
JIRA NVGPU-646
Change-Id: I388855befcf991ee68eeffed10fe9ac456210649
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1722330
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
21 files changed, 19 insertions, 471 deletions
diff --git a/drivers/gpu/nvgpu/Makefile b/drivers/gpu/nvgpu/Makefile index 599e97e2..e180ad1d 100644 --- a/drivers/gpu/nvgpu/Makefile +++ b/drivers/gpu/nvgpu/Makefile | |||
@@ -2,6 +2,7 @@ GCOV_PROFILE := y | |||
2 | 2 | ||
3 | ccflags-y += -I$(srctree.nvgpu)/drivers/gpu/nvgpu/include | 3 | ccflags-y += -I$(srctree.nvgpu)/drivers/gpu/nvgpu/include |
4 | ccflags-y += -I$(srctree.nvgpu)/drivers/gpu/nvgpu | 4 | ccflags-y += -I$(srctree.nvgpu)/drivers/gpu/nvgpu |
5 | ccflags-y += -I$(srctree.nvgpu)/drivers/gpu/nvgpu/common | ||
5 | ccflags-y += -I$(srctree.nvgpu)/include | 6 | ccflags-y += -I$(srctree.nvgpu)/include |
6 | ccflags-y += -I$(srctree.nvgpu)/include/uapi | 7 | ccflags-y += -I$(srctree.nvgpu)/include/uapi |
7 | ccflags-y += -I$(srctree.nvgpu-next)/drivers/gpu/nvgpu | 8 | ccflags-y += -I$(srctree.nvgpu-next)/drivers/gpu/nvgpu |
@@ -80,6 +81,11 @@ nvgpu-y := \ | |||
80 | common/pmu/pmu_perfmon.o \ | 81 | common/pmu/pmu_perfmon.o \ |
81 | common/pmu/pmu_debug.o \ | 82 | common/pmu/pmu_debug.o \ |
82 | common/ltc.o \ | 83 | common/ltc.o \ |
84 | common/clock_gating/gm20b_gating_reglist.o \ | ||
85 | common/clock_gating/gp106_gating_reglist.o \ | ||
86 | common/clock_gating/gp10b_gating_reglist.o \ | ||
87 | common/clock_gating/gv100_gating_reglist.o \ | ||
88 | common/clock_gating/gv11b_gating_reglist.o \ | ||
83 | gk20a/gk20a.o \ | 89 | gk20a/gk20a.o \ |
84 | gk20a/bus_gk20a.o \ | 90 | gk20a/bus_gk20a.o \ |
85 | gk20a/pramin_gk20a.o \ | 91 | gk20a/pramin_gk20a.o \ |
@@ -98,7 +104,6 @@ nvgpu-y := \ | |||
98 | gk20a/therm_gk20a.o \ | 104 | gk20a/therm_gk20a.o \ |
99 | gk20a/gr_ctx_gk20a_sim.o \ | 105 | gk20a/gr_ctx_gk20a_sim.o \ |
100 | gk20a/gr_ctx_gk20a.o \ | 106 | gk20a/gr_ctx_gk20a.o \ |
101 | gk20a/gk20a_gating_reglist.o \ | ||
102 | gk20a/fb_gk20a.o \ | 107 | gk20a/fb_gk20a.o \ |
103 | gk20a/hal.o \ | 108 | gk20a/hal.o \ |
104 | gk20a/tsg_gk20a.o \ | 109 | gk20a/tsg_gk20a.o \ |
@@ -112,7 +117,6 @@ nvgpu-y := \ | |||
112 | gm20b/fb_gm20b.o \ | 117 | gm20b/fb_gm20b.o \ |
113 | gm20b/fifo_gm20b.o \ | 118 | gm20b/fifo_gm20b.o \ |
114 | gm20b/gr_ctx_gm20b.o \ | 119 | gm20b/gr_ctx_gm20b.o \ |
115 | gm20b/gm20b_gating_reglist.o \ | ||
116 | gm20b/acr_gm20b.o \ | 120 | gm20b/acr_gm20b.o \ |
117 | gm20b/pmu_gm20b.o \ | 121 | gm20b/pmu_gm20b.o \ |
118 | gm20b/mm_gm20b.o \ | 122 | gm20b/mm_gm20b.o \ |
@@ -225,7 +229,6 @@ nvgpu-y += \ | |||
225 | gp10b/pmu_gp10b.o \ | 229 | gp10b/pmu_gp10b.o \ |
226 | gp10b/hal_gp10b.o \ | 230 | gp10b/hal_gp10b.o \ |
227 | gp10b/rpfb_gp10b.o \ | 231 | gp10b/rpfb_gp10b.o \ |
228 | gp10b/gp10b_gating_reglist.o \ | ||
229 | gp10b/regops_gp10b.o \ | 232 | gp10b/regops_gp10b.o \ |
230 | gp10b/therm_gp10b.o \ | 233 | gp10b/therm_gp10b.o \ |
231 | gp10b/fecs_trace_gp10b.o \ | 234 | gp10b/fecs_trace_gp10b.o \ |
@@ -252,7 +255,6 @@ nvgpu-y += \ | |||
252 | gv11b/mc_gv11b.o \ | 255 | gv11b/mc_gv11b.o \ |
253 | gv11b/ltc_gv11b.o \ | 256 | gv11b/ltc_gv11b.o \ |
254 | gv11b/hal_gv11b.o \ | 257 | gv11b/hal_gv11b.o \ |
255 | gv11b/gv11b_gating_reglist.o \ | ||
256 | gv11b/gr_gv11b.o \ | 258 | gv11b/gr_gv11b.o \ |
257 | gv11b/fb_gv11b.o \ | 259 | gv11b/fb_gv11b.o \ |
258 | gv11b/fifo_gv11b.o \ | 260 | gv11b/fifo_gv11b.o \ |
@@ -276,7 +278,6 @@ nvgpu-y += \ | |||
276 | gv100/nvlink_gv100.o \ | 278 | gv100/nvlink_gv100.o \ |
277 | gv100/hal_gv100.o \ | 279 | gv100/hal_gv100.o \ |
278 | gv100/pmu_gv100.o \ | 280 | gv100/pmu_gv100.o \ |
279 | gv100/gv100_gating_reglist.o \ | ||
280 | pstate/pstate.o \ | 281 | pstate/pstate.o \ |
281 | clk/clk_vin.o \ | 282 | clk/clk_vin.o \ |
282 | clk/clk_fll.o \ | 283 | clk/clk_fll.o \ |
@@ -291,7 +292,6 @@ nvgpu-y += \ | |||
291 | clk/clk.o \ | 292 | clk/clk.o \ |
292 | gp106/clk_gp106.o \ | 293 | gp106/clk_gp106.o \ |
293 | gp106/clk_arb_gp106.o \ | 294 | gp106/clk_arb_gp106.o \ |
294 | gp106/gp106_gating_reglist.o \ | ||
295 | gp106/xve_gp106.o \ | 295 | gp106/xve_gp106.o \ |
296 | gp106/therm_gp106.o \ | 296 | gp106/therm_gp106.o \ |
297 | gp106/xve_gp106.o \ | 297 | gp106/xve_gp106.o \ |
diff --git a/drivers/gpu/nvgpu/Makefile.sources b/drivers/gpu/nvgpu/Makefile.sources index 676ca05b..06f10c20 100644 --- a/drivers/gpu/nvgpu/Makefile.sources +++ b/drivers/gpu/nvgpu/Makefile.sources | |||
@@ -71,6 +71,11 @@ srcs := common/mm/nvgpu_allocator.c \ | |||
71 | common/posix/nvlink.c \ | 71 | common/posix/nvlink.c \ |
72 | common/posix/lock.c \ | 72 | common/posix/lock.c \ |
73 | common/posix/stubs.c \ | 73 | common/posix/stubs.c \ |
74 | common/clock_gating/gm20b_gating_reglist.c \ | ||
75 | common/clock_gating/gp10b_gating_reglist.c \ | ||
76 | common/clock_gating/gv11b_gating_reglist.c \ | ||
77 | common/clock_gating/gp106_gating_reglist.c \ | ||
78 | common/clock_gating/gv100_gating_reglist.c \ | ||
74 | boardobj/boardobj.c \ | 79 | boardobj/boardobj.c \ |
75 | boardobj/boardobjgrp.c \ | 80 | boardobj/boardobjgrp.c \ |
76 | boardobj/boardobjgrpmask.c \ | 81 | boardobj/boardobjgrpmask.c \ |
@@ -120,7 +125,6 @@ srcs := common/mm/nvgpu_allocator.c \ | |||
120 | gk20a/therm_gk20a.c \ | 125 | gk20a/therm_gk20a.c \ |
121 | gk20a/gr_ctx_gk20a_sim.c \ | 126 | gk20a/gr_ctx_gk20a_sim.c \ |
122 | gk20a/gr_ctx_gk20a.c \ | 127 | gk20a/gr_ctx_gk20a.c \ |
123 | gk20a/gk20a_gating_reglist.c \ | ||
124 | gk20a/fb_gk20a.c \ | 128 | gk20a/fb_gk20a.c \ |
125 | gk20a/hal.c \ | 129 | gk20a/hal.c \ |
126 | gk20a/tsg_gk20a.c \ | 130 | gk20a/tsg_gk20a.c \ |
@@ -133,7 +137,6 @@ srcs := common/mm/nvgpu_allocator.c \ | |||
133 | gm20b/fb_gm20b.c \ | 137 | gm20b/fb_gm20b.c \ |
134 | gm20b/fifo_gm20b.c \ | 138 | gm20b/fifo_gm20b.c \ |
135 | gm20b/gr_ctx_gm20b.c \ | 139 | gm20b/gr_ctx_gm20b.c \ |
136 | gm20b/gm20b_gating_reglist.c \ | ||
137 | gm20b/acr_gm20b.c \ | 140 | gm20b/acr_gm20b.c \ |
138 | gm20b/pmu_gm20b.c \ | 141 | gm20b/pmu_gm20b.c \ |
139 | gm20b/mm_gm20b.c \ | 142 | gm20b/mm_gm20b.c \ |
@@ -151,7 +154,6 @@ srcs := common/mm/nvgpu_allocator.c \ | |||
151 | gp10b/pmu_gp10b.c \ | 154 | gp10b/pmu_gp10b.c \ |
152 | gp10b/hal_gp10b.c \ | 155 | gp10b/hal_gp10b.c \ |
153 | gp10b/rpfb_gp10b.c \ | 156 | gp10b/rpfb_gp10b.c \ |
154 | gp10b/gp10b_gating_reglist.c \ | ||
155 | gp10b/regops_gp10b.c \ | 157 | gp10b/regops_gp10b.c \ |
156 | gp10b/therm_gp10b.c \ | 158 | gp10b/therm_gp10b.c \ |
157 | gp10b/fecs_trace_gp10b.c \ | 159 | gp10b/fecs_trace_gp10b.c \ |
@@ -163,7 +165,6 @@ srcs := common/mm/nvgpu_allocator.c \ | |||
163 | gv11b/mc_gv11b.c \ | 165 | gv11b/mc_gv11b.c \ |
164 | gv11b/ltc_gv11b.c \ | 166 | gv11b/ltc_gv11b.c \ |
165 | gv11b/hal_gv11b.c \ | 167 | gv11b/hal_gv11b.c \ |
166 | gv11b/gv11b_gating_reglist.c \ | ||
167 | gv11b/gr_gv11b.c \ | 168 | gv11b/gr_gv11b.c \ |
168 | gv11b/fb_gv11b.c \ | 169 | gv11b/fb_gv11b.c \ |
169 | gv11b/fifo_gv11b.c \ | 170 | gv11b/fifo_gv11b.c \ |
@@ -191,7 +192,6 @@ srcs := common/mm/nvgpu_allocator.c \ | |||
191 | gp106/fuse_gp106.c \ | 192 | gp106/fuse_gp106.c \ |
192 | gp106/clk_gp106.c \ | 193 | gp106/clk_gp106.c \ |
193 | gp106/clk_arb_gp106.c \ | 194 | gp106/clk_arb_gp106.c \ |
194 | gp106/gp106_gating_reglist.c \ | ||
195 | gp106/xve_gp106.c \ | 195 | gp106/xve_gp106.c \ |
196 | gp106/therm_gp106.c \ | 196 | gp106/therm_gp106.c \ |
197 | gv100/mm_gv100.c \ | 197 | gv100/mm_gv100.c \ |
@@ -205,5 +205,4 @@ srcs := common/mm/nvgpu_allocator.c \ | |||
205 | gv100/mc_gv100.c \ | 205 | gv100/mc_gv100.c \ |
206 | gv100/nvlink_gv100.c \ | 206 | gv100/nvlink_gv100.c \ |
207 | gv100/hal_gv100.c \ | 207 | gv100/hal_gv100.c \ |
208 | gv100/pmu_gv100.c \ | 208 | gv100/pmu_gv100.c |
209 | gv100/gv100_gating_reglist.c | ||
diff --git a/drivers/gpu/nvgpu/gm20b/gm20b_gating_reglist.c b/drivers/gpu/nvgpu/common/clock_gating/gm20b_gating_reglist.c index 0ebb2d0d..0ebb2d0d 100644 --- a/drivers/gpu/nvgpu/gm20b/gm20b_gating_reglist.c +++ b/drivers/gpu/nvgpu/common/clock_gating/gm20b_gating_reglist.c | |||
diff --git a/drivers/gpu/nvgpu/gm20b/gm20b_gating_reglist.h b/drivers/gpu/nvgpu/common/clock_gating/gm20b_gating_reglist.h index 557f5689..557f5689 100644 --- a/drivers/gpu/nvgpu/gm20b/gm20b_gating_reglist.h +++ b/drivers/gpu/nvgpu/common/clock_gating/gm20b_gating_reglist.h | |||
diff --git a/drivers/gpu/nvgpu/gp106/gp106_gating_reglist.c b/drivers/gpu/nvgpu/common/clock_gating/gp106_gating_reglist.c index 169a1fee..169a1fee 100644 --- a/drivers/gpu/nvgpu/gp106/gp106_gating_reglist.c +++ b/drivers/gpu/nvgpu/common/clock_gating/gp106_gating_reglist.c | |||
diff --git a/drivers/gpu/nvgpu/gp106/gp106_gating_reglist.h b/drivers/gpu/nvgpu/common/clock_gating/gp106_gating_reglist.h index 773abde6..773abde6 100644 --- a/drivers/gpu/nvgpu/gp106/gp106_gating_reglist.h +++ b/drivers/gpu/nvgpu/common/clock_gating/gp106_gating_reglist.h | |||
diff --git a/drivers/gpu/nvgpu/gp10b/gp10b_gating_reglist.c b/drivers/gpu/nvgpu/common/clock_gating/gp10b_gating_reglist.c index 4355f698..4355f698 100644 --- a/drivers/gpu/nvgpu/gp10b/gp10b_gating_reglist.c +++ b/drivers/gpu/nvgpu/common/clock_gating/gp10b_gating_reglist.c | |||
diff --git a/drivers/gpu/nvgpu/gp10b/gp10b_gating_reglist.h b/drivers/gpu/nvgpu/common/clock_gating/gp10b_gating_reglist.h index 7dbc6cac..7dbc6cac 100644 --- a/drivers/gpu/nvgpu/gp10b/gp10b_gating_reglist.h +++ b/drivers/gpu/nvgpu/common/clock_gating/gp10b_gating_reglist.h | |||
diff --git a/drivers/gpu/nvgpu/gv100/gv100_gating_reglist.c b/drivers/gpu/nvgpu/common/clock_gating/gv100_gating_reglist.c index 60ec0282..60ec0282 100644 --- a/drivers/gpu/nvgpu/gv100/gv100_gating_reglist.c +++ b/drivers/gpu/nvgpu/common/clock_gating/gv100_gating_reglist.c | |||
diff --git a/drivers/gpu/nvgpu/gv100/gv100_gating_reglist.h b/drivers/gpu/nvgpu/common/clock_gating/gv100_gating_reglist.h index fa231d26..fa231d26 100644 --- a/drivers/gpu/nvgpu/gv100/gv100_gating_reglist.h +++ b/drivers/gpu/nvgpu/common/clock_gating/gv100_gating_reglist.h | |||
diff --git a/drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c b/drivers/gpu/nvgpu/common/clock_gating/gv11b_gating_reglist.c index 4dbc87d5..4dbc87d5 100644 --- a/drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c +++ b/drivers/gpu/nvgpu/common/clock_gating/gv11b_gating_reglist.c | |||
diff --git a/drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.h b/drivers/gpu/nvgpu/common/clock_gating/gv11b_gating_reglist.h index 233189e0..233189e0 100644 --- a/drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.h +++ b/drivers/gpu/nvgpu/common/clock_gating/gv11b_gating_reglist.h | |||
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a_gating_reglist.c b/drivers/gpu/nvgpu/gk20a/gk20a_gating_reglist.c deleted file mode 100644 index 751c6a19..00000000 --- a/drivers/gpu/nvgpu/gk20a/gk20a_gating_reglist.c +++ /dev/null | |||
@@ -1,404 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2012-2017, NVIDIA Corporation. All rights reserved. | ||
3 | * | ||
4 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
5 | * copy of this software and associated documentation files (the "Software"), | ||
6 | * to deal in the Software without restriction, including without limitation | ||
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
8 | * and/or sell copies of the Software, and to permit persons to whom the | ||
9 | * Software is furnished to do so, subject to the following conditions: | ||
10 | * | ||
11 | * The above copyright notice and this permission notice shall be included in | ||
12 | * all copies or substantial portions of the Software. | ||
13 | * | ||
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
17 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | ||
18 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | ||
19 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | ||
20 | * DEALINGS IN THE SOFTWARE. | ||
21 | * | ||
22 | * This file is autogenerated. Do not edit. | ||
23 | */ | ||
24 | |||
25 | #ifndef __gk20a_gating_reglist_h__ | ||
26 | #define __gk20a_gating_reglist_h__ | ||
27 | |||
28 | #include "gk20a_gating_reglist.h" | ||
29 | #include <nvgpu/enabled.h> | ||
30 | |||
31 | struct gating_desc { | ||
32 | u32 addr; | ||
33 | u32 prod; | ||
34 | u32 disable; | ||
35 | }; | ||
36 | /* slcg gr */ | ||
37 | static const struct gating_desc gk20a_slcg_gr[] = { | ||
38 | {.addr = 0x004041f4, .prod = 0x00000002, .disable = 0x03fffffe}, | ||
39 | {.addr = 0x00409894, .prod = 0x00000040, .disable = 0x0003fffe}, | ||
40 | {.addr = 0x004078c4, .prod = 0x00000000, .disable = 0x000001fe}, | ||
41 | {.addr = 0x00406004, .prod = 0x00000000, .disable = 0x0001fffe}, | ||
42 | {.addr = 0x00405864, .prod = 0x00000000, .disable = 0x000001fe}, | ||
43 | {.addr = 0x00405910, .prod = 0x00000000, .disable = 0xfffffffe}, | ||
44 | {.addr = 0x00408044, .prod = 0x00000000, .disable = 0x000007fe}, | ||
45 | {.addr = 0x00407004, .prod = 0x00000000, .disable = 0x0000001e}, | ||
46 | {.addr = 0x0041a894, .prod = 0x00000000, .disable = 0x0003fffe}, | ||
47 | {.addr = 0x00418504, .prod = 0x00000000, .disable = 0x0001fffe}, | ||
48 | {.addr = 0x0041860c, .prod = 0x00000000, .disable = 0x000001fe}, | ||
49 | {.addr = 0x0041868c, .prod = 0x00000000, .disable = 0x0000001e}, | ||
50 | {.addr = 0x0041871c, .prod = 0x00000000, .disable = 0x0000003e}, | ||
51 | {.addr = 0x00418388, .prod = 0x00000000, .disable = 0x00000001}, | ||
52 | {.addr = 0x0041882c, .prod = 0x00000000, .disable = 0x0001fffe}, | ||
53 | {.addr = 0x00418bc0, .prod = 0x00000000, .disable = 0x000001fe}, | ||
54 | {.addr = 0x00418974, .prod = 0x00000000, .disable = 0x0001fffe}, | ||
55 | {.addr = 0x00418c74, .prod = 0x00000000, .disable = 0xfffffffe}, | ||
56 | {.addr = 0x00418cf4, .prod = 0x00000000, .disable = 0xfffffffe}, | ||
57 | {.addr = 0x00418d74, .prod = 0x00000000, .disable = 0xfffffffe}, | ||
58 | {.addr = 0x00418f10, .prod = 0x00000000, .disable = 0xfffffffe}, | ||
59 | {.addr = 0x00418e10, .prod = 0x00000000, .disable = 0xfffffffe}, | ||
60 | {.addr = 0x00419024, .prod = 0x00000000, .disable = 0x000001fe}, | ||
61 | {.addr = 0x00419a44, .prod = 0x00000000, .disable = 0x0000000e}, | ||
62 | {.addr = 0x00419a4c, .prod = 0x00000000, .disable = 0x000001fe}, | ||
63 | {.addr = 0x00419a54, .prod = 0x00000000, .disable = 0x0000003e}, | ||
64 | {.addr = 0x00419a5c, .prod = 0x00000000, .disable = 0x0000000e}, | ||
65 | {.addr = 0x00419a64, .prod = 0x00000000, .disable = 0x000001fe}, | ||
66 | {.addr = 0x00419a6c, .prod = 0x00000000, .disable = 0x0000000e}, | ||
67 | {.addr = 0x00419a74, .prod = 0x00000000, .disable = 0x0000000e}, | ||
68 | {.addr = 0x00419a7c, .prod = 0x00000000, .disable = 0x0000003e}, | ||
69 | {.addr = 0x00419a84, .prod = 0x00000000, .disable = 0x0000000e}, | ||
70 | {.addr = 0x00419ad0, .prod = 0x00000000, .disable = 0x0000000e}, | ||
71 | {.addr = 0x0041986c, .prod = 0x0000dfc0, .disable = 0x00fffffe}, | ||
72 | {.addr = 0x00419cd8, .prod = 0x00000000, .disable = 0x001ffffe}, | ||
73 | {.addr = 0x00419ce0, .prod = 0x00000000, .disable = 0x001ffffe}, | ||
74 | {.addr = 0x00419c74, .prod = 0x00000000, .disable = 0x0000001e}, | ||
75 | {.addr = 0x00419fd4, .prod = 0x00000000, .disable = 0x0003fffe}, | ||
76 | {.addr = 0x00419fdc, .prod = 0x00000000, .disable = 0xfffffffe}, | ||
77 | {.addr = 0x00419fe4, .prod = 0x00000000, .disable = 0x0000000e}, | ||
78 | {.addr = 0x00419ff4, .prod = 0x00000000, .disable = 0x00003ffe}, | ||
79 | {.addr = 0x00419ffc, .prod = 0x00000000, .disable = 0x0001fffe}, | ||
80 | {.addr = 0x0041be2c, .prod = 0x020bbfc0, .disable = 0xfffffffe}, | ||
81 | {.addr = 0x0041bfec, .prod = 0x00000000, .disable = 0xfffffffe}, | ||
82 | {.addr = 0x0041bed4, .prod = 0x00000000, .disable = 0xfffffffe}, | ||
83 | {.addr = 0x00408814, .prod = 0x00000000, .disable = 0x0001fffe}, | ||
84 | {.addr = 0x0040881c, .prod = 0x00000000, .disable = 0x0001fffe}, | ||
85 | {.addr = 0x00408a84, .prod = 0x00000000, .disable = 0x0001fffe}, | ||
86 | {.addr = 0x00408a8c, .prod = 0x00000000, .disable = 0x0001fffe}, | ||
87 | {.addr = 0x00408a94, .prod = 0x00000000, .disable = 0x0001fffe}, | ||
88 | {.addr = 0x00408a9c, .prod = 0x00000000, .disable = 0x0001fffe}, | ||
89 | {.addr = 0x00408aa4, .prod = 0x00000000, .disable = 0x0001fffe}, | ||
90 | {.addr = 0x00408aac, .prod = 0x00000000, .disable = 0x0001fffe}, | ||
91 | {.addr = 0x004089ac, .prod = 0x00000000, .disable = 0x0001fffe}, | ||
92 | {.addr = 0x00408a24, .prod = 0x00000000, .disable = 0x000001ff}, | ||
93 | {.addr = 0x0017e050, .prod = 0x00000000, .disable = 0x00fffffe}, | ||
94 | {.addr = 0x001200a8, .prod = 0x00000000, .disable = 0x00000001}, | ||
95 | {.addr = 0x0010e48c, .prod = 0x00000000, .disable = 0x0000003e}, | ||
96 | {.addr = 0x00001c04, .prod = 0x00000000, .disable = 0x000000fe}, | ||
97 | {.addr = 0x00106f28, .prod = 0x00000040, .disable = 0x000007fe}, | ||
98 | {.addr = 0x000206b8, .prod = 0x00000000, .disable = 0x0000000f}, | ||
99 | {.addr = 0x0017ea98, .prod = 0x00000000, .disable = 0xfffffffe}, | ||
100 | {.addr = 0x00106f28, .prod = 0x00000040, .disable = 0x000007fe}, | ||
101 | {.addr = 0x00120048, .prod = 0x00000000, .disable = 0x00000049}, | ||
102 | }; | ||
103 | |||
104 | /* slcg perf */ | ||
105 | static const struct gating_desc gk20a_slcg_perf[] = { | ||
106 | {.addr = 0x001be018, .prod = 0x000001ff, .disable = 0x00000000}, | ||
107 | {.addr = 0x001bc018, .prod = 0x000001ff, .disable = 0x00000000}, | ||
108 | {.addr = 0x001b8018, .prod = 0x000001ff, .disable = 0x00000000}, | ||
109 | {.addr = 0x001b4124, .prod = 0x00000001, .disable = 0x00000000}, | ||
110 | }; | ||
111 | |||
112 | /* blcg gr */ | ||
113 | static const struct gating_desc gk20a_blcg_gr[] = { | ||
114 | {.addr = 0x004041f0, .prod = 0x00004046, .disable = 0x00000000}, | ||
115 | {.addr = 0x00409890, .prod = 0x0000007f, .disable = 0x00000000}, | ||
116 | {.addr = 0x004098b0, .prod = 0x0000007f, .disable = 0x00000000}, | ||
117 | {.addr = 0x004078c0, .prod = 0x00000042, .disable = 0x00000000}, | ||
118 | {.addr = 0x00406000, .prod = 0x00004044, .disable = 0x00000000}, | ||
119 | {.addr = 0x00405860, .prod = 0x00004042, .disable = 0x00000000}, | ||
120 | {.addr = 0x0040590c, .prod = 0x00004044, .disable = 0x00000000}, | ||
121 | {.addr = 0x00408040, .prod = 0x00004044, .disable = 0x00000000}, | ||
122 | {.addr = 0x00407000, .prod = 0x00004041, .disable = 0x00000000}, | ||
123 | {.addr = 0x00405bf0, .prod = 0x00004044, .disable = 0x00000000}, | ||
124 | {.addr = 0x0041a890, .prod = 0x0000007f, .disable = 0x00000000}, | ||
125 | {.addr = 0x0041a8b0, .prod = 0x0000007f, .disable = 0x00000000}, | ||
126 | {.addr = 0x00418500, .prod = 0x00004044, .disable = 0x00000000}, | ||
127 | {.addr = 0x00418608, .prod = 0x00004042, .disable = 0x00000000}, | ||
128 | {.addr = 0x00418688, .prod = 0x00004042, .disable = 0x00000000}, | ||
129 | {.addr = 0x00418718, .prod = 0x00000042, .disable = 0x00000000}, | ||
130 | {.addr = 0x00418828, .prod = 0x00000044, .disable = 0x00000000}, | ||
131 | {.addr = 0x00418bbc, .prod = 0x00004042, .disable = 0x00000000}, | ||
132 | {.addr = 0x00418970, .prod = 0x00004042, .disable = 0x00000000}, | ||
133 | {.addr = 0x00418c70, .prod = 0x00004044, .disable = 0x00000000}, | ||
134 | {.addr = 0x00418cf0, .prod = 0x00004044, .disable = 0x00000000}, | ||
135 | {.addr = 0x00418d70, .prod = 0x00004044, .disable = 0x00000000}, | ||
136 | {.addr = 0x00418f0c, .prod = 0x00004044, .disable = 0x00000000}, | ||
137 | {.addr = 0x00418e0c, .prod = 0x00004044, .disable = 0x00000000}, | ||
138 | {.addr = 0x00419020, .prod = 0x00004042, .disable = 0x00000000}, | ||
139 | {.addr = 0x00419038, .prod = 0x00000042, .disable = 0x00000000}, | ||
140 | {.addr = 0x00419a40, .prod = 0x00004042, .disable = 0x00000000}, | ||
141 | {.addr = 0x00419a48, .prod = 0x00004042, .disable = 0x00000000}, | ||
142 | {.addr = 0x00419a50, .prod = 0x00004042, .disable = 0x00000000}, | ||
143 | {.addr = 0x00419a58, .prod = 0x00004042, .disable = 0x00000000}, | ||
144 | {.addr = 0x00419a60, .prod = 0x00004042, .disable = 0x00000000}, | ||
145 | {.addr = 0x00419a68, .prod = 0x00004042, .disable = 0x00000000}, | ||
146 | {.addr = 0x00419a70, .prod = 0x00004042, .disable = 0x00000000}, | ||
147 | {.addr = 0x00419a78, .prod = 0x00004042, .disable = 0x00000000}, | ||
148 | {.addr = 0x00419a80, .prod = 0x00004042, .disable = 0x00000000}, | ||
149 | {.addr = 0x00419acc, .prod = 0x00004047, .disable = 0x00000000}, | ||
150 | {.addr = 0x00419868, .prod = 0x00000043, .disable = 0x00000000}, | ||
151 | {.addr = 0x00419cd4, .prod = 0x00004042, .disable = 0x00000000}, | ||
152 | {.addr = 0x00419cdc, .prod = 0x00004042, .disable = 0x00000000}, | ||
153 | {.addr = 0x00419c70, .prod = 0x00004045, .disable = 0x00000000}, | ||
154 | {.addr = 0x00419fd0, .prod = 0x00004043, .disable = 0x00000000}, | ||
155 | {.addr = 0x00419fd8, .prod = 0x00004045, .disable = 0x00000000}, | ||
156 | {.addr = 0x00419fe0, .prod = 0x00004042, .disable = 0x00000000}, | ||
157 | {.addr = 0x00419fe8, .prod = 0x00004042, .disable = 0x00000000}, | ||
158 | {.addr = 0x00419ff0, .prod = 0x00004044, .disable = 0x00000000}, | ||
159 | {.addr = 0x00419ff8, .prod = 0x00004042, .disable = 0x00000000}, | ||
160 | {.addr = 0x00419f90, .prod = 0x00004042, .disable = 0x00000000}, | ||
161 | {.addr = 0x0041be28, .prod = 0x00000042, .disable = 0x00000000}, | ||
162 | {.addr = 0x0041bfe8, .prod = 0x00004044, .disable = 0x00000000}, | ||
163 | {.addr = 0x0041bed0, .prod = 0x00004044, .disable = 0x00000000}, | ||
164 | {.addr = 0x00408810, .prod = 0x00004042, .disable = 0x00000000}, | ||
165 | {.addr = 0x00408818, .prod = 0x00004042, .disable = 0x00000000}, | ||
166 | {.addr = 0x00408a80, .prod = 0x00004042, .disable = 0x00000000}, | ||
167 | {.addr = 0x00408a88, .prod = 0x00004042, .disable = 0x00000000}, | ||
168 | {.addr = 0x00408a90, .prod = 0x00004042, .disable = 0x00000000}, | ||
169 | {.addr = 0x00408a98, .prod = 0x00004042, .disable = 0x00000000}, | ||
170 | {.addr = 0x00408aa0, .prod = 0x00004042, .disable = 0x00000000}, | ||
171 | {.addr = 0x00408aa8, .prod = 0x00004042, .disable = 0x00000000}, | ||
172 | {.addr = 0x004089a8, .prod = 0x00004042, .disable = 0x00000000}, | ||
173 | {.addr = 0x004089b0, .prod = 0x00000042, .disable = 0x00000000}, | ||
174 | {.addr = 0x004089b8, .prod = 0x00004042, .disable = 0x00000000}, | ||
175 | {.addr = 0x0017ea60, .prod = 0x00000044, .disable = 0x00000000}, | ||
176 | {.addr = 0x0017ea68, .prod = 0x00000044, .disable = 0x00000000}, | ||
177 | {.addr = 0x00100d30, .prod = 0x0000c242, .disable = 0x00000000}, | ||
178 | {.addr = 0x00100d48, .prod = 0x0000c242, .disable = 0x00000000}, | ||
179 | {.addr = 0x00100d3c, .prod = 0x00000242, .disable = 0x00000000}, | ||
180 | {.addr = 0x0017ea78, .prod = 0x00000044, .disable = 0x00000000}, | ||
181 | {.addr = 0x0017e040, .prod = 0x00000044, .disable = 0x00000000}, | ||
182 | {.addr = 0x00100d1c, .prod = 0x00000042, .disable = 0x00000000}, | ||
183 | {.addr = 0x00106f24, .prod = 0x0000c242, .disable = 0x00000000}, | ||
184 | {.addr = 0x0041be00, .prod = 0x00000004, .disable = 0x00000007}, | ||
185 | {.addr = 0x00100d10, .prod = 0x0000c242, .disable = 0x00000000}, | ||
186 | {.addr = 0x0017ea70, .prod = 0x00000044, .disable = 0x00000000}, | ||
187 | {.addr = 0x00001c00, .prod = 0x00000042, .disable = 0x00000000}, | ||
188 | {.addr = 0x00100c98, .prod = 0x00000242, .disable = 0x00000000}, | ||
189 | {.addr = 0x0017e030, .prod = 0x00000044, .disable = 0x00000000}, | ||
190 | }; | ||
191 | |||
192 | /* pg gr */ | ||
193 | static const struct gating_desc gk20a_pg_gr[] = { | ||
194 | {.addr = 0x004041f8, .prod = 0x10940000, .disable = 0x00000000}, | ||
195 | {.addr = 0x004041fc, .prod = 0xff00a725, .disable = 0x00000000}, | ||
196 | {.addr = 0x00409898, .prod = 0x10140000, .disable = 0x00000000}, | ||
197 | {.addr = 0x0040989c, .prod = 0xff00000a, .disable = 0x00000000}, | ||
198 | {.addr = 0x004078c8, .prod = 0x10940000, .disable = 0x00000000}, | ||
199 | {.addr = 0x004078cc, .prod = 0xff00a725, .disable = 0x00000000}, | ||
200 | {.addr = 0x00406008, .prod = 0x10940000, .disable = 0x00000000}, | ||
201 | {.addr = 0x0040600c, .prod = 0xff00a725, .disable = 0x00000000}, | ||
202 | {.addr = 0x00405868, .prod = 0x10940000, .disable = 0x00000000}, | ||
203 | {.addr = 0x0040586c, .prod = 0xff00a725, .disable = 0x00000000}, | ||
204 | {.addr = 0x00405914, .prod = 0x10940000, .disable = 0x00000000}, | ||
205 | {.addr = 0x00405924, .prod = 0xff00a725, .disable = 0x00000000}, | ||
206 | {.addr = 0x00408048, .prod = 0x10940000, .disable = 0x00000000}, | ||
207 | {.addr = 0x0040804c, .prod = 0xff00a725, .disable = 0x00000000}, | ||
208 | {.addr = 0x00407008, .prod = 0x10140000, .disable = 0x00000000}, | ||
209 | {.addr = 0x0040700c, .prod = 0xff00000a, .disable = 0x00000000}, | ||
210 | {.addr = 0x00405bf8, .prod = 0x10940000, .disable = 0x00000000}, | ||
211 | {.addr = 0x00405bfc, .prod = 0xff00a725, .disable = 0x00000000}, | ||
212 | {.addr = 0x0041a898, .prod = 0x10140000, .disable = 0x00000000}, | ||
213 | {.addr = 0x0041a89c, .prod = 0xff00000a, .disable = 0x00000000}, | ||
214 | {.addr = 0x00418510, .prod = 0x10940000, .disable = 0x00000000}, | ||
215 | {.addr = 0x00418514, .prod = 0xff00a725, .disable = 0x00000000}, | ||
216 | {.addr = 0x00418610, .prod = 0x10940000, .disable = 0x00000000}, | ||
217 | {.addr = 0x00418614, .prod = 0xff00a725, .disable = 0x00000000}, | ||
218 | {.addr = 0x00418690, .prod = 0x10940000, .disable = 0x00000000}, | ||
219 | {.addr = 0x00418694, .prod = 0xff00a725, .disable = 0x00000000}, | ||
220 | {.addr = 0x00418720, .prod = 0x10940000, .disable = 0x00000000}, | ||
221 | {.addr = 0x00418724, .prod = 0xff00a725, .disable = 0x00000000}, | ||
222 | {.addr = 0x00418840, .prod = 0x10940000, .disable = 0x00000000}, | ||
223 | {.addr = 0x00418844, .prod = 0xff00a725, .disable = 0x00000000}, | ||
224 | {.addr = 0x00418bc4, .prod = 0x10940000, .disable = 0x00000000}, | ||
225 | {.addr = 0x00418bc8, .prod = 0xff00a725, .disable = 0x00000000}, | ||
226 | {.addr = 0x00418978, .prod = 0x10940000, .disable = 0x00000000}, | ||
227 | {.addr = 0x0041897c, .prod = 0xff00a725, .disable = 0x00000000}, | ||
228 | {.addr = 0x00418c78, .prod = 0x10940000, .disable = 0x00000000}, | ||
229 | {.addr = 0x00418c7c, .prod = 0xff00a725, .disable = 0x00000000}, | ||
230 | {.addr = 0x00418cf8, .prod = 0x10940000, .disable = 0x00000000}, | ||
231 | {.addr = 0x00418cfc, .prod = 0xff00a725, .disable = 0x00000000}, | ||
232 | {.addr = 0x00418d78, .prod = 0x10940000, .disable = 0x00000000}, | ||
233 | {.addr = 0x00418d7c, .prod = 0xff00a725, .disable = 0x00000000}, | ||
234 | {.addr = 0x00418f14, .prod = 0x10940000, .disable = 0x00000000}, | ||
235 | {.addr = 0x00418f18, .prod = 0xff00a725, .disable = 0x00000000}, | ||
236 | {.addr = 0x00418e14, .prod = 0x10940000, .disable = 0x00000000}, | ||
237 | {.addr = 0x00418e18, .prod = 0xff00a725, .disable = 0x00000000}, | ||
238 | {.addr = 0x00419030, .prod = 0x10940000, .disable = 0x00000000}, | ||
239 | {.addr = 0x00419050, .prod = 0xff00a725, .disable = 0x00000000}, | ||
240 | {.addr = 0x00419a88, .prod = 0x10940000, .disable = 0x00000000}, | ||
241 | {.addr = 0x00419a8c, .prod = 0xff00a725, .disable = 0x00000000}, | ||
242 | {.addr = 0x00419a90, .prod = 0x10940000, .disable = 0x00000000}, | ||
243 | {.addr = 0x00419a94, .prod = 0xff00a725, .disable = 0x00000000}, | ||
244 | {.addr = 0x00419a98, .prod = 0x10940000, .disable = 0x00000000}, | ||
245 | {.addr = 0x00419a9c, .prod = 0xff00a725, .disable = 0x00000000}, | ||
246 | {.addr = 0x00419aa0, .prod = 0x10940000, .disable = 0x00000000}, | ||
247 | {.addr = 0x00419aa4, .prod = 0xff00a725, .disable = 0x00000000}, | ||
248 | {.addr = 0x00419ad4, .prod = 0x10940000, .disable = 0x00000000}, | ||
249 | {.addr = 0x00419ad8, .prod = 0xff00a725, .disable = 0x00000000}, | ||
250 | {.addr = 0x00419870, .prod = 0x10940000, .disable = 0x00000000}, | ||
251 | {.addr = 0x00419874, .prod = 0xff00a725, .disable = 0x00000000}, | ||
252 | {.addr = 0x00419ce4, .prod = 0x10940000, .disable = 0x00000000}, | ||
253 | {.addr = 0x00419cf0, .prod = 0xff00a725, .disable = 0x00000000}, | ||
254 | {.addr = 0x00419c78, .prod = 0x10940000, .disable = 0x00000000}, | ||
255 | {.addr = 0x00419c7c, .prod = 0xff00a725, .disable = 0x00000000}, | ||
256 | {.addr = 0x00419fa0, .prod = 0x10940000, .disable = 0x00000000}, | ||
257 | {.addr = 0x00419fa4, .prod = 0xff00a725, .disable = 0x00000000}, | ||
258 | {.addr = 0x00419fa8, .prod = 0x10940000, .disable = 0x00000000}, | ||
259 | {.addr = 0x00419fac, .prod = 0xff00a725, .disable = 0x00000000}, | ||
260 | {.addr = 0x00419fb0, .prod = 0x10940000, .disable = 0x00000000}, | ||
261 | {.addr = 0x00419fb4, .prod = 0xff00a725, .disable = 0x00000000}, | ||
262 | {.addr = 0x00419fb8, .prod = 0x10940000, .disable = 0x00000000}, | ||
263 | {.addr = 0x00419fbc, .prod = 0xff00a725, .disable = 0x00000000}, | ||
264 | {.addr = 0x00419fc0, .prod = 0x10940000, .disable = 0x00000000}, | ||
265 | {.addr = 0x00419fc4, .prod = 0xff00a725, .disable = 0x00000000}, | ||
266 | {.addr = 0x00419fc8, .prod = 0x10940000, .disable = 0x00000000}, | ||
267 | {.addr = 0x00419fcc, .prod = 0xff00a725, .disable = 0x00000000}, | ||
268 | {.addr = 0x0041be30, .prod = 0x10940000, .disable = 0x00000000}, | ||
269 | {.addr = 0x0041be34, .prod = 0xff00a725, .disable = 0x00000000}, | ||
270 | {.addr = 0x0041bff0, .prod = 0x10747c00, .disable = 0x00000000}, | ||
271 | {.addr = 0x0041bff4, .prod = 0xff00000a, .disable = 0x00000000}, | ||
272 | {.addr = 0x0041bed8, .prod = 0x10240a00, .disable = 0x00000000}, | ||
273 | {.addr = 0x0041bee0, .prod = 0xff00000a, .disable = 0x00000000}, | ||
274 | {.addr = 0x00408820, .prod = 0x10940000, .disable = 0x00000000}, | ||
275 | {.addr = 0x00408824, .prod = 0xff00a725, .disable = 0x00000000}, | ||
276 | {.addr = 0x00408828, .prod = 0x10940000, .disable = 0x00000000}, | ||
277 | {.addr = 0x0040882c, .prod = 0xff00a725, .disable = 0x00000000}, | ||
278 | {.addr = 0x00408ac0, .prod = 0x10940000, .disable = 0x00000000}, | ||
279 | {.addr = 0x00408ac4, .prod = 0xff00a725, .disable = 0x00000000}, | ||
280 | {.addr = 0x00408ac8, .prod = 0x10940000, .disable = 0x00000000}, | ||
281 | {.addr = 0x00408acc, .prod = 0xff00a725, .disable = 0x00000000}, | ||
282 | {.addr = 0x00408ad0, .prod = 0x10940000, .disable = 0x00000000}, | ||
283 | {.addr = 0x00408ad4, .prod = 0xff00a725, .disable = 0x00000000}, | ||
284 | {.addr = 0x00408ad8, .prod = 0x10940000, .disable = 0x00000000}, | ||
285 | {.addr = 0x00408adc, .prod = 0xff00a725, .disable = 0x00000000}, | ||
286 | {.addr = 0x00408ae0, .prod = 0x10940000, .disable = 0x00000000}, | ||
287 | {.addr = 0x00408ae4, .prod = 0xff00a725, .disable = 0x00000000}, | ||
288 | {.addr = 0x00408ae8, .prod = 0x10940000, .disable = 0x00000000}, | ||
289 | {.addr = 0x00408aec, .prod = 0xff00a725, .disable = 0x00000000}, | ||
290 | {.addr = 0x004089c0, .prod = 0x10940000, .disable = 0x00000000}, | ||
291 | {.addr = 0x004089c4, .prod = 0xff00a725, .disable = 0x00000000}, | ||
292 | {.addr = 0x004089c8, .prod = 0x10940000, .disable = 0x00000000}, | ||
293 | {.addr = 0x004089cc, .prod = 0xff00a725, .disable = 0x00000000}, | ||
294 | {.addr = 0x004089d0, .prod = 0x10940000, .disable = 0x00000000}, | ||
295 | {.addr = 0x004089d4, .prod = 0xff00a725, .disable = 0x00000000}, | ||
296 | }; | ||
297 | |||
298 | /* therm gr */ | ||
299 | static const struct gating_desc gk20a_slcg_therm[] = { | ||
300 | {.addr = 0x000206b8, .prod = 0x00000000, .disable = 0x0000000f}, | ||
301 | }; | ||
302 | |||
303 | /* static inline functions */ | ||
304 | void gr_gk20a_slcg_gr_load_gating_prod(struct gk20a *g, | ||
305 | bool prod) | ||
306 | { | ||
307 | u32 i; | ||
308 | u32 size = sizeof(gk20a_slcg_gr) / sizeof(struct gating_desc); | ||
309 | |||
310 | if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) | ||
311 | return; | ||
312 | |||
313 | for (i = 0; i < size; i++) { | ||
314 | if (prod) | ||
315 | gk20a_writel(g, gk20a_slcg_gr[i].addr, | ||
316 | gk20a_slcg_gr[i].prod); | ||
317 | else | ||
318 | gk20a_writel(g, gk20a_slcg_gr[i].addr, | ||
319 | gk20a_slcg_gr[i].disable); | ||
320 | } | ||
321 | } | ||
322 | |||
323 | void ltc_gk20a_slcg_ltc_load_gating_prod(struct gk20a *g, | ||
324 | bool prod) | ||
325 | { | ||
326 | } | ||
327 | |||
328 | void gr_gk20a_slcg_perf_load_gating_prod(struct gk20a *g, | ||
329 | bool prod) | ||
330 | { | ||
331 | u32 i; | ||
332 | u32 size = sizeof(gk20a_slcg_perf) / sizeof(struct gating_desc); | ||
333 | |||
334 | if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) | ||
335 | return; | ||
336 | |||
337 | for (i = 0; i < size; i++) { | ||
338 | if (prod) | ||
339 | gk20a_writel(g, gk20a_slcg_perf[i].addr, | ||
340 | gk20a_slcg_perf[i].prod); | ||
341 | else | ||
342 | gk20a_writel(g, gk20a_slcg_perf[i].addr, | ||
343 | gk20a_slcg_perf[i].disable); | ||
344 | } | ||
345 | } | ||
346 | |||
347 | void gr_gk20a_blcg_gr_load_gating_prod(struct gk20a *g, | ||
348 | bool prod) | ||
349 | { | ||
350 | u32 i; | ||
351 | u32 size = sizeof(gk20a_blcg_gr) / sizeof(struct gating_desc); | ||
352 | |||
353 | if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) | ||
354 | return; | ||
355 | |||
356 | for (i = 0; i < size; i++) { | ||
357 | if (prod) | ||
358 | gk20a_writel(g, gk20a_blcg_gr[i].addr, | ||
359 | gk20a_blcg_gr[i].prod); | ||
360 | else | ||
361 | gk20a_writel(g, gk20a_blcg_gr[i].addr, | ||
362 | gk20a_blcg_gr[i].disable); | ||
363 | } | ||
364 | } | ||
365 | |||
366 | void gr_gk20a_pg_gr_load_gating_prod(struct gk20a *g, | ||
367 | bool prod) | ||
368 | { | ||
369 | u32 i; | ||
370 | u32 size = sizeof(gk20a_pg_gr) / sizeof(struct gating_desc); | ||
371 | |||
372 | if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) | ||
373 | return; | ||
374 | |||
375 | for (i = 0; i < size; i++) { | ||
376 | if (prod) | ||
377 | gk20a_writel(g, gk20a_pg_gr[i].addr, | ||
378 | gk20a_pg_gr[i].prod); | ||
379 | else | ||
380 | gk20a_writel(g, gk20a_pg_gr[i].addr, | ||
381 | gk20a_pg_gr[i].disable); | ||
382 | } | ||
383 | } | ||
384 | |||
385 | void gr_gk20a_slcg_therm_load_gating_prod(struct gk20a *g, | ||
386 | bool prod) | ||
387 | { | ||
388 | u32 i; | ||
389 | u32 size = sizeof(gk20a_slcg_therm) / sizeof(struct gating_desc); | ||
390 | |||
391 | if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) | ||
392 | return; | ||
393 | |||
394 | for (i = 0; i < size; i++) { | ||
395 | if (prod) | ||
396 | gk20a_writel(g, gk20a_slcg_therm[i].addr, | ||
397 | gk20a_slcg_therm[i].prod); | ||
398 | else | ||
399 | gk20a_writel(g, gk20a_slcg_therm[i].addr, | ||
400 | gk20a_slcg_therm[i].disable); | ||
401 | } | ||
402 | } | ||
403 | |||
404 | #endif /* __gk20a_gating_reglist_h__ */ | ||
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a_gating_reglist.h b/drivers/gpu/nvgpu/gk20a/gk20a_gating_reglist.h deleted file mode 100644 index e27c1633..00000000 --- a/drivers/gpu/nvgpu/gk20a/gk20a_gating_reglist.h +++ /dev/null | |||
@@ -1,47 +0,0 @@ | |||
1 | /* | ||
2 | * drivers/video/tegra/host/gk20a/gk20a_gating_reglist.h | ||
3 | * | ||
4 | * Copyright (c) 2012-2014, NVIDIA Corporation. All rights reserved. | ||
5 | * | ||
6 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
7 | * copy of this software and associated documentation files (the "Software"), | ||
8 | * to deal in the Software without restriction, including without limitation | ||
9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
10 | * and/or sell copies of the Software, and to permit persons to whom the | ||
11 | * Software is furnished to do so, subject to the following conditions: | ||
12 | * | ||
13 | * The above copyright notice and this permission notice shall be included in | ||
14 | * all copies or substantial portions of the Software. | ||
15 | * | ||
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | ||
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | ||
21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | ||
22 | * DEALINGS IN THE SOFTWARE. | ||
23 | * | ||
24 | * This file is autogenerated. Do not edit. | ||
25 | */ | ||
26 | |||
27 | #include "gk20a.h" | ||
28 | |||
29 | void gr_gk20a_slcg_gr_load_gating_prod(struct gk20a *g, | ||
30 | bool prod); | ||
31 | |||
32 | void gr_gk20a_slcg_perf_load_gating_prod(struct gk20a *g, | ||
33 | bool prod); | ||
34 | |||
35 | void ltc_gk20a_slcg_ltc_load_gating_prod(struct gk20a *g, | ||
36 | bool prod); | ||
37 | |||
38 | void gr_gk20a_blcg_gr_load_gating_prod(struct gk20a *g, | ||
39 | bool prod); | ||
40 | |||
41 | void gr_gk20a_pg_gr_load_gating_prod(struct gk20a *g, | ||
42 | bool prod); | ||
43 | |||
44 | void gr_gk20a_slcg_therm_load_gating_prod(struct gk20a *g, | ||
45 | bool prod); | ||
46 | |||
47 | |||
diff --git a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c index bbeaa40f..9fa6b6cc 100644 --- a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c | |||
@@ -43,7 +43,7 @@ | |||
43 | #include "gr_gm20b.h" | 43 | #include "gr_gm20b.h" |
44 | #include "ltc_gm20b.h" | 44 | #include "ltc_gm20b.h" |
45 | #include "fb_gm20b.h" | 45 | #include "fb_gm20b.h" |
46 | #include "gm20b_gating_reglist.h" | 46 | #include "clock_gating/gm20b_gating_reglist.h" |
47 | #include "fifo_gm20b.h" | 47 | #include "fifo_gm20b.h" |
48 | #include "gr_ctx_gm20b.h" | 48 | #include "gr_ctx_gm20b.h" |
49 | #include "mm_gm20b.h" | 49 | #include "mm_gm20b.h" |
diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c index 66123fab..7a8a8e16 100644 --- a/drivers/gpu/nvgpu/gp106/hal_gp106.c +++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c | |||
@@ -78,7 +78,7 @@ | |||
78 | #include "gp106/gr_ctx_gp106.h" | 78 | #include "gp106/gr_ctx_gp106.h" |
79 | #include "gp106/gr_gp106.h" | 79 | #include "gp106/gr_gp106.h" |
80 | #include "gp106/fb_gp106.h" | 80 | #include "gp106/fb_gp106.h" |
81 | #include "gp106/gp106_gating_reglist.h" | 81 | #include "clock_gating/gp106_gating_reglist.h" |
82 | #include "gp106/flcn_gp106.h" | 82 | #include "gp106/flcn_gp106.h" |
83 | #include "gp106/fuse_gp106.h" | 83 | #include "gp106/fuse_gp106.h" |
84 | 84 | ||
diff --git a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c index e4bf0fd7..6d7d32ac 100644 --- a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c | |||
@@ -48,7 +48,7 @@ | |||
48 | #include "gp10b/pmu_gp10b.h" | 48 | #include "gp10b/pmu_gp10b.h" |
49 | #include "gp10b/gr_ctx_gp10b.h" | 49 | #include "gp10b/gr_ctx_gp10b.h" |
50 | #include "gp10b/fifo_gp10b.h" | 50 | #include "gp10b/fifo_gp10b.h" |
51 | #include "gp10b/gp10b_gating_reglist.h" | 51 | #include "clock_gating/gp10b_gating_reglist.h" |
52 | #include "gp10b/regops_gp10b.h" | 52 | #include "gp10b/regops_gp10b.h" |
53 | #include "gp10b/therm_gp10b.h" | 53 | #include "gp10b/therm_gp10b.h" |
54 | #include "gp10b/priv_ring_gp10b.h" | 54 | #include "gp10b/priv_ring_gp10b.h" |
diff --git a/drivers/gpu/nvgpu/gv100/hal_gv100.c b/drivers/gpu/nvgpu/gv100/hal_gv100.c index 28bad8d6..a4dd09ec 100644 --- a/drivers/gpu/nvgpu/gv100/hal_gv100.c +++ b/drivers/gpu/nvgpu/gv100/hal_gv100.c | |||
@@ -97,7 +97,7 @@ | |||
97 | #include "gv100/pmu_gv100.h" | 97 | #include "gv100/pmu_gv100.h" |
98 | #include "gv100/nvlink_gv100.h" | 98 | #include "gv100/nvlink_gv100.h" |
99 | #include "gv100/regops_gv100.h" | 99 | #include "gv100/regops_gv100.h" |
100 | #include "gv100/gv100_gating_reglist.h" | 100 | #include "clock_gating/gv100_gating_reglist.h" |
101 | 101 | ||
102 | #include <nvgpu/bus.h> | 102 | #include <nvgpu/bus.h> |
103 | #include <nvgpu/debug.h> | 103 | #include <nvgpu/debug.h> |
diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c index ff779075..be8ea76e 100644 --- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c | |||
@@ -76,7 +76,7 @@ | |||
76 | #include "acr_gv11b.h" | 76 | #include "acr_gv11b.h" |
77 | #include "fb_gv11b.h" | 77 | #include "fb_gv11b.h" |
78 | #include "fifo_gv11b.h" | 78 | #include "fifo_gv11b.h" |
79 | #include "gv11b_gating_reglist.h" | 79 | #include "clock_gating/gv11b_gating_reglist.h" |
80 | #include "regops_gv11b.h" | 80 | #include "regops_gv11b.h" |
81 | #include "subctx_gv11b.h" | 81 | #include "subctx_gv11b.h" |
82 | #include "therm_gv11b.h" | 82 | #include "therm_gv11b.h" |
diff --git a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c index 7810ab42..43bf6766 100644 --- a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c +++ b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c | |||
@@ -50,7 +50,7 @@ | |||
50 | #include "gp10b/gr_gp10b.h" | 50 | #include "gp10b/gr_gp10b.h" |
51 | #include "gp10b/gr_ctx_gp10b.h" | 51 | #include "gp10b/gr_ctx_gp10b.h" |
52 | #include "gp10b/fifo_gp10b.h" | 52 | #include "gp10b/fifo_gp10b.h" |
53 | #include "gp10b/gp10b_gating_reglist.h" | 53 | #include "clock_gating/gp10b_gating_reglist.h" |
54 | #include "gp10b/regops_gp10b.h" | 54 | #include "gp10b/regops_gp10b.h" |
55 | #include "gp10b/therm_gp10b.h" | 55 | #include "gp10b/therm_gp10b.h" |
56 | #include "gp10b/priv_ring_gp10b.h" | 56 | #include "gp10b/priv_ring_gp10b.h" |
diff --git a/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c b/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c index 72db457b..b7bb23a7 100644 --- a/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c +++ b/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c | |||
@@ -75,7 +75,7 @@ | |||
75 | #include <gv11b/regops_gv11b.h> | 75 | #include <gv11b/regops_gv11b.h> |
76 | #include <gv11b/gr_ctx_gv11b.h> | 76 | #include <gv11b/gr_ctx_gv11b.h> |
77 | #include <gv11b/ltc_gv11b.h> | 77 | #include <gv11b/ltc_gv11b.h> |
78 | #include <gv11b/gv11b_gating_reglist.h> | 78 | #include <clock_gating/gv11b_gating_reglist.h> |
79 | #include <gv11b/gr_gv11b.h> | 79 | #include <gv11b/gr_gv11b.h> |
80 | 80 | ||
81 | #include <nvgpu/enabled.h> | 81 | #include <nvgpu/enabled.h> |