diff options
author | David Ung <davidu@nvidia.com> | 2020-04-27 19:15:59 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2020-05-22 01:54:17 -0400 |
commit | dfab7cc86acdc26c3705551740c55b4d4898587a (patch) | |
tree | 5beb5f71979239a74d9f557233abb1470ba1a7c5 | |
parent | aa6d4d08d4c161aa91ba2ef4330e03b61a0ca3cb (diff) |
gpu: nvgpu: Regenerated headers
Regenerating header from register generator
Bug 2833620
Change-Id: Idc8e922bb611ed5acae66b6ca38db4bb9c8a1904
Signed-off-by: David Ung <davidu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2335263
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
10 files changed, 34 insertions, 22 deletions
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gk20a/hw_pwr_gk20a.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gk20a/hw_pwr_gk20a.h index 28457634..cf60ae51 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gk20a/hw_pwr_gk20a.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gk20a/hw_pwr_gk20a.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2012-2017, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2012-2020, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), | 5 | * copy of this software and associated documentation files (the "Software"), |
@@ -706,7 +706,7 @@ static inline u32 pwr_pmu_idle_intr_status_intr_f(u32 v) | |||
706 | } | 706 | } |
707 | static inline u32 pwr_pmu_idle_intr_status_intr_m(void) | 707 | static inline u32 pwr_pmu_idle_intr_status_intr_m(void) |
708 | { | 708 | { |
709 | return U32(0x1U) << 0U; | 709 | return 0x1U << 0U; |
710 | } | 710 | } |
711 | static inline u32 pwr_pmu_idle_intr_status_intr_v(u32 r) | 711 | static inline u32 pwr_pmu_idle_intr_status_intr_v(u32 r) |
712 | { | 712 | { |
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gm20b/hw_ctxsw_prog_gm20b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gm20b/hw_ctxsw_prog_gm20b.h index b60dfc36..6b5632a6 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gm20b/hw_ctxsw_prog_gm20b.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gm20b/hw_ctxsw_prog_gm20b.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2014-2020, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), | 5 | * copy of this software and associated documentation files (the "Software"), |
@@ -116,6 +116,10 @@ static inline u32 ctxsw_prog_main_image_pm_mode_m(void) | |||
116 | { | 116 | { |
117 | return 0x7U << 0U; | 117 | return 0x7U << 0U; |
118 | } | 118 | } |
119 | static inline u32 ctxsw_prog_main_image_pm_mode_ctxsw_f(void) | ||
120 | { | ||
121 | return 0x1U; | ||
122 | } | ||
119 | static inline u32 ctxsw_prog_main_image_pm_mode_no_ctxsw_f(void) | 123 | static inline u32 ctxsw_prog_main_image_pm_mode_no_ctxsw_f(void) |
120 | { | 124 | { |
121 | return 0x0U; | 125 | return 0x0U; |
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gm20b/hw_pwr_gm20b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gm20b/hw_pwr_gm20b.h index 2ca1f02b..7b339ae5 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gm20b/hw_pwr_gm20b.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gm20b/hw_pwr_gm20b.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2014-2020, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), | 5 | * copy of this software and associated documentation files (the "Software"), |
@@ -750,7 +750,7 @@ static inline u32 pwr_pmu_idle_intr_status_intr_f(u32 v) | |||
750 | } | 750 | } |
751 | static inline u32 pwr_pmu_idle_intr_status_intr_m(void) | 751 | static inline u32 pwr_pmu_idle_intr_status_intr_m(void) |
752 | { | 752 | { |
753 | return U32(0x1U) << 0U; | 753 | return 0x1U << 0U; |
754 | } | 754 | } |
755 | static inline u32 pwr_pmu_idle_intr_status_intr_v(u32 r) | 755 | static inline u32 pwr_pmu_idle_intr_status_intr_v(u32 r) |
756 | { | 756 | { |
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_ctxsw_prog_gp10b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_ctxsw_prog_gp10b.h index b214bdb3..d83320fe 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_ctxsw_prog_gp10b.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_ctxsw_prog_gp10b.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2014-2020, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), | 5 | * copy of this software and associated documentation files (the "Software"), |
@@ -104,6 +104,10 @@ static inline u32 ctxsw_prog_main_image_pm_mode_m(void) | |||
104 | { | 104 | { |
105 | return 0x7U << 0U; | 105 | return 0x7U << 0U; |
106 | } | 106 | } |
107 | static inline u32 ctxsw_prog_main_image_pm_mode_ctxsw_f(void) | ||
108 | { | ||
109 | return 0x1U; | ||
110 | } | ||
107 | static inline u32 ctxsw_prog_main_image_pm_mode_no_ctxsw_f(void) | 111 | static inline u32 ctxsw_prog_main_image_pm_mode_no_ctxsw_f(void) |
108 | { | 112 | { |
109 | return 0x0U; | 113 | return 0x0U; |
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_gmmu_gp10b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_gmmu_gp10b.h index 07f39943..6aeb4355 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_gmmu_gp10b.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_gmmu_gp10b.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2014-2020, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), | 5 | * copy of this software and associated documentation files (the "Software"), |
@@ -86,7 +86,7 @@ static inline u32 gmmu_new_pde_aperture_sys_mem_ncoh_f(void) | |||
86 | } | 86 | } |
87 | static inline u32 gmmu_new_pde_address_sys_f(u32 v) | 87 | static inline u32 gmmu_new_pde_address_sys_f(u32 v) |
88 | { | 88 | { |
89 | return (v & 0xfffffffU) << 8U; | 89 | return (v & 0xffffffU) << 8U; |
90 | } | 90 | } |
91 | static inline u32 gmmu_new_pde_address_sys_w(void) | 91 | static inline u32 gmmu_new_pde_address_sys_w(void) |
92 | { | 92 | { |
@@ -194,7 +194,7 @@ static inline u32 gmmu_new_dual_pde_vol_big_false_f(void) | |||
194 | } | 194 | } |
195 | static inline u32 gmmu_new_dual_pde_address_small_sys_f(u32 v) | 195 | static inline u32 gmmu_new_dual_pde_address_small_sys_f(u32 v) |
196 | { | 196 | { |
197 | return (v & 0xfffffffU) << 8U; | 197 | return (v & 0xffffffU) << 8U; |
198 | } | 198 | } |
199 | static inline u32 gmmu_new_dual_pde_address_small_sys_w(void) | 199 | static inline u32 gmmu_new_dual_pde_address_small_sys_w(void) |
200 | { | 200 | { |
@@ -242,7 +242,7 @@ static inline u32 gmmu_new_pte_privilege_false_f(void) | |||
242 | } | 242 | } |
243 | static inline u32 gmmu_new_pte_address_sys_f(u32 v) | 243 | static inline u32 gmmu_new_pte_address_sys_f(u32 v) |
244 | { | 244 | { |
245 | return (v & 0xfffffffU) << 8U; | 245 | return (v & 0xffffffU) << 8U; |
246 | } | 246 | } |
247 | static inline u32 gmmu_new_pte_address_sys_w(void) | 247 | static inline u32 gmmu_new_pte_address_sys_w(void) |
248 | { | 248 | { |
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_pwr_gp10b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_pwr_gp10b.h index c160e897..75f1c046 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_pwr_gp10b.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_pwr_gp10b.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2014-2020, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), | 5 | * copy of this software and associated documentation files (the "Software"), |
@@ -754,7 +754,7 @@ static inline u32 pwr_pmu_idle_intr_status_intr_f(u32 v) | |||
754 | } | 754 | } |
755 | static inline u32 pwr_pmu_idle_intr_status_intr_m(void) | 755 | static inline u32 pwr_pmu_idle_intr_status_intr_m(void) |
756 | { | 756 | { |
757 | return U32(0x1U) << 0U; | 757 | return 0x1U << 0U; |
758 | } | 758 | } |
759 | static inline u32 pwr_pmu_idle_intr_status_intr_v(u32 r) | 759 | static inline u32 pwr_pmu_idle_intr_status_intr_v(u32 r) |
760 | { | 760 | { |
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_ctxsw_prog_gv11b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_ctxsw_prog_gv11b.h index aa8e6190..8b095b1a 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_ctxsw_prog_gv11b.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_ctxsw_prog_gv11b.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2016-2020, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), | 5 | * copy of this software and associated documentation files (the "Software"), |
@@ -140,6 +140,10 @@ static inline u32 ctxsw_prog_main_image_pm_mode_m(void) | |||
140 | { | 140 | { |
141 | return 0x7U << 0U; | 141 | return 0x7U << 0U; |
142 | } | 142 | } |
143 | static inline u32 ctxsw_prog_main_image_pm_mode_ctxsw_f(void) | ||
144 | { | ||
145 | return 0x1U; | ||
146 | } | ||
143 | static inline u32 ctxsw_prog_main_image_pm_mode_no_ctxsw_f(void) | 147 | static inline u32 ctxsw_prog_main_image_pm_mode_no_ctxsw_f(void) |
144 | { | 148 | { |
145 | return 0x0U; | 149 | return 0x0U; |
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fb_gv11b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fb_gv11b.h index fe35bb71..767fc5a0 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fb_gv11b.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fb_gv11b.h | |||
@@ -62,7 +62,7 @@ static inline u32 fb_fbhub_num_active_ltcs_r(void) | |||
62 | } | 62 | } |
63 | static inline u32 fb_fbhub_num_active_ltcs_hub_sys_atomic_mode_m(void) | 63 | static inline u32 fb_fbhub_num_active_ltcs_hub_sys_atomic_mode_m(void) |
64 | { | 64 | { |
65 | return U32(0x1U) << 25U; | 65 | return 0x1U << 25U; |
66 | } | 66 | } |
67 | static inline u32 fb_fbhub_num_active_ltcs_hub_sys_atomic_mode_use_rmw_f(void) | 67 | static inline u32 fb_fbhub_num_active_ltcs_hub_sys_atomic_mode_use_rmw_f(void) |
68 | { | 68 | { |
@@ -70,7 +70,7 @@ static inline u32 fb_fbhub_num_active_ltcs_hub_sys_atomic_mode_use_rmw_f(void) | |||
70 | } | 70 | } |
71 | static inline u32 fb_fbhub_num_active_ltcs_hub_sys_ncoh_atomic_mode_m(void) | 71 | static inline u32 fb_fbhub_num_active_ltcs_hub_sys_ncoh_atomic_mode_m(void) |
72 | { | 72 | { |
73 | return U32(0x1U) << 26U; | 73 | return 0x1U << 26U; |
74 | } | 74 | } |
75 | static inline u32 fb_fbhub_num_active_ltcs_hub_sys_ncoh_atomic_mode_use_read_f(void) | 75 | static inline u32 fb_fbhub_num_active_ltcs_hub_sys_ncoh_atomic_mode_use_read_f(void) |
76 | { | 76 | { |
@@ -94,7 +94,7 @@ static inline u32 fb_mmu_ctrl_pri_fifo_space_v(u32 r) | |||
94 | } | 94 | } |
95 | static inline u32 fb_mmu_ctrl_atomic_capability_mode_m(void) | 95 | static inline u32 fb_mmu_ctrl_atomic_capability_mode_m(void) |
96 | { | 96 | { |
97 | return U32(0x3U) << 24U; | 97 | return 0x3U << 24U; |
98 | } | 98 | } |
99 | static inline u32 fb_mmu_ctrl_atomic_capability_mode_l2_f(void) | 99 | static inline u32 fb_mmu_ctrl_atomic_capability_mode_l2_f(void) |
100 | { | 100 | { |
@@ -106,7 +106,7 @@ static inline u32 fb_mmu_ctrl_atomic_capability_mode_rmw_f(void) | |||
106 | } | 106 | } |
107 | static inline u32 fb_mmu_ctrl_atomic_capability_sys_ncoh_mode_m(void) | 107 | static inline u32 fb_mmu_ctrl_atomic_capability_sys_ncoh_mode_m(void) |
108 | { | 108 | { |
109 | return U32(0x1U) << 27U; | 109 | return 0x1U << 27U; |
110 | } | 110 | } |
111 | static inline u32 fb_mmu_ctrl_atomic_capability_sys_ncoh_mode_l2_f(void) | 111 | static inline u32 fb_mmu_ctrl_atomic_capability_sys_ncoh_mode_l2_f(void) |
112 | { | 112 | { |
@@ -118,7 +118,7 @@ static inline u32 fb_hshub_num_active_ltcs_r(void) | |||
118 | } | 118 | } |
119 | static inline u32 fb_hshub_num_active_ltcs_hub_sys_atomic_mode_m(void) | 119 | static inline u32 fb_hshub_num_active_ltcs_hub_sys_atomic_mode_m(void) |
120 | { | 120 | { |
121 | return U32(0x1U) << 25U; | 121 | return 0x1U << 25U; |
122 | } | 122 | } |
123 | static inline u32 fb_hshub_num_active_ltcs_hub_sys_atomic_mode_use_read_f(void) | 123 | static inline u32 fb_hshub_num_active_ltcs_hub_sys_atomic_mode_use_read_f(void) |
124 | { | 124 | { |
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gr_gv11b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gr_gv11b.h index 01dc99d5..f7d8089d 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gr_gv11b.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gr_gv11b.h | |||
@@ -4978,11 +4978,11 @@ static inline u32 gr_gpcs_pri_mmu_ctrl_mmu_disable_m(void) | |||
4978 | } | 4978 | } |
4979 | static inline u32 gr_gpcs_pri_mmu_ctrl_atomic_capability_mode_m(void) | 4979 | static inline u32 gr_gpcs_pri_mmu_ctrl_atomic_capability_mode_m(void) |
4980 | { | 4980 | { |
4981 | return U32(0x3U) << 24U; | 4981 | return 0x3U << 24U; |
4982 | } | 4982 | } |
4983 | static inline u32 gr_gpcs_pri_mmu_ctrl_atomic_capability_sys_ncoh_mode_m(void) | 4983 | static inline u32 gr_gpcs_pri_mmu_ctrl_atomic_capability_sys_ncoh_mode_m(void) |
4984 | { | 4984 | { |
4985 | return U32(0x1U) << 27U; | 4985 | return 0x1U << 27U; |
4986 | } | 4986 | } |
4987 | static inline u32 gr_gpcs_pri_mmu_pm_unit_mask_r(void) | 4987 | static inline u32 gr_gpcs_pri_mmu_pm_unit_mask_r(void) |
4988 | { | 4988 | { |
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_pwr_gv11b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_pwr_gv11b.h index 295c6e95..03affe8e 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_pwr_gv11b.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_pwr_gv11b.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2016-2020, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), | 5 | * copy of this software and associated documentation files (the "Software"), |
@@ -914,7 +914,7 @@ static inline u32 pwr_pmu_idle_intr_status_intr_f(u32 v) | |||
914 | } | 914 | } |
915 | static inline u32 pwr_pmu_idle_intr_status_intr_m(void) | 915 | static inline u32 pwr_pmu_idle_intr_status_intr_m(void) |
916 | { | 916 | { |
917 | return U32(0x1U) << 0U; | 917 | return 0x1U << 0U; |
918 | } | 918 | } |
919 | static inline u32 pwr_pmu_idle_intr_status_intr_v(u32 r) | 919 | static inline u32 pwr_pmu_idle_intr_status_intr_v(u32 r) |
920 | { | 920 | { |