diff options
author | Amulya <Amurthyreddy@nvidia.com> | 2018-08-17 07:29:52 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-08-21 17:54:51 -0400 |
commit | da43fc55606f40f27c0f823671bca16a979634cc (patch) | |
tree | 8c5a22b347ea1f76a2aa73baf66a22b607f218d6 | |
parent | 05f45bcfc390c46f000f4c6b46546eebed869df6 (diff) |
gpu: nvgpu: MISRA 10.3-Conversions to/from an enum
Fix violations where the conversion is from a non-enum type to enum
type or vice-versa.
JIRA NVGPU-659
Change-Id: I45f43c907b810cc86b2a4480809d0c6757ed3486
Signed-off-by: Amulya <Amurthyreddy@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1802322
GVS: Gerrit_Virtual_Submit
Tested-by: Amulya Murthyreddy <amurthyreddy@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
-rw-r--r-- | drivers/gpu/nvgpu/clk/clk_domain.h | 3 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/common/mm/gmmu.c | 10 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/fifo_gk20a.h | 3 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.h | 5 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/mm_gk20a.h | 6 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/include/nvgpu/gmmu.h | 6 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/pmgr/pwrpolicy.c | 3 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/vgpu/gp10b/vgpu_mm_gp10b.c | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/vgpu/gp10b/vgpu_mm_gp10b.h | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/vgpu/mm_vgpu.c | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/vgpu/mm_vgpu.h | 3 |
12 files changed, 27 insertions, 20 deletions
diff --git a/drivers/gpu/nvgpu/clk/clk_domain.h b/drivers/gpu/nvgpu/clk/clk_domain.h index 4c4a0de2..4441e7a1 100644 --- a/drivers/gpu/nvgpu/clk/clk_domain.h +++ b/drivers/gpu/nvgpu/clk/clk_domain.h | |||
@@ -35,6 +35,7 @@ | |||
35 | 35 | ||
36 | struct clk_domains; | 36 | struct clk_domains; |
37 | struct clk_domain; | 37 | struct clk_domain; |
38 | enum nv_pmu_clk_clkwhich; | ||
38 | 39 | ||
39 | /*data and function definition to talk to driver*/ | 40 | /*data and function definition to talk to driver*/ |
40 | u32 clk_domain_sw_setup(struct gk20a *g); | 41 | u32 clk_domain_sw_setup(struct gk20a *g); |
@@ -78,7 +79,7 @@ struct clk_domain { | |||
78 | struct boardobj super; | 79 | struct boardobj super; |
79 | u32 api_domain; | 80 | u32 api_domain; |
80 | u32 part_mask; | 81 | u32 part_mask; |
81 | u8 domain; | 82 | enum nv_pmu_clk_clkwhich domain; |
82 | u8 perf_domain_index; | 83 | u8 perf_domain_index; |
83 | u8 perf_domain_grp_idx; | 84 | u8 perf_domain_grp_idx; |
84 | u8 ratio_domain; | 85 | u8 ratio_domain; |
diff --git a/drivers/gpu/nvgpu/common/mm/gmmu.c b/drivers/gpu/nvgpu/common/mm/gmmu.c index 498cdf06..73a37b57 100644 --- a/drivers/gpu/nvgpu/common/mm/gmmu.c +++ b/drivers/gpu/nvgpu/common/mm/gmmu.c | |||
@@ -70,7 +70,7 @@ static u64 __nvgpu_gmmu_map(struct vm_gk20a *vm, | |||
70 | u64 addr, | 70 | u64 addr, |
71 | u64 size, | 71 | u64 size, |
72 | u32 flags, | 72 | u32 flags, |
73 | int rw_flag, | 73 | enum gk20a_mem_rw_flag rw_flag, |
74 | bool priv, | 74 | bool priv, |
75 | enum nvgpu_aperture aperture) | 75 | enum nvgpu_aperture aperture) |
76 | { | 76 | { |
@@ -137,7 +137,7 @@ u64 nvgpu_gmmu_map(struct vm_gk20a *vm, | |||
137 | struct nvgpu_mem *mem, | 137 | struct nvgpu_mem *mem, |
138 | u64 size, | 138 | u64 size, |
139 | u32 flags, | 139 | u32 flags, |
140 | int rw_flag, | 140 | enum gk20a_mem_rw_flag rw_flag, |
141 | bool priv, | 141 | bool priv, |
142 | enum nvgpu_aperture aperture) | 142 | enum nvgpu_aperture aperture) |
143 | { | 143 | { |
@@ -153,7 +153,7 @@ u64 nvgpu_gmmu_map_fixed(struct vm_gk20a *vm, | |||
153 | u64 addr, | 153 | u64 addr, |
154 | u64 size, | 154 | u64 size, |
155 | u32 flags, | 155 | u32 flags, |
156 | int rw_flag, | 156 | enum gk20a_mem_rw_flag rw_flag, |
157 | bool priv, | 157 | bool priv, |
158 | enum nvgpu_aperture aperture) | 158 | enum nvgpu_aperture aperture) |
159 | { | 159 | { |
@@ -680,7 +680,7 @@ u64 gk20a_locked_gmmu_map(struct vm_gk20a *vm, | |||
680 | u8 kind_v, | 680 | u8 kind_v, |
681 | u32 ctag_offset, | 681 | u32 ctag_offset, |
682 | u32 flags, | 682 | u32 flags, |
683 | int rw_flag, | 683 | enum gk20a_mem_rw_flag rw_flag, |
684 | bool clear_ctags, | 684 | bool clear_ctags, |
685 | bool sparse, | 685 | bool sparse, |
686 | bool priv, | 686 | bool priv, |
@@ -766,7 +766,7 @@ void gk20a_locked_gmmu_unmap(struct vm_gk20a *vm, | |||
766 | u64 size, | 766 | u64 size, |
767 | int pgsz_idx, | 767 | int pgsz_idx, |
768 | bool va_allocated, | 768 | bool va_allocated, |
769 | int rw_flag, | 769 | enum gk20a_mem_rw_flag rw_flag, |
770 | bool sparse, | 770 | bool sparse, |
771 | struct vm_gk20a_mapping_batch *batch) | 771 | struct vm_gk20a_mapping_batch *batch) |
772 | { | 772 | { |
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c index fc6c9ad2..4628de4f 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | |||
@@ -2720,7 +2720,7 @@ void gk20a_fifo_isr(struct gk20a *g) | |||
2720 | return; | 2720 | return; |
2721 | } | 2721 | } |
2722 | 2722 | ||
2723 | u32 gk20a_fifo_nonstall_isr(struct gk20a *g) | 2723 | enum gk20a_nonstall_ops gk20a_fifo_nonstall_isr(struct gk20a *g) |
2724 | { | 2724 | { |
2725 | u32 fifo_intr = gk20a_readl(g, fifo_intr_0_r()); | 2725 | u32 fifo_intr = gk20a_readl(g, fifo_intr_0_r()); |
2726 | u32 clear_intr = 0; | 2726 | u32 clear_intr = 0; |
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h index 77030c94..120950c1 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h | |||
@@ -31,6 +31,7 @@ | |||
31 | 31 | ||
32 | struct gk20a_debug_output; | 32 | struct gk20a_debug_output; |
33 | struct mmu_fault_info; | 33 | struct mmu_fault_info; |
34 | enum gk20a_nonstall_ops; | ||
34 | 35 | ||
35 | enum { | 36 | enum { |
36 | NVGPU_FIFO_RUNLIST_INTERLEAVE_LEVEL_LOW = 0, | 37 | NVGPU_FIFO_RUNLIST_INTERLEAVE_LEVEL_LOW = 0, |
@@ -228,7 +229,7 @@ int gk20a_init_fifo_support(struct gk20a *g); | |||
228 | int gk20a_init_fifo_setup_hw(struct gk20a *g); | 229 | int gk20a_init_fifo_setup_hw(struct gk20a *g); |
229 | 230 | ||
230 | void gk20a_fifo_isr(struct gk20a *g); | 231 | void gk20a_fifo_isr(struct gk20a *g); |
231 | u32 gk20a_fifo_nonstall_isr(struct gk20a *g); | 232 | enum gk20a_nonstall_ops gk20a_fifo_nonstall_isr(struct gk20a *g); |
232 | 233 | ||
233 | int gk20a_fifo_preempt_channel(struct gk20a *g, u32 chid); | 234 | int gk20a_fifo_preempt_channel(struct gk20a *g, u32 chid); |
234 | int gk20a_fifo_preempt_tsg(struct gk20a *g, u32 tsgid); | 235 | int gk20a_fifo_preempt_tsg(struct gk20a *g, u32 tsgid); |
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index febd7e0c..262dbb2c 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h | |||
@@ -139,6 +139,7 @@ enum gk20a_cbc_op { | |||
139 | enum nvgpu_unit; | 139 | enum nvgpu_unit; |
140 | 140 | ||
141 | enum nvgpu_flush_op; | 141 | enum nvgpu_flush_op; |
142 | enum gk20a_mem_rw_flag; | ||
142 | 143 | ||
143 | struct _resmgr_context; | 144 | struct _resmgr_context; |
144 | struct nvgpu_gpfifo_entry; | 145 | struct nvgpu_gpfifo_entry; |
@@ -924,7 +925,7 @@ struct gpu_ops { | |||
924 | u8 kind_v, | 925 | u8 kind_v, |
925 | u32 ctag_offset, | 926 | u32 ctag_offset, |
926 | u32 flags, | 927 | u32 flags, |
927 | int rw_flag, | 928 | enum gk20a_mem_rw_flag rw_flag, |
928 | bool clear_ctags, | 929 | bool clear_ctags, |
929 | bool sparse, | 930 | bool sparse, |
930 | bool priv, | 931 | bool priv, |
@@ -935,7 +936,7 @@ struct gpu_ops { | |||
935 | u64 size, | 936 | u64 size, |
936 | int pgsz_idx, | 937 | int pgsz_idx, |
937 | bool va_allocated, | 938 | bool va_allocated, |
938 | int rw_flag, | 939 | enum gk20a_mem_rw_flag rw_flag, |
939 | bool sparse, | 940 | bool sparse, |
940 | struct vm_gk20a_mapping_batch *batch); | 941 | struct vm_gk20a_mapping_batch *batch); |
941 | int (*vm_bind_channel)(struct vm_gk20a *vm, | 942 | int (*vm_bind_channel)(struct vm_gk20a *vm, |
diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h index 7b7c2ef7..b99603bb 100644 --- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h | |||
@@ -30,6 +30,8 @@ | |||
30 | #include <nvgpu/rbtree.h> | 30 | #include <nvgpu/rbtree.h> |
31 | #include <nvgpu/kref.h> | 31 | #include <nvgpu/kref.h> |
32 | 32 | ||
33 | enum gk20a_mem_rw_flag; | ||
34 | |||
33 | struct gpfifo_desc { | 35 | struct gpfifo_desc { |
34 | struct nvgpu_mem mem; | 36 | struct nvgpu_mem mem; |
35 | u32 entry_num; | 37 | u32 entry_num; |
@@ -141,7 +143,7 @@ u64 gk20a_locked_gmmu_map(struct vm_gk20a *vm, | |||
141 | u8 kind_v, | 143 | u8 kind_v, |
142 | u32 ctag_offset, | 144 | u32 ctag_offset, |
143 | u32 flags, | 145 | u32 flags, |
144 | int rw_flag, | 146 | enum gk20a_mem_rw_flag rw_flag, |
145 | bool clear_ctags, | 147 | bool clear_ctags, |
146 | bool sparse, | 148 | bool sparse, |
147 | bool priv, | 149 | bool priv, |
@@ -153,7 +155,7 @@ void gk20a_locked_gmmu_unmap(struct vm_gk20a *vm, | |||
153 | u64 size, | 155 | u64 size, |
154 | int pgsz_idx, | 156 | int pgsz_idx, |
155 | bool va_allocated, | 157 | bool va_allocated, |
156 | int rw_flag, | 158 | enum gk20a_mem_rw_flag rw_flag, |
157 | bool sparse, | 159 | bool sparse, |
158 | struct vm_gk20a_mapping_batch *batch); | 160 | struct vm_gk20a_mapping_batch *batch); |
159 | 161 | ||
diff --git a/drivers/gpu/nvgpu/include/nvgpu/gmmu.h b/drivers/gpu/nvgpu/include/nvgpu/gmmu.h index 02b211d6..886a79da 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/gmmu.h +++ b/drivers/gpu/nvgpu/include/nvgpu/gmmu.h | |||
@@ -168,7 +168,7 @@ struct nvgpu_gmmu_attrs { | |||
168 | u32 kind_v; | 168 | u32 kind_v; |
169 | u64 ctag; | 169 | u64 ctag; |
170 | bool cacheable; | 170 | bool cacheable; |
171 | int rw_flag; | 171 | enum gk20a_mem_rw_flag rw_flag; |
172 | bool sparse; | 172 | bool sparse; |
173 | bool priv; | 173 | bool priv; |
174 | bool coherent; | 174 | bool coherent; |
@@ -227,7 +227,7 @@ u64 nvgpu_gmmu_map(struct vm_gk20a *vm, | |||
227 | struct nvgpu_mem *mem, | 227 | struct nvgpu_mem *mem, |
228 | u64 size, | 228 | u64 size, |
229 | u32 flags, | 229 | u32 flags, |
230 | int rw_flag, | 230 | enum gk20a_mem_rw_flag rw_flag, |
231 | bool priv, | 231 | bool priv, |
232 | enum nvgpu_aperture aperture); | 232 | enum nvgpu_aperture aperture); |
233 | 233 | ||
@@ -241,7 +241,7 @@ u64 nvgpu_gmmu_map_fixed(struct vm_gk20a *vm, | |||
241 | u64 addr, | 241 | u64 addr, |
242 | u64 size, | 242 | u64 size, |
243 | u32 flags, | 243 | u32 flags, |
244 | int rw_flag, | 244 | enum gk20a_mem_rw_flag rw_flag, |
245 | bool priv, | 245 | bool priv, |
246 | enum nvgpu_aperture aperture); | 246 | enum nvgpu_aperture aperture); |
247 | 247 | ||
diff --git a/drivers/gpu/nvgpu/pmgr/pwrpolicy.c b/drivers/gpu/nvgpu/pmgr/pwrpolicy.c index 0d617f6a..38575f74 100644 --- a/drivers/gpu/nvgpu/pmgr/pwrpolicy.c +++ b/drivers/gpu/nvgpu/pmgr/pwrpolicy.c | |||
@@ -643,7 +643,8 @@ static u32 devinit_get_pwr_policy_table(struct gk20a *g, | |||
643 | pwr_policy_data.pwrpolicy.limit_unit = (u8) | 643 | pwr_policy_data.pwrpolicy.limit_unit = (u8) |
644 | BIOS_GET_FIELD(entry.flags0, | 644 | BIOS_GET_FIELD(entry.flags0, |
645 | NV_VBIOS_POWER_POLICY_3X_ENTRY_FLAGS0_LIMIT_UNIT); | 645 | NV_VBIOS_POWER_POLICY_3X_ENTRY_FLAGS0_LIMIT_UNIT); |
646 | pwr_policy_data.pwrpolicy.filter_type = (u8) | 646 | pwr_policy_data.pwrpolicy.filter_type = |
647 | (enum ctrl_pmgr_pwr_policy_filter_type) | ||
647 | BIOS_GET_FIELD(entry.flags1, | 648 | BIOS_GET_FIELD(entry.flags1, |
648 | NV_VBIOS_POWER_POLICY_3X_ENTRY_FLAGS1_FILTER_TYPE); | 649 | NV_VBIOS_POWER_POLICY_3X_ENTRY_FLAGS1_FILTER_TYPE); |
649 | 650 | ||
diff --git a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_mm_gp10b.c b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_mm_gp10b.c index b8c4d2de..e7bd0a49 100644 --- a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_mm_gp10b.c +++ b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_mm_gp10b.c | |||
@@ -57,7 +57,7 @@ u64 vgpu_gp10b_locked_gmmu_map(struct vm_gk20a *vm, | |||
57 | u8 kind_v, | 57 | u8 kind_v, |
58 | u32 ctag_offset, | 58 | u32 ctag_offset, |
59 | u32 flags, | 59 | u32 flags, |
60 | int rw_flag, | 60 | enum gk20a_mem_rw_flag rw_flag, |
61 | bool clear_ctags, | 61 | bool clear_ctags, |
62 | bool sparse, | 62 | bool sparse, |
63 | bool priv, | 63 | bool priv, |
diff --git a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_mm_gp10b.h b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_mm_gp10b.h index 44072dd6..9435b75f 100644 --- a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_mm_gp10b.h +++ b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_mm_gp10b.h | |||
@@ -34,7 +34,7 @@ u64 vgpu_gp10b_locked_gmmu_map(struct vm_gk20a *vm, | |||
34 | u8 kind_v, | 34 | u8 kind_v, |
35 | u32 ctag_offset, | 35 | u32 ctag_offset, |
36 | u32 flags, | 36 | u32 flags, |
37 | int rw_flag, | 37 | enum gk20a_mem_rw_flag rw_flag, |
38 | bool clear_ctags, | 38 | bool clear_ctags, |
39 | bool sparse, | 39 | bool sparse, |
40 | bool priv, | 40 | bool priv, |
diff --git a/drivers/gpu/nvgpu/vgpu/mm_vgpu.c b/drivers/gpu/nvgpu/vgpu/mm_vgpu.c index b8eaa1db..54b1e7c2 100644 --- a/drivers/gpu/nvgpu/vgpu/mm_vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/mm_vgpu.c | |||
@@ -86,7 +86,7 @@ void vgpu_locked_gmmu_unmap(struct vm_gk20a *vm, | |||
86 | u64 size, | 86 | u64 size, |
87 | int pgsz_idx, | 87 | int pgsz_idx, |
88 | bool va_allocated, | 88 | bool va_allocated, |
89 | int rw_flag, | 89 | enum gk20a_mem_rw_flag rw_flag, |
90 | bool sparse, | 90 | bool sparse, |
91 | struct vm_gk20a_mapping_batch *batch) | 91 | struct vm_gk20a_mapping_batch *batch) |
92 | { | 92 | { |
diff --git a/drivers/gpu/nvgpu/vgpu/mm_vgpu.h b/drivers/gpu/nvgpu/vgpu/mm_vgpu.h index c019ca22..e8f40d5c 100644 --- a/drivers/gpu/nvgpu/vgpu/mm_vgpu.h +++ b/drivers/gpu/nvgpu/vgpu/mm_vgpu.h | |||
@@ -28,13 +28,14 @@ struct channel_gk20a; | |||
28 | struct vm_gk20a_mapping_batch; | 28 | struct vm_gk20a_mapping_batch; |
29 | struct gk20a_as_share; | 29 | struct gk20a_as_share; |
30 | struct vm_gk20a; | 30 | struct vm_gk20a; |
31 | enum gk20a_mem_rw_flag; | ||
31 | 32 | ||
32 | void vgpu_locked_gmmu_unmap(struct vm_gk20a *vm, | 33 | void vgpu_locked_gmmu_unmap(struct vm_gk20a *vm, |
33 | u64 vaddr, | 34 | u64 vaddr, |
34 | u64 size, | 35 | u64 size, |
35 | int pgsz_idx, | 36 | int pgsz_idx, |
36 | bool va_allocated, | 37 | bool va_allocated, |
37 | int rw_flag, | 38 | enum gk20a_mem_rw_flag rw_flag, |
38 | bool sparse, | 39 | bool sparse, |
39 | struct vm_gk20a_mapping_batch *batch); | 40 | struct vm_gk20a_mapping_batch *batch); |
40 | int vgpu_vm_bind_channel(struct vm_gk20a *vm, | 41 | int vgpu_vm_bind_channel(struct vm_gk20a *vm, |