gpu: nvgpu: Add support for multiple PBDMAs

Added support for multiple PBDMAs handling during
fifo_pbdma_isr and gk20a_init_fifo_reset_enable_hw
use case.

JIRA DNVGPU-26

Change-Id: I3ce65fdeacb012551d15eed85dc61602f7dadbbb
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: http://git-master/r/1145601
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 4 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gp10b/hw_fifo_gp10b.h b/drivers/gpu/nvgpu/gp10b/hw_fifo_gp10b.h
index 4781ff85..89037a7c 100644
--- a/drivers/gpu/nvgpu/gp10b/hw_fifo_gp10b.h
+++ b/drivers/gpu/nvgpu/gp10b/hw_fifo_gp10b.h
@@ -326,6 +326,10 @@ static inline u32 fifo_intr_pbdma_id_status_f(u32 v, u32 i)
 {
         return (v & 0x1) << (0 + i*1);
 }
+static inline u32 fifo_intr_pbdma_id_status_v(u32 r, u32 i)
+{
+        return (r >> (0 + i*1)) & 0x1;
+}
 static inline u32 fifo_intr_pbdma_id_status__size_1_v(void)
 {
         return 0x00000001;