gpu: nvgpu: Discard coherency check on gmmu

With MSS Nvlink set for force snoop, check for the coherency flag in
gmmu attribute and setting pte aperture to coherent type based on that
checking is not relevant.

coherent variable removed from nvgpu_gmmu_attrs struct.

Bug 200473147
Bug 3057980

Change-Id: Idf76cac901ef7c70faa2c4f7f11a046d94b9466a
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2013212
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
(cherry-picked from 4e1769097526e5203f7c18a663ab3c29f5568ae5
in rel-32)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2387272
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: Aayush Rajoria <arajoria@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

4 files changed, 3 insertions, 17 deletions

diff --git a/drivers/gpu/nvgpu/common/mm/gmmu.c b/drivers/gpu/nvgpu/common/mm/gmmu.c
index ee160ae2..748e9f45 100644
--- a/drivers/gpu/nvgpu/common/mm/gmmu.c
+++ b/drivers/gpu/nvgpu/common/mm/gmmu.c
@@ -620,7 +620,7 @@ static int __nvgpu_gmmu_update_page_table(struct vm_gk20a *vm,
                    "vm=%s "
                    "%-5s GPU virt %#-12llx +%#-9llx    phys %#-12llx "
                    "phys offset: %#-4llx;  pgsz: %3dkb perm=%-2s | "
-                   "kind=%#02x APT=%-6s %c%c%c%c%c%c",
+                   "kind=%#02x APT=%-6s %c%c%c%c%c",
                    vm->name,
                    (sgt != NULL) ? "MAP" : "UNMAP",
                    virt_addr,
@@ -634,7 +634,6 @@ static int __nvgpu_gmmu_update_page_table(struct vm_gk20a *vm,
                    attrs->cacheable ? 'C' : '-',
                    attrs->sparse    ? 'S' : '-',
                    attrs->priv      ? 'P' : '-',
-                   attrs->coherent  ? 'I' : '-',
                    attrs->valid     ? 'V' : '-',
                    attrs->platform_atomic ? 'A' : '-');
 
@@ -693,7 +692,6 @@ u64 gk20a_locked_gmmu_map(struct vm_gk20a *vm,
                 .rw_flag   = rw_flag,
                 .sparse    = sparse,
                 .priv      = priv,
-                .coherent  = flags & NVGPU_VM_MAP_IO_COHERENT,
                 .valid     = (flags & NVGPU_VM_MAP_UNMAPPED_PTE) == 0U,
                 .aperture  = aperture,
                 .platform_atomic = (flags & NVGPU_VM_MAP_PLATFORM_ATOMIC) != 0U
@@ -711,14 +709,6 @@ u64 gk20a_locked_gmmu_map(struct vm_gk20a *vm,
         attrs.l3_alloc = (bool)(flags & NVGPU_VM_MAP_L3_ALLOC);
 
         /*
-         * Handle the IO coherency aperture: make sure the .aperture field is
-         * correct based on the IO coherency flag.
-         */
-        if (attrs.coherent && attrs.aperture == APERTURE_SYSMEM) {
-                attrs.aperture = APERTURE_SYSMEM_COH;
-        }
-
-        /*
          * Only allocate a new GPU VA range if we haven't already been passed a
          * GPU VA range. This facilitates fixed mappings.
          */
@@ -775,7 +765,6 @@ void gk20a_locked_gmmu_unmap(struct vm_gk20a *vm,
                 .rw_flag   = rw_flag,
                 .sparse    = sparse,
                 .priv      = 0,
-                .coherent  = 0,
                 .valid     = 0,
                 .aperture  = APERTURE_INVALID,
         };
diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
index 18922d46..10ca84d9 100644
--- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
@@ -274,7 +274,7 @@ static void update_gmmu_pte_locked(struct vm_gk20a *vm,
         pte_dbg(g, attrs,
                 "PTE: i=%-4u size=%-2u offs=%-4u | "
                 "GPU %#-12llx  phys %#-12llx "
-                "pgsz: %3dkb perm=%-2s kind=%#02x APT=%-6s %c%c%c%c%c "
+                "pgsz: %3dkb perm=%-2s kind=%#02x APT=%-6s %c%c%c%c "
                 "ctag=0x%08x "
                 "[0x%08x, 0x%08x]",
                 pd_idx, l->entry_size, pd_offset,
@@ -286,7 +286,6 @@ static void update_gmmu_pte_locked(struct vm_gk20a *vm,
                 attrs->cacheable ? 'C' : '-',
                 attrs->sparse    ? 'S' : '-',
                 attrs->priv      ? 'P' : '-',
-                attrs->coherent  ? 'I' : '-',
                 attrs->valid     ? 'V' : '-',
                 (u32)attrs->ctag >> ctag_shift,
                 pte_w[1], pte_w[0]);
diff --git a/drivers/gpu/nvgpu/gp10b/mm_gp10b.c b/drivers/gpu/nvgpu/gp10b/mm_gp10b.c
index a4b291d8..48e08a16 100644
--- a/drivers/gpu/nvgpu/gp10b/mm_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/mm_gp10b.c
@@ -280,7 +280,7 @@ static void update_gmmu_pte_locked(struct vm_gk20a *vm,
                 "vm=%s "
                 "PTE: i=%-4u size=%-2u | "
                 "GPU %#-12llx  phys %#-12llx "
-                "pgsz: %3dkb perm=%-2s kind=%#02x APT=%-6s %c%c%c%c%c%c "
+                "pgsz: %3dkb perm=%-2s kind=%#02x APT=%-6s %c%c%c%c%c "
                 "ctag=0x%08x "
                 "[0x%08x, 0x%08x]",
                 vm->name,
@@ -293,7 +293,6 @@ static void update_gmmu_pte_locked(struct vm_gk20a *vm,
                 attrs->cacheable ? 'C' : '-',
                 attrs->sparse    ? 'S' : '-',
                 attrs->priv      ? 'P' : '-',
-                attrs->coherent  ? 'I' : '-',
                 attrs->valid     ? 'V' : '-',
                 attrs->platform_atomic ? 'A' : '-',
                 (u32)attrs->ctag / g->ops.fb.compression_page_size(g),
diff --git a/drivers/gpu/nvgpu/include/nvgpu/gmmu.h b/drivers/gpu/nvgpu/include/nvgpu/gmmu.h
index 66cb5218..8e1eeedc 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/gmmu.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/gmmu.h
@@ -170,7 +170,6 @@ struct nvgpu_gmmu_attrs {
         enum gk20a_mem_rw_flag   rw_flag;
         bool                     sparse;
         bool                     priv;
-        bool                     coherent;
         bool                     valid;
         enum nvgpu_aperture      aperture;
         bool                     debug;