diff options
author | Konsta Holtta <kholtta@nvidia.com> | 2015-01-30 08:22:11 -0500 |
---|---|---|
committer | Dan Willemsen <dwillemsen@nvidia.com> | 2015-04-04 21:05:59 -0400 |
commit | adb33505b21a8e75267bb74d602becf8db51946b (patch) | |
tree | 6b8d674e5c098ec0b85b692c5d50c59c749bc177 | |
parent | 24ddf71b9009291b829e6c30eb1b22e8838f7367 (diff) |
gpu: nvgpu: add open channel ioctl to ctrl node
Add the ioctl to open a new gpu channel to also the control node for
improved process startup performance, in addition to the current open
ioctl in the channel node. The new channel fd creation is refactored to
a separate function which is called from both ctrl and channel ioctls.
Bug 1604952
Change-Id: I3357ceec694c0e6d7a85807183884324cb725d3a
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/679516
Reviewed-by: Sami Kiminki <skiminki@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/channel_gk20a.c | 80 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/channel_gk20a.h | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c | 8 | ||||
-rw-r--r-- | include/uapi/linux/nvgpu.h | 10 |
4 files changed, 61 insertions, 39 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c index 80cddb32..d61656fc 100644 --- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c | |||
@@ -811,6 +811,48 @@ int gk20a_channel_open(struct inode *inode, struct file *filp) | |||
811 | return ret; | 811 | return ret; |
812 | } | 812 | } |
813 | 813 | ||
814 | int gk20a_channel_open_ioctl(struct gk20a *g, | ||
815 | struct nvgpu_channel_open_args *args) | ||
816 | { | ||
817 | int err; | ||
818 | int fd; | ||
819 | struct file *file; | ||
820 | char *name; | ||
821 | |||
822 | err = get_unused_fd_flags(O_RDWR); | ||
823 | if (err < 0) | ||
824 | return err; | ||
825 | fd = err; | ||
826 | |||
827 | name = kasprintf(GFP_KERNEL, "nvhost-%s-fd%d", | ||
828 | dev_name(&g->dev->dev), fd); | ||
829 | if (!name) { | ||
830 | err = -ENOMEM; | ||
831 | goto clean_up; | ||
832 | } | ||
833 | |||
834 | file = anon_inode_getfile(name, g->channel.cdev.ops, NULL, O_RDWR); | ||
835 | kfree(name); | ||
836 | if (IS_ERR(file)) { | ||
837 | err = PTR_ERR(file); | ||
838 | goto clean_up; | ||
839 | } | ||
840 | fd_install(fd, file); | ||
841 | |||
842 | err = __gk20a_channel_open(g, file); | ||
843 | if (err) | ||
844 | goto clean_up_file; | ||
845 | |||
846 | args->channel_fd = fd; | ||
847 | return 0; | ||
848 | |||
849 | clean_up_file: | ||
850 | fput(file); | ||
851 | clean_up: | ||
852 | put_unused_fd(fd); | ||
853 | return err; | ||
854 | } | ||
855 | |||
814 | /* allocate private cmd buffer. | 856 | /* allocate private cmd buffer. |
815 | used for inserting commands before/after user submitted buffers. */ | 857 | used for inserting commands before/after user submitted buffers. */ |
816 | static int channel_gk20a_alloc_priv_cmdbuf(struct channel_gk20a *c) | 858 | static int channel_gk20a_alloc_priv_cmdbuf(struct channel_gk20a *c) |
@@ -2237,43 +2279,9 @@ long gk20a_channel_ioctl(struct file *filp, | |||
2237 | 2279 | ||
2238 | switch (cmd) { | 2280 | switch (cmd) { |
2239 | case NVGPU_IOCTL_CHANNEL_OPEN: | 2281 | case NVGPU_IOCTL_CHANNEL_OPEN: |
2240 | { | 2282 | err = gk20a_channel_open_ioctl(ch->g, |
2241 | int fd; | 2283 | (struct nvgpu_channel_open_args *)buf); |
2242 | struct file *file; | ||
2243 | char *name; | ||
2244 | |||
2245 | err = get_unused_fd_flags(O_RDWR); | ||
2246 | if (err < 0) | ||
2247 | break; | ||
2248 | fd = err; | ||
2249 | |||
2250 | name = kasprintf(GFP_KERNEL, "nvhost-%s-fd%d", | ||
2251 | dev_name(&dev->dev), fd); | ||
2252 | if (!name) { | ||
2253 | err = -ENOMEM; | ||
2254 | put_unused_fd(fd); | ||
2255 | break; | ||
2256 | } | ||
2257 | |||
2258 | file = anon_inode_getfile(name, filp->f_op, NULL, O_RDWR); | ||
2259 | kfree(name); | ||
2260 | if (IS_ERR(file)) { | ||
2261 | err = PTR_ERR(file); | ||
2262 | put_unused_fd(fd); | ||
2263 | break; | ||
2264 | } | ||
2265 | fd_install(fd, file); | ||
2266 | |||
2267 | err = __gk20a_channel_open(ch->g, file); | ||
2268 | if (err) { | ||
2269 | put_unused_fd(fd); | ||
2270 | fput(file); | ||
2271 | break; | ||
2272 | } | ||
2273 | |||
2274 | ((struct nvgpu_channel_open_args *)buf)->channel_fd = fd; | ||
2275 | break; | 2284 | break; |
2276 | } | ||
2277 | case NVGPU_IOCTL_CHANNEL_SET_NVMAP_FD: | 2285 | case NVGPU_IOCTL_CHANNEL_SET_NVMAP_FD: |
2278 | break; | 2286 | break; |
2279 | case NVGPU_IOCTL_CHANNEL_ALLOC_OBJ_CTX: | 2287 | case NVGPU_IOCTL_CHANNEL_ALLOC_OBJ_CTX: |
diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.h b/drivers/gpu/nvgpu/gk20a/channel_gk20a.h index 9982b1e0..c028e3b1 100644 --- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.h | |||
@@ -185,6 +185,8 @@ int gk20a_channel_resume(struct gk20a *g); | |||
185 | 185 | ||
186 | /* Channel file operations */ | 186 | /* Channel file operations */ |
187 | int gk20a_channel_open(struct inode *inode, struct file *filp); | 187 | int gk20a_channel_open(struct inode *inode, struct file *filp); |
188 | int gk20a_channel_open_ioctl(struct gk20a *g, | ||
189 | struct nvgpu_channel_open_args *args); | ||
188 | long gk20a_channel_ioctl(struct file *filp, | 190 | long gk20a_channel_ioctl(struct file *filp, |
189 | unsigned int cmd, | 191 | unsigned int cmd, |
190 | unsigned long arg); | 192 | unsigned long arg); |
diff --git a/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c b/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c index c8fe34a8..d314e078 100644 --- a/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2011-2014, NVIDIA Corporation. All rights reserved. | 2 | * Copyright (c) 2011-2015, NVIDIA Corporation. All rights reserved. |
3 | * | 3 | * |
4 | * This program is free software; you can redistribute it and/or modify it | 4 | * This program is free software; you can redistribute it and/or modify it |
5 | * under the terms and conditions of the GNU General Public License, | 5 | * under the terms and conditions of the GNU General Public License, |
@@ -421,6 +421,12 @@ long gk20a_ctrl_dev_ioctl(struct file *filp, unsigned int cmd, unsigned long arg | |||
421 | err = gk20a_ctrl_get_tpc_masks(g, | 421 | err = gk20a_ctrl_get_tpc_masks(g, |
422 | (struct nvgpu_gpu_get_tpc_masks_args *)buf); | 422 | (struct nvgpu_gpu_get_tpc_masks_args *)buf); |
423 | break; | 423 | break; |
424 | case NVGPU_GPU_IOCTL_OPEN_CHANNEL: | ||
425 | /* this arg type here, but ..gpu_open_channel_args in nvgpu.h | ||
426 | * for consistency - they are the same */ | ||
427 | err = gk20a_channel_open_ioctl(g, | ||
428 | (struct nvgpu_channel_open_args *)buf); | ||
429 | break; | ||
424 | default: | 430 | default: |
425 | dev_dbg(dev_from_gk20a(g), "unrecognized gpu ioctl cmd: 0x%x", cmd); | 431 | dev_dbg(dev_from_gk20a(g), "unrecognized gpu ioctl cmd: 0x%x", cmd); |
426 | err = -ENOTTY; | 432 | err = -ENOTTY; |
diff --git a/include/uapi/linux/nvgpu.h b/include/uapi/linux/nvgpu.h index 20acc66a..1e438775 100644 --- a/include/uapi/linux/nvgpu.h +++ b/include/uapi/linux/nvgpu.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * NVGPU Public Interface Header | 2 | * NVGPU Public Interface Header |
3 | * | 3 | * |
4 | * Copyright (c) 2011-2014, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2011-2015, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify it | 6 | * This program is free software; you can redistribute it and/or modify it |
7 | * under the terms and conditions of the GNU General Public License, | 7 | * under the terms and conditions of the GNU General Public License, |
@@ -238,6 +238,10 @@ struct nvgpu_gpu_get_tpc_masks_args { | |||
238 | __u64 mask_buf_addr; | 238 | __u64 mask_buf_addr; |
239 | }; | 239 | }; |
240 | 240 | ||
241 | struct nvgpu_gpu_open_channel_args { | ||
242 | __s32 channel_fd; | ||
243 | }; | ||
244 | |||
241 | #define NVGPU_GPU_IOCTL_ZCULL_GET_CTX_SIZE \ | 245 | #define NVGPU_GPU_IOCTL_ZCULL_GET_CTX_SIZE \ |
242 | _IOR(NVGPU_GPU_IOCTL_MAGIC, 1, struct nvgpu_gpu_zcull_get_ctx_size_args) | 246 | _IOR(NVGPU_GPU_IOCTL_MAGIC, 1, struct nvgpu_gpu_zcull_get_ctx_size_args) |
243 | #define NVGPU_GPU_IOCTL_ZCULL_GET_INFO \ | 247 | #define NVGPU_GPU_IOCTL_ZCULL_GET_INFO \ |
@@ -258,9 +262,11 @@ struct nvgpu_gpu_get_tpc_masks_args { | |||
258 | _IOWR(NVGPU_GPU_IOCTL_MAGIC, 9, struct nvgpu_gpu_open_tsg_args) | 262 | _IOWR(NVGPU_GPU_IOCTL_MAGIC, 9, struct nvgpu_gpu_open_tsg_args) |
259 | #define NVGPU_GPU_IOCTL_GET_TPC_MASKS \ | 263 | #define NVGPU_GPU_IOCTL_GET_TPC_MASKS \ |
260 | _IOWR(NVGPU_GPU_IOCTL_MAGIC, 10, struct nvgpu_gpu_get_tpc_masks_args) | 264 | _IOWR(NVGPU_GPU_IOCTL_MAGIC, 10, struct nvgpu_gpu_get_tpc_masks_args) |
265 | #define NVGPU_GPU_IOCTL_OPEN_CHANNEL \ | ||
266 | _IOWR(NVGPU_GPU_IOCTL_MAGIC, 11, struct nvgpu_gpu_open_channel_args) | ||
261 | 267 | ||
262 | #define NVGPU_GPU_IOCTL_LAST \ | 268 | #define NVGPU_GPU_IOCTL_LAST \ |
263 | _IOC_NR(NVGPU_GPU_IOCTL_GET_TPC_MASKS) | 269 | _IOC_NR(NVGPU_GPU_IOCTL_OPEN_CHANNEL) |
264 | #define NVGPU_GPU_IOCTL_MAX_ARG_SIZE \ | 270 | #define NVGPU_GPU_IOCTL_MAX_ARG_SIZE \ |
265 | sizeof(struct nvgpu_gpu_prepare_compressible_read_args) | 271 | sizeof(struct nvgpu_gpu_prepare_compressible_read_args) |
266 | 272 | ||