gpu: nvgpu: use 64K hole for PMU VM

With 4K hole T186 PMU does not boot in NS
T186 has 64 bit DMA Base. We subtract IMEM
offset from GPUVA for PMU boot DMABASE setup
It becomes above 4GB because of that
So we will use a hole which is bigger than
IMEM size.

Change-Id: Ib87c39881299a4f5b14e28415195e00800250c46
Signed-off-by: Vijayakumar <vsubbu@nvidia.com>
Reviewed-on: http://git-master/r/740656
(cherry picked from commit 6504934d5f90719a5d564174aeb92da90aafbd5b)
Reviewed-on: http://git-master/r/747742
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 1 insertions, 1 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
index 1761d882..42974154 100644
--- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
@@ -3082,7 +3082,7 @@ static int gk20a_init_system_vm(struct mm_gk20a *mm)
         gk20a_dbg_info("pmu vm size = 0x%x", mm->pmu.aperture_size);
 
         gk20a_init_vm(mm, vm, big_page_size,
-                      SZ_4K, GK20A_PMU_VA_SIZE, false, "system");
+                      SZ_4K * 16, GK20A_PMU_VA_SIZE, false, "system");
 
         err = gk20a_alloc_inst_block(g, inst_block);
         if (err)